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241 lines
6.3 KiB
241 lines
6.3 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* Qualcomm UART driver |
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* |
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* (C) Copyright 2015 Mateusz Kulikowski <[email protected]> |
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* |
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* UART will work in Data Mover mode. |
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* Based on Linux driver. |
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*/ |
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#include <common.h> |
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#include <clk.h> |
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#include <dm.h> |
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#include <errno.h> |
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#include <serial.h> |
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#include <watchdog.h> |
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#include <asm/io.h> |
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#include <linux/compiler.h> |
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#include <dm/pinctrl.h> |
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/* Serial registers - this driver works in uartdm mode*/ |
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#define UARTDM_DMRX 0x34 /* Max RX transfer length */ |
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#define UARTDM_NCF_TX 0x40 /* Number of chars to TX */ |
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#define UARTDM_RXFS 0x50 /* RX channel status register */ |
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#define UARTDM_RXFS_BUF_SHIFT 0x7 /* Number of bytes in the packing buffer */ |
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#define UARTDM_RXFS_BUF_MASK 0x7 |
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#define UARTDM_MR1 0x00 |
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#define UARTDM_MR2 0x04 |
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#define UARTDM_CSR 0xA0 |
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#define UARTDM_SR 0xA4 /* Status register */ |
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#define UARTDM_SR_RX_READY (1 << 0) /* Word is the receiver FIFO */ |
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#define UARTDM_SR_TX_EMPTY (1 << 3) /* Transmitter underrun */ |
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#define UARTDM_SR_UART_OVERRUN (1 << 4) /* Receive overrun */ |
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#define UARTDM_CR 0xA8 /* Command register */ |
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#define UARTDM_CR_CMD_RESET_ERR (3 << 4) /* Clear overrun error */ |
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#define UARTDM_CR_CMD_RESET_STALE_INT (8 << 4) /* Clears stale irq */ |
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#define UARTDM_CR_CMD_RESET_TX_READY (3 << 8) /* Clears TX Ready irq*/ |
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#define UARTDM_CR_CMD_FORCE_STALE (4 << 8) /* Causes stale event */ |
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#define UARTDM_CR_CMD_STALE_EVENT_DISABLE (6 << 8) /* Disable stale event */ |
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#define UARTDM_IMR 0xB0 /* Interrupt mask register */ |
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#define UARTDM_ISR 0xB4 /* Interrupt status register */ |
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#define UARTDM_ISR_TX_READY 0x80 /* TX FIFO empty */ |
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#define UARTDM_TF 0x100 /* UART Transmit FIFO register */ |
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#define UARTDM_RF 0x140 /* UART Receive FIFO register */ |
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#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC |
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#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34 |
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#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10 |
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#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20 |
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DECLARE_GLOBAL_DATA_PTR; |
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struct msm_serial_data { |
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phys_addr_t base; |
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unsigned chars_cnt; /* number of buffered chars */ |
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uint32_t chars_buf; /* buffered chars */ |
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}; |
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static int msm_serial_fetch(struct udevice *dev) |
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{ |
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struct msm_serial_data *priv = dev_get_priv(dev); |
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unsigned sr; |
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if (priv->chars_cnt) |
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return priv->chars_cnt; |
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/* Clear error in case of buffer overrun */ |
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if (readl(priv->base + UARTDM_SR) & UARTDM_SR_UART_OVERRUN) |
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writel(UARTDM_CR_CMD_RESET_ERR, priv->base + UARTDM_CR); |
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/* We need to fetch new character */ |
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sr = readl(priv->base + UARTDM_SR); |
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if (sr & UARTDM_SR_RX_READY) { |
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/* There are at least 4 bytes in fifo */ |
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priv->chars_buf = readl(priv->base + UARTDM_RF); |
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priv->chars_cnt = 4; |
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} else { |
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/* Check if there is anything in fifo */ |
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priv->chars_cnt = readl(priv->base + UARTDM_RXFS); |
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/* Extract number of characters in UART packing buffer*/ |
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priv->chars_cnt = (priv->chars_cnt >> |
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UARTDM_RXFS_BUF_SHIFT) & |
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UARTDM_RXFS_BUF_MASK; |
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if (!priv->chars_cnt) |
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return 0; |
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/* There is at least one charcter, move it to fifo */ |
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writel(UARTDM_CR_CMD_FORCE_STALE, |
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priv->base + UARTDM_CR); |
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priv->chars_buf = readl(priv->base + UARTDM_RF); |
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writel(UARTDM_CR_CMD_RESET_STALE_INT, |
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priv->base + UARTDM_CR); |
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writel(0x7, priv->base + UARTDM_DMRX); |
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} |
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return priv->chars_cnt; |
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} |
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static int msm_serial_getc(struct udevice *dev) |
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{ |
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struct msm_serial_data *priv = dev_get_priv(dev); |
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char c; |
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if (!msm_serial_fetch(dev)) |
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return -EAGAIN; |
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c = priv->chars_buf & 0xFF; |
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priv->chars_buf >>= 8; |
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priv->chars_cnt--; |
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return c; |
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} |
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static int msm_serial_putc(struct udevice *dev, const char ch) |
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{ |
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struct msm_serial_data *priv = dev_get_priv(dev); |
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if (!(readl(priv->base + UARTDM_SR) & UARTDM_SR_TX_EMPTY) && |
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!(readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY)) |
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return -EAGAIN; |
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writel(UARTDM_CR_CMD_RESET_TX_READY, priv->base + UARTDM_CR); |
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writel(1, priv->base + UARTDM_NCF_TX); |
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writel(ch, priv->base + UARTDM_TF); |
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return 0; |
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} |
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static int msm_serial_pending(struct udevice *dev, bool input) |
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{ |
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if (input) { |
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if (msm_serial_fetch(dev)) |
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return 1; |
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} |
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return 0; |
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} |
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static const struct dm_serial_ops msm_serial_ops = { |
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.putc = msm_serial_putc, |
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.pending = msm_serial_pending, |
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.getc = msm_serial_getc, |
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}; |
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static int msm_uart_clk_init(struct udevice *dev) |
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{ |
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uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), |
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"clock-frequency", 115200); |
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uint clkd[2]; /* clk_id and clk_no */ |
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int clk_offset; |
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struct udevice *clk_dev; |
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struct clk clk; |
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int ret; |
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ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "clock", |
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clkd, 2); |
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if (ret) |
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return ret; |
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clk_offset = fdt_node_offset_by_phandle(gd->fdt_blob, clkd[0]); |
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if (clk_offset < 0) |
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return clk_offset; |
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ret = uclass_get_device_by_of_offset(UCLASS_CLK, clk_offset, &clk_dev); |
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if (ret) |
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return ret; |
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clk.id = clkd[1]; |
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ret = clk_request(clk_dev, &clk); |
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if (ret < 0) |
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return ret; |
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ret = clk_set_rate(&clk, clk_rate); |
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clk_free(&clk); |
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if (ret < 0) |
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return ret; |
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return 0; |
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} |
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static void uart_dm_init(struct msm_serial_data *priv) |
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{ |
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writel(UART_DM_CLK_RX_TX_BIT_RATE, priv->base + UARTDM_CSR); |
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writel(0x0, priv->base + UARTDM_MR1); |
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writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2); |
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writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR); |
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writel(MSM_BOOT_UART_DM_CMD_RESET_TX, priv->base + UARTDM_CR); |
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} |
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static int msm_serial_probe(struct udevice *dev) |
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{ |
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int ret; |
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struct msm_serial_data *priv = dev_get_priv(dev); |
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/* No need to reinitialize the UART after relocation */ |
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if (gd->flags & GD_FLG_RELOC) |
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return 0; |
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ret = msm_uart_clk_init(dev); |
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if (ret) |
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return ret; |
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pinctrl_select_state(dev, "uart"); |
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uart_dm_init(priv); |
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return 0; |
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} |
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static int msm_serial_ofdata_to_platdata(struct udevice *dev) |
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{ |
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struct msm_serial_data *priv = dev_get_priv(dev); |
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priv->base = devfdt_get_addr(dev); |
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if (priv->base == FDT_ADDR_T_NONE) |
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return -EINVAL; |
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return 0; |
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} |
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static const struct udevice_id msm_serial_ids[] = { |
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{ .compatible = "qcom,msm-uartdm-v1.4" }, |
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{ } |
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}; |
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U_BOOT_DRIVER(serial_msm) = { |
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.name = "serial_msm", |
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.id = UCLASS_SERIAL, |
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.of_match = msm_serial_ids, |
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.ofdata_to_platdata = msm_serial_ofdata_to_platdata, |
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.priv_auto_alloc_size = sizeof(struct msm_serial_data), |
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.probe = msm_serial_probe, |
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.ops = &msm_serial_ops, |
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};
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