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22 lines
530 B
22 lines
530 B
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright Intel Corporation (C) 2017. All Rights Reserved |
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* |
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* Reset binding definitions for Altera Arria10 MAX5 System Resource Chip |
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* |
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* Adapted from altr,rst-mgr-a10.h |
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*/ |
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#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H |
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#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H |
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/* Peripheral PHY resets */ |
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#define A10SR_RESET_ENET_HPS 0 |
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#define A10SR_RESET_PCIE 1 |
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#define A10SR_RESET_FILE 2 |
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#define A10SR_RESET_BQSPI 3 |
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#define A10SR_RESET_USB 4 |
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#define A10SR_RESET_NUM 5 |
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#endif
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