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623 lines
15 KiB
623 lines
15 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* cg14.c: CGFOURTEEN frame buffer driver |
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* |
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* Copyright (C) 2003, 2006 David S. Miller ([email protected]) |
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* Copyright (C) 1996,1998 Jakub Jelinek ([email protected]) |
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* Copyright (C) 1995 Miguel de Icaza ([email protected]) |
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* |
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* Driver layout based loosely on tgafb.c, see that file for credits. |
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*/ |
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|
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/errno.h> |
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#include <linux/string.h> |
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#include <linux/delay.h> |
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#include <linux/init.h> |
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#include <linux/fb.h> |
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#include <linux/mm.h> |
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#include <linux/uaccess.h> |
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#include <linux/of_device.h> |
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|
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#include <asm/io.h> |
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#include <asm/fbio.h> |
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|
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#include "sbuslib.h" |
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|
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/* |
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* Local functions. |
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*/ |
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|
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static int cg14_setcolreg(unsigned, unsigned, unsigned, unsigned, |
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unsigned, struct fb_info *); |
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|
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static int cg14_mmap(struct fb_info *, struct vm_area_struct *); |
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static int cg14_ioctl(struct fb_info *, unsigned int, unsigned long); |
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static int cg14_pan_display(struct fb_var_screeninfo *, struct fb_info *); |
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|
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/* |
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* Frame buffer operations |
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*/ |
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|
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static const struct fb_ops cg14_ops = { |
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.owner = THIS_MODULE, |
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.fb_setcolreg = cg14_setcolreg, |
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.fb_pan_display = cg14_pan_display, |
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.fb_fillrect = cfb_fillrect, |
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.fb_copyarea = cfb_copyarea, |
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.fb_imageblit = cfb_imageblit, |
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.fb_mmap = cg14_mmap, |
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.fb_ioctl = cg14_ioctl, |
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#ifdef CONFIG_COMPAT |
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.fb_compat_ioctl = sbusfb_compat_ioctl, |
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#endif |
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}; |
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|
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#define CG14_MCR_INTENABLE_SHIFT 7 |
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#define CG14_MCR_INTENABLE_MASK 0x80 |
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#define CG14_MCR_VIDENABLE_SHIFT 6 |
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#define CG14_MCR_VIDENABLE_MASK 0x40 |
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#define CG14_MCR_PIXMODE_SHIFT 4 |
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#define CG14_MCR_PIXMODE_MASK 0x30 |
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#define CG14_MCR_TMR_SHIFT 2 |
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#define CG14_MCR_TMR_MASK 0x0c |
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#define CG14_MCR_TMENABLE_SHIFT 1 |
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#define CG14_MCR_TMENABLE_MASK 0x02 |
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#define CG14_MCR_RESET_SHIFT 0 |
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#define CG14_MCR_RESET_MASK 0x01 |
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#define CG14_REV_REVISION_SHIFT 4 |
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#define CG14_REV_REVISION_MASK 0xf0 |
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#define CG14_REV_IMPL_SHIFT 0 |
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#define CG14_REV_IMPL_MASK 0x0f |
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#define CG14_VBR_FRAMEBASE_SHIFT 12 |
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#define CG14_VBR_FRAMEBASE_MASK 0x00fff000 |
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#define CG14_VMCR1_SETUP_SHIFT 0 |
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#define CG14_VMCR1_SETUP_MASK 0x000001ff |
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#define CG14_VMCR1_VCONFIG_SHIFT 9 |
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#define CG14_VMCR1_VCONFIG_MASK 0x00000e00 |
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#define CG14_VMCR2_REFRESH_SHIFT 0 |
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#define CG14_VMCR2_REFRESH_MASK 0x00000001 |
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#define CG14_VMCR2_TESTROWCNT_SHIFT 1 |
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#define CG14_VMCR2_TESTROWCNT_MASK 0x00000002 |
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#define CG14_VMCR2_FBCONFIG_SHIFT 2 |
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#define CG14_VMCR2_FBCONFIG_MASK 0x0000000c |
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#define CG14_VCR_REFRESHREQ_SHIFT 0 |
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#define CG14_VCR_REFRESHREQ_MASK 0x000003ff |
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#define CG14_VCR1_REFRESHENA_SHIFT 10 |
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#define CG14_VCR1_REFRESHENA_MASK 0x00000400 |
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#define CG14_VCA_CAD_SHIFT 0 |
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#define CG14_VCA_CAD_MASK 0x000003ff |
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#define CG14_VCA_VERS_SHIFT 10 |
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#define CG14_VCA_VERS_MASK 0x00000c00 |
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#define CG14_VCA_RAMSPEED_SHIFT 12 |
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#define CG14_VCA_RAMSPEED_MASK 0x00001000 |
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#define CG14_VCA_8MB_SHIFT 13 |
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#define CG14_VCA_8MB_MASK 0x00002000 |
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|
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#define CG14_MCR_PIXMODE_8 0 |
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#define CG14_MCR_PIXMODE_16 2 |
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#define CG14_MCR_PIXMODE_32 3 |
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|
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struct cg14_regs{ |
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u8 mcr; /* Master Control Reg */ |
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u8 ppr; /* Packed Pixel Reg */ |
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u8 tms[2]; /* Test Mode Status Regs */ |
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u8 msr; /* Master Status Reg */ |
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u8 fsr; /* Fault Status Reg */ |
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u8 rev; /* Revision & Impl */ |
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u8 ccr; /* Clock Control Reg */ |
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u32 tmr; /* Test Mode Read Back */ |
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u8 mod; /* Monitor Operation Data Reg */ |
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u8 acr; /* Aux Control */ |
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u8 xxx0[6]; |
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u16 hct; /* Hor Counter */ |
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u16 vct; /* Vert Counter */ |
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u16 hbs; /* Hor Blank Start */ |
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u16 hbc; /* Hor Blank Clear */ |
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u16 hss; /* Hor Sync Start */ |
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u16 hsc; /* Hor Sync Clear */ |
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u16 csc; /* Composite Sync Clear */ |
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u16 vbs; /* Vert Blank Start */ |
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u16 vbc; /* Vert Blank Clear */ |
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u16 vss; /* Vert Sync Start */ |
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u16 vsc; /* Vert Sync Clear */ |
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u16 xcs; |
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u16 xcc; |
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u16 fsa; /* Fault Status Address */ |
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u16 adr; /* Address Registers */ |
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u8 xxx1[0xce]; |
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u8 pcg[0x100]; /* Pixel Clock Generator */ |
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u32 vbr; /* Frame Base Row */ |
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u32 vmcr; /* VBC Master Control */ |
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u32 vcr; /* VBC refresh */ |
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u32 vca; /* VBC Config */ |
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}; |
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|
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#define CG14_CCR_ENABLE 0x04 |
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#define CG14_CCR_SELECT 0x02 /* HW/Full screen */ |
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|
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struct cg14_cursor { |
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u32 cpl0[32]; /* Enable plane 0 */ |
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u32 cpl1[32]; /* Color selection plane */ |
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u8 ccr; /* Cursor Control Reg */ |
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u8 xxx0[3]; |
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u16 cursx; /* Cursor x,y position */ |
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u16 cursy; /* Cursor x,y position */ |
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u32 color0; |
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u32 color1; |
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u32 xxx1[0x1bc]; |
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u32 cpl0i[32]; /* Enable plane 0 autoinc */ |
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u32 cpl1i[32]; /* Color selection autoinc */ |
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}; |
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|
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struct cg14_dac { |
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u8 addr; /* Address Register */ |
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u8 xxx0[255]; |
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u8 glut; /* Gamma table */ |
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u8 xxx1[255]; |
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u8 select; /* Register Select */ |
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u8 xxx2[255]; |
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u8 mode; /* Mode Register */ |
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}; |
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struct cg14_xlut{ |
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u8 x_xlut [256]; |
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u8 x_xlutd [256]; |
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u8 xxx0[0x600]; |
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u8 x_xlut_inc [256]; |
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u8 x_xlutd_inc [256]; |
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}; |
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|
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/* Color look up table (clut) */ |
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/* Each one of these arrays hold the color lookup table (for 256 |
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* colors) for each MDI page (I assume then there should be 4 MDI |
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* pages, I still wonder what they are. I have seen NeXTStep split |
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* the screen in four parts, while operating in 24 bits mode. Each |
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* integer holds 4 values: alpha value (transparency channel, thanks |
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* go to John Stone ([email protected]) from OpenBSD), red, green and blue |
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* |
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* I currently use the clut instead of the Xlut |
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*/ |
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struct cg14_clut { |
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u32 c_clut [256]; |
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u32 c_clutd [256]; /* i wonder what the 'd' is for */ |
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u32 c_clut_inc [256]; |
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u32 c_clutd_inc [256]; |
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}; |
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|
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#define CG14_MMAP_ENTRIES 16 |
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struct cg14_par { |
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spinlock_t lock; |
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struct cg14_regs __iomem *regs; |
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struct cg14_clut __iomem *clut; |
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struct cg14_cursor __iomem *cursor; |
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u32 flags; |
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#define CG14_FLAG_BLANKED 0x00000001 |
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unsigned long iospace; |
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struct sbus_mmap_map mmap_map[CG14_MMAP_ENTRIES]; |
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|
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int mode; |
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int ramsize; |
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}; |
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|
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static void __cg14_reset(struct cg14_par *par) |
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{ |
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struct cg14_regs __iomem *regs = par->regs; |
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u8 val; |
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|
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val = sbus_readb(®s->mcr); |
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val &= ~(CG14_MCR_PIXMODE_MASK); |
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sbus_writeb(val, ®s->mcr); |
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} |
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|
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static int cg14_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
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{ |
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struct cg14_par *par = (struct cg14_par *) info->par; |
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unsigned long flags; |
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|
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/* We just use this to catch switches out of |
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* graphics mode. |
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*/ |
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spin_lock_irqsave(&par->lock, flags); |
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__cg14_reset(par); |
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spin_unlock_irqrestore(&par->lock, flags); |
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|
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if (var->xoffset || var->yoffset || var->vmode) |
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return -EINVAL; |
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return 0; |
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} |
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|
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/** |
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* cg14_setcolreg - Optional function. Sets a color register. |
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* @regno: boolean, 0 copy local, 1 get_user() function |
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* @red: frame buffer colormap structure |
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* @green: The green value which can be up to 16 bits wide |
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* @blue: The blue value which can be up to 16 bits wide. |
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* @transp: If supported the alpha value which can be up to 16 bits wide. |
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* @info: frame buffer info structure |
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*/ |
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static int cg14_setcolreg(unsigned regno, |
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unsigned red, unsigned green, unsigned blue, |
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unsigned transp, struct fb_info *info) |
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{ |
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struct cg14_par *par = (struct cg14_par *) info->par; |
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struct cg14_clut __iomem *clut = par->clut; |
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unsigned long flags; |
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u32 val; |
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|
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if (regno >= 256) |
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return 1; |
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red >>= 8; |
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green >>= 8; |
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blue >>= 8; |
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val = (red | (green << 8) | (blue << 16)); |
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spin_lock_irqsave(&par->lock, flags); |
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sbus_writel(val, &clut->c_clut[regno]); |
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spin_unlock_irqrestore(&par->lock, flags); |
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return 0; |
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} |
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static int cg14_mmap(struct fb_info *info, struct vm_area_struct *vma) |
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{ |
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struct cg14_par *par = (struct cg14_par *) info->par; |
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return sbusfb_mmap_helper(par->mmap_map, |
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info->fix.smem_start, info->fix.smem_len, |
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par->iospace, vma); |
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} |
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static int cg14_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) |
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{ |
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struct cg14_par *par = (struct cg14_par *) info->par; |
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struct cg14_regs __iomem *regs = par->regs; |
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struct mdi_cfginfo kmdi, __user *mdii; |
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unsigned long flags; |
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int cur_mode, mode, ret = 0; |
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|
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switch (cmd) { |
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case MDI_RESET: |
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spin_lock_irqsave(&par->lock, flags); |
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__cg14_reset(par); |
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spin_unlock_irqrestore(&par->lock, flags); |
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break; |
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case MDI_GET_CFGINFO: |
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memset(&kmdi, 0, sizeof(kmdi)); |
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|
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spin_lock_irqsave(&par->lock, flags); |
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kmdi.mdi_type = FBTYPE_MDICOLOR; |
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kmdi.mdi_height = info->var.yres; |
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kmdi.mdi_width = info->var.xres; |
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kmdi.mdi_mode = par->mode; |
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kmdi.mdi_pixfreq = 72; /* FIXME */ |
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kmdi.mdi_size = par->ramsize; |
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spin_unlock_irqrestore(&par->lock, flags); |
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|
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mdii = (struct mdi_cfginfo __user *) arg; |
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if (copy_to_user(mdii, &kmdi, sizeof(kmdi))) |
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ret = -EFAULT; |
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break; |
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|
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case MDI_SET_PIXELMODE: |
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if (get_user(mode, (int __user *) arg)) { |
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ret = -EFAULT; |
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break; |
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} |
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spin_lock_irqsave(&par->lock, flags); |
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cur_mode = sbus_readb(®s->mcr); |
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cur_mode &= ~CG14_MCR_PIXMODE_MASK; |
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switch(mode) { |
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case MDI_32_PIX: |
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cur_mode |= (CG14_MCR_PIXMODE_32 << |
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CG14_MCR_PIXMODE_SHIFT); |
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break; |
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|
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case MDI_16_PIX: |
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cur_mode |= (CG14_MCR_PIXMODE_16 << |
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CG14_MCR_PIXMODE_SHIFT); |
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break; |
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|
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case MDI_8_PIX: |
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break; |
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|
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default: |
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ret = -ENOSYS; |
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break; |
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} |
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if (!ret) { |
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sbus_writeb(cur_mode, ®s->mcr); |
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par->mode = mode; |
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} |
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spin_unlock_irqrestore(&par->lock, flags); |
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break; |
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|
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default: |
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ret = sbusfb_ioctl_helper(cmd, arg, info, |
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FBTYPE_MDICOLOR, 8, |
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info->fix.smem_len); |
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break; |
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} |
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|
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return ret; |
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} |
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|
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/* |
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* Initialisation |
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*/ |
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|
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static void cg14_init_fix(struct fb_info *info, int linebytes, |
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struct device_node *dp) |
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{ |
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snprintf(info->fix.id, sizeof(info->fix.id), "%pOFn", dp); |
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|
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info->fix.type = FB_TYPE_PACKED_PIXELS; |
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info->fix.visual = FB_VISUAL_PSEUDOCOLOR; |
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|
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info->fix.line_length = linebytes; |
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|
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info->fix.accel = FB_ACCEL_SUN_CG14; |
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} |
|
|
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static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] = { |
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{ |
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.voff = CG14_REGS, |
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.poff = 0x80000000, |
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.size = 0x1000 |
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}, |
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{ |
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.voff = CG14_XLUT, |
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.poff = 0x80003000, |
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.size = 0x1000 |
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}, |
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{ |
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.voff = CG14_CLUT1, |
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.poff = 0x80004000, |
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.size = 0x1000 |
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}, |
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{ |
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.voff = CG14_CLUT2, |
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.poff = 0x80005000, |
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.size = 0x1000 |
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}, |
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{ |
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.voff = CG14_CLUT3, |
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.poff = 0x80006000, |
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.size = 0x1000 |
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}, |
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{ |
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.voff = CG3_MMAP_OFFSET - 0x7000, |
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.poff = 0x80000000, |
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.size = 0x7000 |
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}, |
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{ |
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.voff = CG3_MMAP_OFFSET, |
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.poff = 0x00000000, |
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.size = SBUS_MMAP_FBSIZE(1) |
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}, |
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{ |
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.voff = MDI_CURSOR_MAP, |
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.poff = 0x80001000, |
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.size = 0x1000 |
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}, |
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{ |
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.voff = MDI_CHUNKY_BGR_MAP, |
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.poff = 0x01000000, |
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.size = 0x400000 |
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}, |
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{ |
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.voff = MDI_PLANAR_X16_MAP, |
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.poff = 0x02000000, |
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.size = 0x200000 |
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}, |
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{ |
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.voff = MDI_PLANAR_C16_MAP, |
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.poff = 0x02800000, |
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.size = 0x200000 |
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}, |
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{ |
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.voff = MDI_PLANAR_X32_MAP, |
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.poff = 0x03000000, |
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.size = 0x100000 |
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}, |
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{ |
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.voff = MDI_PLANAR_B32_MAP, |
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.poff = 0x03400000, |
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.size = 0x100000 |
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}, |
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{ |
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.voff = MDI_PLANAR_G32_MAP, |
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.poff = 0x03800000, |
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.size = 0x100000 |
|
}, |
|
{ |
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.voff = MDI_PLANAR_R32_MAP, |
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.poff = 0x03c00000, |
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.size = 0x100000 |
|
}, |
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{ .size = 0 } |
|
}; |
|
|
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static void cg14_unmap_regs(struct platform_device *op, struct fb_info *info, |
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struct cg14_par *par) |
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{ |
|
if (par->regs) |
|
of_iounmap(&op->resource[0], |
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par->regs, sizeof(struct cg14_regs)); |
|
if (par->clut) |
|
of_iounmap(&op->resource[0], |
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par->clut, sizeof(struct cg14_clut)); |
|
if (par->cursor) |
|
of_iounmap(&op->resource[0], |
|
par->cursor, sizeof(struct cg14_cursor)); |
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if (info->screen_base) |
|
of_iounmap(&op->resource[1], |
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info->screen_base, info->fix.smem_len); |
|
} |
|
|
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static int cg14_probe(struct platform_device *op) |
|
{ |
|
struct device_node *dp = op->dev.of_node; |
|
struct fb_info *info; |
|
struct cg14_par *par; |
|
int is_8mb, linebytes, i, err; |
|
|
|
info = framebuffer_alloc(sizeof(struct cg14_par), &op->dev); |
|
|
|
err = -ENOMEM; |
|
if (!info) |
|
goto out_err; |
|
par = info->par; |
|
|
|
spin_lock_init(&par->lock); |
|
|
|
sbusfb_fill_var(&info->var, dp, 8); |
|
info->var.red.length = 8; |
|
info->var.green.length = 8; |
|
info->var.blue.length = 8; |
|
|
|
linebytes = of_getintprop_default(dp, "linebytes", |
|
info->var.xres); |
|
info->fix.smem_len = PAGE_ALIGN(linebytes * info->var.yres); |
|
|
|
if (of_node_name_eq(dp->parent, "sbus") || |
|
of_node_name_eq(dp->parent, "sbi")) { |
|
info->fix.smem_start = op->resource[0].start; |
|
par->iospace = op->resource[0].flags & IORESOURCE_BITS; |
|
} else { |
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info->fix.smem_start = op->resource[1].start; |
|
par->iospace = op->resource[0].flags & IORESOURCE_BITS; |
|
} |
|
|
|
par->regs = of_ioremap(&op->resource[0], 0, |
|
sizeof(struct cg14_regs), "cg14 regs"); |
|
par->clut = of_ioremap(&op->resource[0], CG14_CLUT1, |
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sizeof(struct cg14_clut), "cg14 clut"); |
|
par->cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS, |
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sizeof(struct cg14_cursor), "cg14 cursor"); |
|
|
|
info->screen_base = of_ioremap(&op->resource[1], 0, |
|
info->fix.smem_len, "cg14 ram"); |
|
|
|
if (!par->regs || !par->clut || !par->cursor || !info->screen_base) |
|
goto out_unmap_regs; |
|
|
|
is_8mb = (resource_size(&op->resource[1]) == (8 * 1024 * 1024)); |
|
|
|
BUILD_BUG_ON(sizeof(par->mmap_map) != sizeof(__cg14_mmap_map)); |
|
|
|
memcpy(&par->mmap_map, &__cg14_mmap_map, sizeof(par->mmap_map)); |
|
|
|
for (i = 0; i < CG14_MMAP_ENTRIES; i++) { |
|
struct sbus_mmap_map *map = &par->mmap_map[i]; |
|
|
|
if (!map->size) |
|
break; |
|
if (map->poff & 0x80000000) |
|
map->poff = (map->poff & 0x7fffffff) + |
|
(op->resource[0].start - |
|
op->resource[1].start); |
|
if (is_8mb && |
|
map->size >= 0x100000 && |
|
map->size <= 0x400000) |
|
map->size *= 2; |
|
} |
|
|
|
par->mode = MDI_8_PIX; |
|
par->ramsize = (is_8mb ? 0x800000 : 0x400000); |
|
|
|
info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; |
|
info->fbops = &cg14_ops; |
|
|
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__cg14_reset(par); |
|
|
|
if (fb_alloc_cmap(&info->cmap, 256, 0)) |
|
goto out_unmap_regs; |
|
|
|
fb_set_cmap(&info->cmap, info); |
|
|
|
cg14_init_fix(info, linebytes, dp); |
|
|
|
err = register_framebuffer(info); |
|
if (err < 0) |
|
goto out_dealloc_cmap; |
|
|
|
dev_set_drvdata(&op->dev, info); |
|
|
|
printk(KERN_INFO "%pOF: cgfourteen at %lx:%lx, %dMB\n", |
|
dp, |
|
par->iospace, info->fix.smem_start, |
|
par->ramsize >> 20); |
|
|
|
return 0; |
|
|
|
out_dealloc_cmap: |
|
fb_dealloc_cmap(&info->cmap); |
|
|
|
out_unmap_regs: |
|
cg14_unmap_regs(op, info, par); |
|
framebuffer_release(info); |
|
|
|
out_err: |
|
return err; |
|
} |
|
|
|
static int cg14_remove(struct platform_device *op) |
|
{ |
|
struct fb_info *info = dev_get_drvdata(&op->dev); |
|
struct cg14_par *par = info->par; |
|
|
|
unregister_framebuffer(info); |
|
fb_dealloc_cmap(&info->cmap); |
|
|
|
cg14_unmap_regs(op, info, par); |
|
|
|
framebuffer_release(info); |
|
|
|
return 0; |
|
} |
|
|
|
static const struct of_device_id cg14_match[] = { |
|
{ |
|
.name = "cgfourteen", |
|
}, |
|
{}, |
|
}; |
|
MODULE_DEVICE_TABLE(of, cg14_match); |
|
|
|
static struct platform_driver cg14_driver = { |
|
.driver = { |
|
.name = "cg14", |
|
.of_match_table = cg14_match, |
|
}, |
|
.probe = cg14_probe, |
|
.remove = cg14_remove, |
|
}; |
|
|
|
static int __init cg14_init(void) |
|
{ |
|
if (fb_get_options("cg14fb", NULL)) |
|
return -ENODEV; |
|
|
|
return platform_driver_register(&cg14_driver); |
|
} |
|
|
|
static void __exit cg14_exit(void) |
|
{ |
|
platform_driver_unregister(&cg14_driver); |
|
} |
|
|
|
module_init(cg14_init); |
|
module_exit(cg14_exit); |
|
|
|
MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets"); |
|
MODULE_AUTHOR("David S. Miller <[email protected]>"); |
|
MODULE_VERSION("2.0"); |
|
MODULE_LICENSE("GPL");
|
|
|