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200 lines
6.5 KiB
200 lines
6.5 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* Driver for HiSilicon PCIe tune and trace device |
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* |
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* Copyright (c) 2022 HiSilicon Technologies Co., Ltd. |
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* Author: Yicong Yang <[email protected]> |
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*/ |
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#ifndef _HISI_PTT_H |
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#define _HISI_PTT_H |
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#include <linux/bits.h> |
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#include <linux/cpumask.h> |
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#include <linux/list.h> |
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#include <linux/mutex.h> |
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#include <linux/pci.h> |
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#include <linux/perf_event.h> |
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#include <linux/spinlock.h> |
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#include <linux/types.h> |
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#define DRV_NAME "hisi_ptt" |
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/* |
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* The definition of the device registers and register fields. |
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*/ |
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#define HISI_PTT_TUNING_CTRL 0x0000 |
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#define HISI_PTT_TUNING_CTRL_CODE GENMASK(15, 0) |
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#define HISI_PTT_TUNING_CTRL_SUB GENMASK(23, 16) |
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#define HISI_PTT_TUNING_DATA 0x0004 |
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#define HISI_PTT_TUNING_DATA_VAL_MASK GENMASK(15, 0) |
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#define HISI_PTT_TRACE_ADDR_SIZE 0x0800 |
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#define HISI_PTT_TRACE_ADDR_BASE_LO_0 0x0810 |
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#define HISI_PTT_TRACE_ADDR_BASE_HI_0 0x0814 |
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#define HISI_PTT_TRACE_ADDR_STRIDE 0x8 |
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#define HISI_PTT_TRACE_CTRL 0x0850 |
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#define HISI_PTT_TRACE_CTRL_EN BIT(0) |
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#define HISI_PTT_TRACE_CTRL_RST BIT(1) |
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#define HISI_PTT_TRACE_CTRL_RXTX_SEL GENMASK(3, 2) |
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#define HISI_PTT_TRACE_CTRL_TYPE_SEL GENMASK(7, 4) |
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#define HISI_PTT_TRACE_CTRL_DATA_FORMAT BIT(14) |
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#define HISI_PTT_TRACE_CTRL_FILTER_MODE BIT(15) |
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#define HISI_PTT_TRACE_CTRL_TARGET_SEL GENMASK(31, 16) |
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#define HISI_PTT_TRACE_INT_STAT 0x0890 |
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#define HISI_PTT_TRACE_INT_STAT_MASK GENMASK(3, 0) |
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#define HISI_PTT_TRACE_INT_MASK 0x0894 |
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#define HISI_PTT_TUNING_INT_STAT 0x0898 |
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#define HISI_PTT_TUNING_INT_STAT_MASK BIT(0) |
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#define HISI_PTT_TRACE_WR_STS 0x08a0 |
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#define HISI_PTT_TRACE_WR_STS_WRITE GENMASK(27, 0) |
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#define HISI_PTT_TRACE_WR_STS_BUFFER GENMASK(29, 28) |
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#define HISI_PTT_TRACE_STS 0x08b0 |
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#define HISI_PTT_TRACE_IDLE BIT(0) |
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#define HISI_PTT_DEVICE_RANGE 0x0fe0 |
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#define HISI_PTT_DEVICE_RANGE_UPPER GENMASK(31, 16) |
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#define HISI_PTT_DEVICE_RANGE_LOWER GENMASK(15, 0) |
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#define HISI_PTT_LOCATION 0x0fe8 |
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#define HISI_PTT_CORE_ID GENMASK(15, 0) |
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#define HISI_PTT_SICL_ID GENMASK(31, 16) |
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/* Parameters of PTT trace DMA part. */ |
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#define HISI_PTT_TRACE_DMA_IRQ 0 |
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#define HISI_PTT_TRACE_BUF_CNT 4 |
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#define HISI_PTT_TRACE_BUF_SIZE SZ_4M |
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#define HISI_PTT_TRACE_TOTAL_BUF_SIZE (HISI_PTT_TRACE_BUF_SIZE * \ |
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HISI_PTT_TRACE_BUF_CNT) |
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/* Wait time for hardware DMA to reset */ |
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#define HISI_PTT_RESET_TIMEOUT_US 10UL |
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#define HISI_PTT_RESET_POLL_INTERVAL_US 1UL |
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/* Poll timeout and interval for waiting hardware work to finish */ |
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#define HISI_PTT_WAIT_TUNE_TIMEOUT_US 1000000UL |
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#define HISI_PTT_WAIT_TRACE_TIMEOUT_US 100UL |
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#define HISI_PTT_WAIT_POLL_INTERVAL_US 10UL |
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#define HISI_PCIE_CORE_PORT_ID(devfn) ((PCI_SLOT(devfn) & 0x7) << 1) |
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/* Definition of the PMU configs */ |
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#define HISI_PTT_PMU_FILTER_IS_PORT BIT(19) |
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#define HISI_PTT_PMU_FILTER_VAL_MASK GENMASK(15, 0) |
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#define HISI_PTT_PMU_DIRECTION_MASK GENMASK(23, 20) |
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#define HISI_PTT_PMU_TYPE_MASK GENMASK(31, 24) |
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#define HISI_PTT_PMU_FORMAT_MASK GENMASK(35, 32) |
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/** |
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* struct hisi_ptt_tune_desc - Describe tune event for PTT tune |
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* @hisi_ptt: PTT device this tune event belongs to |
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* @name: name of this event |
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* @event_code: code of the event |
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*/ |
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struct hisi_ptt_tune_desc { |
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struct hisi_ptt *hisi_ptt; |
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const char *name; |
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u32 event_code; |
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}; |
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/** |
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* struct hisi_ptt_dma_buffer - Describe a single trace buffer of PTT trace. |
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* The detail of the data format is described |
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* in the documentation of PTT device. |
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* @dma: DMA address of this buffer visible to the device |
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* @addr: virtual address of this buffer visible to the cpu |
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*/ |
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struct hisi_ptt_dma_buffer { |
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dma_addr_t dma; |
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void *addr; |
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}; |
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/** |
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* struct hisi_ptt_trace_ctrl - Control and status of PTT trace |
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* @trace_buf: array of the trace buffers for holding the trace data. |
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* the length will be HISI_PTT_TRACE_BUF_CNT. |
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* @handle: perf output handle of current trace session |
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* @buf_index: the index of current using trace buffer |
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* @on_cpu: current tracing cpu |
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* @started: current trace status, true for started |
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* @is_port: whether we're tracing root port or not |
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* @direction: direction of the TLP headers to trace |
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* @filter: filter value for tracing the TLP headers |
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* @format: format of the TLP headers to trace |
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* @type: type of the TLP headers to trace |
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*/ |
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struct hisi_ptt_trace_ctrl { |
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struct hisi_ptt_dma_buffer *trace_buf; |
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struct perf_output_handle handle; |
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u32 buf_index; |
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int on_cpu; |
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bool started; |
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bool is_port; |
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u32 direction:2; |
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u32 filter:16; |
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u32 format:1; |
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u32 type:4; |
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}; |
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/** |
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* struct hisi_ptt_filter_desc - Descriptor of the PTT trace filter |
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* @list: entry of this descriptor in the filter list |
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* @is_port: the PCI device of the filter is a Root Port or not |
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* @devid: the PCI device's devid of the filter |
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*/ |
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struct hisi_ptt_filter_desc { |
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struct list_head list; |
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bool is_port; |
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u16 devid; |
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}; |
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/** |
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* struct hisi_ptt_pmu_buf - Descriptor of the AUX buffer of PTT trace |
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* @length: size of the AUX buffer |
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* @nr_pages: number of pages of the AUX buffer |
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* @base: start address of AUX buffer |
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* @pos: position in the AUX buffer to commit traced data |
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*/ |
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struct hisi_ptt_pmu_buf { |
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size_t length; |
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int nr_pages; |
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void *base; |
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long pos; |
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}; |
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/** |
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* struct hisi_ptt - Per PTT device data |
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* @trace_ctrl: the control information of PTT trace |
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* @hotplug_node: node for register cpu hotplug event |
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* @hisi_ptt_pmu: the pum device of trace |
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* @iobase: base IO address of the device |
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* @pdev: pci_dev of this PTT device |
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* @tune_lock: lock to serialize the tune process |
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* @pmu_lock: lock to serialize the perf process |
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* @upper_bdf: the upper BDF range of the PCI devices managed by this PTT device |
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* @lower_bdf: the lower BDF range of the PCI devices managed by this PTT device |
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* @port_filters: the filter list of root ports |
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* @req_filters: the filter list of requester ID |
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* @port_mask: port mask of the managed root ports |
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*/ |
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struct hisi_ptt { |
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struct hisi_ptt_trace_ctrl trace_ctrl; |
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struct hlist_node hotplug_node; |
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struct pmu hisi_ptt_pmu; |
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void __iomem *iobase; |
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struct pci_dev *pdev; |
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struct mutex tune_lock; |
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spinlock_t pmu_lock; |
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u32 upper_bdf; |
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u32 lower_bdf; |
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/* |
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* The trace TLP headers can either be filtered by certain |
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* root port, or by the requester ID. Organize the filters |
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* by @port_filters and @req_filters here. The mask of all |
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* the valid ports is also cached for doing sanity check |
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* of user input. |
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*/ |
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struct list_head port_filters; |
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struct list_head req_filters; |
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u16 port_mask; |
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}; |
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#define to_hisi_ptt(pmu) container_of(pmu, struct hisi_ptt, hisi_ptt_pmu) |
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#endif /* _HISI_PTT_H */
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