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36 lines
1.5 KiB
36 lines
1.5 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright (c) 2022 NVIDIA Corporation. |
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*/ |
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#define HOST1X_CHANNEL_DMASTART 0x0000 |
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#define HOST1X_CHANNEL_DMASTART_HI 0x0004 |
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#define HOST1X_CHANNEL_DMAPUT 0x0008 |
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#define HOST1X_CHANNEL_DMAPUT_HI 0x000c |
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#define HOST1X_CHANNEL_DMAGET 0x0010 |
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#define HOST1X_CHANNEL_DMAGET_HI 0x0014 |
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#define HOST1X_CHANNEL_DMAEND 0x0018 |
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#define HOST1X_CHANNEL_DMAEND_HI 0x001c |
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#define HOST1X_CHANNEL_DMACTRL 0x0020 |
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#define HOST1X_CHANNEL_DMACTRL_DMASTOP BIT(0) |
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#define HOST1X_CHANNEL_DMACTRL_DMAGETRST BIT(1) |
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#define HOST1X_CHANNEL_DMACTRL_DMAINITGET BIT(2) |
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#define HOST1X_CHANNEL_CMDFIFO_STAT 0x0024 |
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#define HOST1X_CHANNEL_CMDFIFO_STAT_EMPTY BIT(13) |
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#define HOST1X_CHANNEL_CMDFIFO_RDATA 0x0028 |
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#define HOST1X_CHANNEL_CMDP_OFFSET 0x0030 |
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#define HOST1X_CHANNEL_CMDP_CLASS 0x0034 |
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#define HOST1X_CHANNEL_CHANNELSTAT 0x0038 |
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#define HOST1X_CHANNEL_CMDPROC_STOP 0x0048 |
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#define HOST1X_CHANNEL_TEARDOWN 0x004c |
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#define HOST1X_CHANNEL_SMMU_STREAMID 0x0084 |
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#define HOST1X_SYNC_SYNCPT_CPU_INCR(x) (0x6400 + 4 * (x)) |
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#define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(x) (0x6600 + 4 * (x)) |
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#define HOST1X_SYNC_SYNCPT_INTR_DEST(x) (0x6684 + 4 * (x)) |
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#define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(x) (0x770c + 4 * (x)) |
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#define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(x) (0x7790 + 4 * (x)) |
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#define HOST1X_SYNC_SYNCPT(x) (0x8080 + 4 * (x)) |
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#define HOST1X_SYNC_SYNCPT_INT_THRESH(x) (0xa088 + 4 * (x)) |
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#define HOST1X_SYNC_SYNCPT_CH_APP(x) (0xb090 + 4 * (x)) |
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#define HOST1X_SYNC_SYNCPT_CH_APP_CH(v) (((v) & 0x3f) << 8)
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