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211 lines
5.5 KiB
211 lines
5.5 KiB
# SPDX-License-Identifier: GPL-2.0 |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/arm/arm,cci-400.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: ARM CCI Cache Coherent Interconnect Device Tree Binding |
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maintainers: |
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- Lorenzo Pieralisi <[email protected]> |
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description: > |
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ARM multi-cluster systems maintain intra-cluster coherency through a cache |
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coherent interconnect (CCI) that is capable of monitoring bus transactions |
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and manage coherency, TLB invalidations and memory barriers. |
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It allows snooping and distributed virtual memory message broadcast across |
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clusters, through memory mapped interface, with a global control register |
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space and multiple sets of interface control registers, one per slave |
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interface. |
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properties: |
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$nodename: |
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pattern: "^cci(@[0-9a-f]+)?$" |
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compatible: |
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enum: |
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- arm,cci-400 |
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- arm,cci-500 |
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- arm,cci-550 |
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reg: |
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maxItems: 1 |
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description: > |
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Specifies base physical address of CCI control registers common to all |
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interfaces. |
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"#address-cells": true |
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"#size-cells": true |
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ranges: true |
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patternProperties: |
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"^slave-if@[0-9a-f]+$": |
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type: object |
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properties: |
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compatible: |
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const: arm,cci-400-ctrl-if |
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interface-type: |
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enum: |
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- ace |
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- ace-lite |
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reg: |
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maxItems: 1 |
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required: |
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- compatible |
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- interface-type |
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- reg |
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additionalProperties: false |
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"^pmu@[0-9a-f]+$": |
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type: object |
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properties: |
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compatible: |
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oneOf: |
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- const: arm,cci-400-pmu,r0 |
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- const: arm,cci-400-pmu,r1 |
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- const: arm,cci-400-pmu |
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deprecated: true |
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description: > |
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Permitted only where OS has secure access to CCI registers |
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- const: arm,cci-500-pmu,r0 |
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- const: arm,cci-550-pmu,r0 |
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interrupts: |
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minItems: 1 |
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maxItems: 8 |
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description: > |
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List of counter overflow interrupts, one per counter. The interrupts |
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must be specified starting with the cycle counter overflow interrupt, |
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followed by counter0 overflow interrupt, counter1 overflow |
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interrupt,... ,counterN overflow interrupt. |
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The CCI PMU has an interrupt signal for each counter. The number of |
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interrupts must be equal to the number of counters. |
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reg: |
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maxItems: 1 |
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required: |
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- compatible |
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- interrupts |
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- reg |
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additionalProperties: false |
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required: |
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- "#address-cells" |
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- "#size-cells" |
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- compatible |
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- ranges |
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- reg |
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additionalProperties: false |
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examples: |
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- | |
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/ { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress"; |
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model = "V2P-CA15_CA7"; |
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arm,hbi = <0x249>; |
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interrupt-parent = <&gic>; |
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gic: interrupt-controller { |
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interrupt-controller; |
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#interrupt-cells = <3>; |
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}; |
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/* |
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* This CCI node corresponds to a CCI component whose control |
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* registers sits at address 0x000000002c090000. |
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* |
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* CCI slave interface @0x000000002c091000 is connected to dma |
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* controller dma0. |
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* |
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* CCI slave interface @0x000000002c094000 is connected to CPUs |
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* {CPU0, CPU1}; |
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* |
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* CCI slave interface @0x000000002c095000 is connected to CPUs |
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* {CPU2, CPU3}; |
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*/ |
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cpus { |
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#size-cells = <0>; |
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#address-cells = <1>; |
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CPU0: cpu@0 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a15"; |
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cci-control-port = <&cci_control1>; |
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reg = <0x0>; |
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}; |
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CPU1: cpu@1 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a15"; |
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cci-control-port = <&cci_control1>; |
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reg = <0x1>; |
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}; |
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CPU2: cpu@100 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a7"; |
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cci-control-port = <&cci_control2>; |
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reg = <0x100>; |
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}; |
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CPU3: cpu@101 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a7"; |
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cci-control-port = <&cci_control2>; |
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reg = <0x101>; |
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}; |
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}; |
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cci@2c090000 { |
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compatible = "arm,cci-400"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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reg = <0x0 0x2c090000 0 0x1000>; |
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ranges = <0x0 0x0 0x2c090000 0x10000>; |
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cci_control0: slave-if@1000 { |
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compatible = "arm,cci-400-ctrl-if"; |
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interface-type = "ace-lite"; |
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reg = <0x1000 0x1000>; |
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}; |
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cci_control1: slave-if@4000 { |
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compatible = "arm,cci-400-ctrl-if"; |
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interface-type = "ace"; |
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reg = <0x4000 0x1000>; |
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}; |
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cci_control2: slave-if@5000 { |
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compatible = "arm,cci-400-ctrl-if"; |
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interface-type = "ace"; |
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reg = <0x5000 0x1000>; |
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}; |
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pmu@9000 { |
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compatible = "arm,cci-400-pmu"; |
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reg = <0x9000 0x5000>; |
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interrupts = <0 101 4>, |
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<0 102 4>, |
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<0 103 4>, |
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<0 104 4>, |
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<0 105 4>; |
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}; |
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}; |
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}; |
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...
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