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26 lines
775 B
26 lines
775 B
[ |
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{ |
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"EventCode": "0x6", |
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"Counter": "0,1", |
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"UMask": "0x80", |
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"EventName": "SEGMENT_REG_LOADS.ANY", |
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"SampleAfterValue": "200000", |
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"BriefDescription": "Number of segment register loads." |
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}, |
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{ |
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"EventCode": "0x9", |
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"Counter": "0,1", |
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"UMask": "0x20", |
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"EventName": "DISPATCH_BLOCKED.ANY", |
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"SampleAfterValue": "200000", |
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"BriefDescription": "Memory cluster signals to block micro-op dispatch for any reason" |
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}, |
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{ |
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"EventCode": "0x3A", |
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"Counter": "0,1", |
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"UMask": "0x0", |
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"EventName": "EIST_TRANS", |
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"SampleAfterValue": "200000", |
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"BriefDescription": "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions" |
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} |
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] |