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64 lines
1.5 KiB
64 lines
1.5 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* Copyright (C) 2004 Olof Johansson <[email protected]>, IBM Corporation |
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*/ |
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#ifndef _POWERPC_SYSDEV_DART_H |
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#define _POWERPC_SYSDEV_DART_H |
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/* Offset from base to control register */ |
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#define DART_CNTL 0 |
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/* Offset from base to exception register */ |
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#define DART_EXCP_U3 0x10 |
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/* Offset from base to TLB tag registers */ |
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#define DART_TAGS_U3 0x1000 |
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/* U4 registers */ |
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#define DART_BASE_U4 0x10 |
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#define DART_SIZE_U4 0x20 |
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#define DART_EXCP_U4 0x30 |
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#define DART_TAGS_U4 0x1000 |
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/* Control Register fields */ |
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/* U3 registers */ |
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#define DART_CNTL_U3_BASE_MASK 0xfffff |
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#define DART_CNTL_U3_BASE_SHIFT 12 |
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#define DART_CNTL_U3_FLUSHTLB 0x400 |
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#define DART_CNTL_U3_ENABLE 0x200 |
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#define DART_CNTL_U3_SIZE_MASK 0x1ff |
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#define DART_CNTL_U3_SIZE_SHIFT 0 |
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/* U4 registers */ |
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#define DART_BASE_U4_BASE_MASK 0xffffff |
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#define DART_BASE_U4_BASE_SHIFT 0 |
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#define DART_CNTL_U4_ENABLE 0x80000000 |
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#define DART_CNTL_U4_IONE 0x40000000 |
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#define DART_CNTL_U4_FLUSHTLB 0x20000000 |
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#define DART_CNTL_U4_IDLE 0x10000000 |
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#define DART_CNTL_U4_PAR_EN 0x08000000 |
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#define DART_CNTL_U4_IONE_MASK 0x07ffffff |
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#define DART_SIZE_U4_SIZE_MASK 0x1fff |
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#define DART_SIZE_U4_SIZE_SHIFT 0 |
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#define DART_REG(r) (dart + ((r) >> 2)) |
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#define DART_IN(r) (in_be32(DART_REG(r))) |
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#define DART_OUT(r,v) (out_be32(DART_REG(r), (v))) |
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/* size of table in pages */ |
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/* DART table fields */ |
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#define DARTMAP_VALID 0x80000000 |
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#define DARTMAP_RPNMASK 0x00ffffff |
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#define DART_PAGE_SHIFT 12 |
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#define DART_PAGE_SIZE (1 << DART_PAGE_SHIFT) |
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#endif /* _POWERPC_SYSDEV_DART_H */
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