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1092 lines
29 KiB
1092 lines
29 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* 64-bit pSeries and RS/6000 setup code. |
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* |
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* Copyright (C) 1995 Linus Torvalds |
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* Adapted from 'alpha' version by Gary Thomas |
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* Modified by Cort Dougan ([email protected]) |
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* Modified by PPC64 Team, IBM Corp |
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*/ |
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|
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/* |
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* bootup setup stuff.. |
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*/ |
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|
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#include <linux/cpu.h> |
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#include <linux/errno.h> |
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#include <linux/sched.h> |
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#include <linux/kernel.h> |
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#include <linux/mm.h> |
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#include <linux/stddef.h> |
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#include <linux/unistd.h> |
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#include <linux/user.h> |
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#include <linux/tty.h> |
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#include <linux/major.h> |
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#include <linux/interrupt.h> |
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#include <linux/reboot.h> |
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#include <linux/init.h> |
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#include <linux/ioport.h> |
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#include <linux/console.h> |
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#include <linux/pci.h> |
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#include <linux/utsname.h> |
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#include <linux/adb.h> |
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#include <linux/export.h> |
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#include <linux/delay.h> |
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#include <linux/irq.h> |
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#include <linux/seq_file.h> |
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#include <linux/root_dev.h> |
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#include <linux/of.h> |
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#include <linux/of_pci.h> |
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#include <linux/memblock.h> |
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#include <linux/swiotlb.h> |
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|
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#include <asm/mmu.h> |
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#include <asm/processor.h> |
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#include <asm/io.h> |
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#include <asm/prom.h> |
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#include <asm/rtas.h> |
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#include <asm/pci-bridge.h> |
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#include <asm/iommu.h> |
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#include <asm/dma.h> |
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#include <asm/machdep.h> |
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#include <asm/irq.h> |
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#include <asm/time.h> |
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#include <asm/nvram.h> |
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#include <asm/pmc.h> |
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#include <asm/xics.h> |
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#include <asm/xive.h> |
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#include <asm/ppc-pci.h> |
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#include <asm/i8259.h> |
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#include <asm/udbg.h> |
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#include <asm/smp.h> |
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#include <asm/firmware.h> |
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#include <asm/eeh.h> |
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#include <asm/reg.h> |
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#include <asm/plpar_wrappers.h> |
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#include <asm/kexec.h> |
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#include <asm/isa-bridge.h> |
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#include <asm/security_features.h> |
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#include <asm/asm-const.h> |
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#include <asm/idle.h> |
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#include <asm/swiotlb.h> |
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#include <asm/svm.h> |
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#include <asm/dtl.h> |
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#include <asm/hvconsole.h> |
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|
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#include "pseries.h" |
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#include "../../../../drivers/pci/pci.h" |
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|
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DEFINE_STATIC_KEY_FALSE(shared_processor); |
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EXPORT_SYMBOL_GPL(shared_processor); |
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|
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int CMO_PrPSP = -1; |
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int CMO_SecPSP = -1; |
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unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); |
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EXPORT_SYMBOL(CMO_PageSize); |
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int fwnmi_active; /* TRUE if an FWNMI handler is present */ |
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int ibm_nmi_interlock_token; |
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u32 pseries_security_flavor; |
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static void pSeries_show_cpuinfo(struct seq_file *m) |
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{ |
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struct device_node *root; |
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const char *model = ""; |
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root = of_find_node_by_path("/"); |
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if (root) |
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model = of_get_property(root, "model", NULL); |
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seq_printf(m, "machine\t\t: CHRP %s\n", model); |
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of_node_put(root); |
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if (radix_enabled()) |
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seq_printf(m, "MMU\t\t: Radix\n"); |
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else |
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seq_printf(m, "MMU\t\t: Hash\n"); |
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} |
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|
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/* Initialize firmware assisted non-maskable interrupts if |
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* the firmware supports this feature. |
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*/ |
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static void __init fwnmi_init(void) |
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{ |
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unsigned long system_reset_addr, machine_check_addr; |
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u8 *mce_data_buf; |
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unsigned int i; |
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int nr_cpus = num_possible_cpus(); |
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#ifdef CONFIG_PPC_BOOK3S_64 |
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struct slb_entry *slb_ptr; |
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size_t size; |
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#endif |
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int ibm_nmi_register_token; |
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ibm_nmi_register_token = rtas_token("ibm,nmi-register"); |
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if (ibm_nmi_register_token == RTAS_UNKNOWN_SERVICE) |
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return; |
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ibm_nmi_interlock_token = rtas_token("ibm,nmi-interlock"); |
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if (WARN_ON(ibm_nmi_interlock_token == RTAS_UNKNOWN_SERVICE)) |
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return; |
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/* If the kernel's not linked at zero we point the firmware at low |
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* addresses anyway, and use a trampoline to get to the real code. */ |
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system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; |
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machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; |
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if (0 == rtas_call(ibm_nmi_register_token, 2, 1, NULL, |
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system_reset_addr, machine_check_addr)) |
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fwnmi_active = 1; |
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|
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/* |
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* Allocate a chunk for per cpu buffer to hold rtas errorlog. |
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* It will be used in real mode mce handler, hence it needs to be |
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* below RMA. |
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*/ |
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mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus, |
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RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT, |
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ppc64_rma_size, NUMA_NO_NODE); |
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if (!mce_data_buf) |
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panic("Failed to allocate %d bytes below %pa for MCE buffer\n", |
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RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size); |
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|
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for_each_possible_cpu(i) { |
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paca_ptrs[i]->mce_data_buf = mce_data_buf + |
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(RTAS_ERROR_LOG_MAX * i); |
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} |
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#ifdef CONFIG_PPC_BOOK3S_64 |
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if (!radix_enabled()) { |
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/* Allocate per cpu area to save old slb contents during MCE */ |
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size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus; |
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slb_ptr = memblock_alloc_try_nid_raw(size, |
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sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT, |
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ppc64_rma_size, NUMA_NO_NODE); |
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if (!slb_ptr) |
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panic("Failed to allocate %zu bytes below %pa for slb area\n", |
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size, &ppc64_rma_size); |
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for_each_possible_cpu(i) |
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paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i); |
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} |
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#endif |
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} |
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static void pseries_8259_cascade(struct irq_desc *desc) |
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{ |
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struct irq_chip *chip = irq_desc_get_chip(desc); |
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unsigned int cascade_irq = i8259_irq(); |
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if (cascade_irq) |
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generic_handle_irq(cascade_irq); |
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chip->irq_eoi(&desc->irq_data); |
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} |
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static void __init pseries_setup_i8259_cascade(void) |
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{ |
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struct device_node *np, *old, *found = NULL; |
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unsigned int cascade; |
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const u32 *addrp; |
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unsigned long intack = 0; |
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int naddr; |
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for_each_node_by_type(np, "interrupt-controller") { |
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if (of_device_is_compatible(np, "chrp,iic")) { |
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found = np; |
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break; |
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} |
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} |
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if (found == NULL) { |
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printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); |
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return; |
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} |
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cascade = irq_of_parse_and_map(found, 0); |
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if (!cascade) { |
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printk(KERN_ERR "pic: failed to map cascade interrupt"); |
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return; |
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} |
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pr_debug("pic: cascade mapped to irq %d\n", cascade); |
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for (old = of_node_get(found); old != NULL ; old = np) { |
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np = of_get_parent(old); |
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of_node_put(old); |
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if (np == NULL) |
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break; |
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if (!of_node_name_eq(np, "pci")) |
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continue; |
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addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); |
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if (addrp == NULL) |
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continue; |
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naddr = of_n_addr_cells(np); |
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intack = addrp[naddr-1]; |
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if (naddr > 1) |
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intack |= ((unsigned long)addrp[naddr-2]) << 32; |
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} |
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if (intack) |
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printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); |
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i8259_init(found, intack); |
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of_node_put(found); |
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irq_set_chained_handler(cascade, pseries_8259_cascade); |
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} |
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static void __init pseries_init_irq(void) |
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{ |
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/* Try using a XIVE if available, otherwise use a XICS */ |
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if (!xive_spapr_init()) { |
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xics_init(); |
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pseries_setup_i8259_cascade(); |
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} |
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} |
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static void pseries_lpar_enable_pmcs(void) |
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{ |
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unsigned long set, reset; |
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set = 1UL << 63; |
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reset = 0; |
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plpar_hcall_norets(H_PERFMON, set, reset); |
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} |
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static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) |
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{ |
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struct of_reconfig_data *rd = data; |
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struct device_node *parent, *np = rd->dn; |
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struct pci_dn *pdn; |
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int err = NOTIFY_OK; |
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switch (action) { |
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case OF_RECONFIG_ATTACH_NODE: |
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parent = of_get_parent(np); |
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pdn = parent ? PCI_DN(parent) : NULL; |
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if (pdn) |
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pci_add_device_node_info(pdn->phb, np); |
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|
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of_node_put(parent); |
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break; |
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case OF_RECONFIG_DETACH_NODE: |
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pdn = PCI_DN(np); |
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if (pdn) |
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list_del(&pdn->list); |
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break; |
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default: |
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err = NOTIFY_DONE; |
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break; |
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} |
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return err; |
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} |
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static struct notifier_block pci_dn_reconfig_nb = { |
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.notifier_call = pci_dn_reconfig_notifier, |
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}; |
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struct kmem_cache *dtl_cache; |
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE |
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/* |
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* Allocate space for the dispatch trace log for all possible cpus |
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* and register the buffers with the hypervisor. This is used for |
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* computing time stolen by the hypervisor. |
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*/ |
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static int alloc_dispatch_logs(void) |
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{ |
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if (!firmware_has_feature(FW_FEATURE_SPLPAR)) |
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return 0; |
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if (!dtl_cache) |
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return 0; |
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alloc_dtl_buffers(0); |
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/* Register the DTL for the current (boot) cpu */ |
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register_dtl_buffer(smp_processor_id()); |
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return 0; |
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} |
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#else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
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static inline int alloc_dispatch_logs(void) |
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{ |
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return 0; |
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} |
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#endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
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static int alloc_dispatch_log_kmem_cache(void) |
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{ |
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void (*ctor)(void *) = get_dtl_cache_ctor(); |
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dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, |
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DISPATCH_LOG_BYTES, 0, ctor); |
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if (!dtl_cache) { |
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pr_warn("Failed to create dispatch trace log buffer cache\n"); |
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pr_warn("Stolen time statistics will be unreliable\n"); |
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return 0; |
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} |
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return alloc_dispatch_logs(); |
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} |
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machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); |
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DEFINE_PER_CPU(u64, idle_spurr_cycles); |
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DEFINE_PER_CPU(u64, idle_entry_purr_snap); |
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DEFINE_PER_CPU(u64, idle_entry_spurr_snap); |
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static void pseries_lpar_idle(void) |
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{ |
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/* |
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* Default handler to go into low thread priority and possibly |
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* low power mode by ceding processor to hypervisor |
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*/ |
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|
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if (!prep_irq_for_idle()) |
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return; |
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|
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/* Indicate to hypervisor that we are idle. */ |
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pseries_idle_prolog(); |
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|
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/* |
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* Yield the processor to the hypervisor. We return if |
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* an external interrupt occurs (which are driven prior |
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* to returning here) or if a prod occurs from another |
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* processor. When returning here, external interrupts |
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* are enabled. |
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*/ |
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cede_processor(); |
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|
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pseries_idle_epilog(); |
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} |
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|
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/* |
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* Enable relocation on during exceptions. This has partition wide scope and |
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* may take a while to complete, if it takes longer than one second we will |
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* just give up rather than wasting any more time on this - if that turns out |
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* to ever be a problem in practice we can move this into a kernel thread to |
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* finish off the process later in boot. |
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*/ |
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bool pseries_enable_reloc_on_exc(void) |
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{ |
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long rc; |
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unsigned int delay, total_delay = 0; |
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|
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while (1) { |
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rc = enable_reloc_on_exceptions(); |
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if (!H_IS_LONG_BUSY(rc)) { |
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if (rc == H_P2) { |
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pr_info("Relocation on exceptions not" |
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" supported\n"); |
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return false; |
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} else if (rc != H_SUCCESS) { |
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pr_warn("Unable to enable relocation" |
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" on exceptions: %ld\n", rc); |
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return false; |
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} |
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return true; |
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} |
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delay = get_longbusy_msecs(rc); |
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total_delay += delay; |
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if (total_delay > 1000) { |
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pr_warn("Warning: Giving up waiting to enable " |
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"relocation on exceptions (%u msec)!\n", |
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total_delay); |
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return false; |
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} |
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|
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mdelay(delay); |
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} |
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} |
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EXPORT_SYMBOL(pseries_enable_reloc_on_exc); |
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|
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void pseries_disable_reloc_on_exc(void) |
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{ |
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long rc; |
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|
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while (1) { |
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rc = disable_reloc_on_exceptions(); |
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if (!H_IS_LONG_BUSY(rc)) |
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break; |
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mdelay(get_longbusy_msecs(rc)); |
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} |
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if (rc != H_SUCCESS) |
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pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n", |
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rc); |
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} |
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EXPORT_SYMBOL(pseries_disable_reloc_on_exc); |
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|
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#ifdef CONFIG_KEXEC_CORE |
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static void pSeries_machine_kexec(struct kimage *image) |
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{ |
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if (firmware_has_feature(FW_FEATURE_SET_MODE)) |
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pseries_disable_reloc_on_exc(); |
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|
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default_machine_kexec(image); |
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} |
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#endif |
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#ifdef __LITTLE_ENDIAN__ |
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void pseries_big_endian_exceptions(void) |
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{ |
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long rc; |
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|
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while (1) { |
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rc = enable_big_endian_exceptions(); |
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if (!H_IS_LONG_BUSY(rc)) |
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break; |
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mdelay(get_longbusy_msecs(rc)); |
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} |
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|
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/* |
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* At this point it is unlikely panic() will get anything |
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* out to the user, since this is called very late in kexec |
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* but at least this will stop us from continuing on further |
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* and creating an even more difficult to debug situation. |
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* |
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* There is a known problem when kdump'ing, if cpus are offline |
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* the above call will fail. Rather than panicking again, keep |
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* going and hope the kdump kernel is also little endian, which |
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* it usually is. |
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*/ |
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if (rc && !kdump_in_progress()) |
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panic("Could not enable big endian exceptions"); |
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} |
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|
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void pseries_little_endian_exceptions(void) |
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{ |
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long rc; |
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|
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while (1) { |
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rc = enable_little_endian_exceptions(); |
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if (!H_IS_LONG_BUSY(rc)) |
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break; |
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mdelay(get_longbusy_msecs(rc)); |
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} |
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if (rc) { |
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ppc_md.progress("H_SET_MODE LE exception fail", 0); |
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panic("Could not enable little endian exceptions"); |
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} |
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} |
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#endif |
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|
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static void __init pSeries_discover_phbs(void) |
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{ |
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struct device_node *node; |
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struct pci_controller *phb; |
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struct device_node *root = of_find_node_by_path("/"); |
|
|
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for_each_child_of_node(root, node) { |
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if (!of_node_is_type(node, "pci") && |
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!of_node_is_type(node, "pciex")) |
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continue; |
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|
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phb = pcibios_alloc_controller(node); |
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if (!phb) |
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continue; |
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rtas_setup_phb(phb); |
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pci_process_bridge_OF_ranges(phb, node, 0); |
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isa_bridge_find_early(phb); |
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phb->controller_ops = pseries_pci_controller_ops; |
|
|
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/* create pci_dn's for DT nodes under this PHB */ |
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pci_devs_phb_init_dynamic(phb); |
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} |
|
|
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of_node_put(root); |
|
|
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/* |
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* PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties |
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* in chosen. |
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*/ |
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of_pci_check_probe_only(); |
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} |
|
|
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static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) |
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{ |
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/* |
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* The features below are disabled by default, so we instead look to see |
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* if firmware has *enabled* them, and set them if so. |
|
*/ |
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if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31) |
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security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); |
|
|
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if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED) |
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security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); |
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|
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if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30) |
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security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); |
|
|
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if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2) |
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security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); |
|
|
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if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV) |
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security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); |
|
|
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if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) |
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security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); |
|
|
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if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) |
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security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); |
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|
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if (result->character & H_CPU_CHAR_BCCTR_LINK_FLUSH_ASSIST) |
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security_ftr_set(SEC_FTR_BCCTR_LINK_FLUSH_ASSIST); |
|
|
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if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE) |
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security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); |
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|
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if (result->behaviour & H_CPU_BEHAV_FLUSH_LINK_STACK) |
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security_ftr_set(SEC_FTR_FLUSH_LINK_STACK); |
|
|
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/* |
|
* The features below are enabled by default, so we instead look to see |
|
* if firmware has *disabled* them, and clear them if so. |
|
* H_CPU_BEHAV_FAVOUR_SECURITY_H could be set only if |
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* H_CPU_BEHAV_FAVOUR_SECURITY is. |
|
*/ |
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if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) |
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security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); |
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else if (result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY_H) |
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pseries_security_flavor = 1; |
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else |
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pseries_security_flavor = 2; |
|
|
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if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) |
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security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); |
|
|
|
if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY) |
|
security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY); |
|
|
|
if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS) |
|
security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS); |
|
|
|
if (result->behaviour & H_CPU_BEHAV_NO_STF_BARRIER) |
|
security_ftr_clear(SEC_FTR_STF_BARRIER); |
|
|
|
if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR)) |
|
security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); |
|
} |
|
|
|
void pseries_setup_security_mitigations(void) |
|
{ |
|
struct h_cpu_char_result result; |
|
enum l1d_flush_type types; |
|
bool enable; |
|
long rc; |
|
|
|
/* |
|
* Set features to the defaults assumed by init_cpu_char_feature_flags() |
|
* so it can set/clear again any features that might have changed after |
|
* migration, and in case the hypercall fails and it is not even called. |
|
*/ |
|
powerpc_security_features = SEC_FTR_DEFAULT; |
|
|
|
rc = plpar_get_cpu_characteristics(&result); |
|
if (rc == H_SUCCESS) |
|
init_cpu_char_feature_flags(&result); |
|
|
|
/* |
|
* We're the guest so this doesn't apply to us, clear it to simplify |
|
* handling of it elsewhere. |
|
*/ |
|
security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); |
|
|
|
types = L1D_FLUSH_FALLBACK; |
|
|
|
if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) |
|
types |= L1D_FLUSH_MTTRIG; |
|
|
|
if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) |
|
types |= L1D_FLUSH_ORI; |
|
|
|
enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ |
|
security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); |
|
|
|
setup_rfi_flush(types, enable); |
|
setup_count_cache_flush(); |
|
|
|
enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && |
|
security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY); |
|
setup_entry_flush(enable); |
|
|
|
enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && |
|
security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS); |
|
setup_uaccess_flush(enable); |
|
|
|
setup_stf_barrier(); |
|
} |
|
|
|
#ifdef CONFIG_PCI_IOV |
|
enum rtas_iov_fw_value_map { |
|
NUM_RES_PROPERTY = 0, /* Number of Resources */ |
|
LOW_INT = 1, /* Lowest 32 bits of Address */ |
|
START_OF_ENTRIES = 2, /* Always start of entry */ |
|
APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */ |
|
WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */ |
|
NEXT_ENTRY = 7 /* Go to next entry on array */ |
|
}; |
|
|
|
enum get_iov_fw_value_index { |
|
BAR_ADDRS = 1, /* Get Bar Address */ |
|
APERTURE_SIZE = 2, /* Get Aperture Size */ |
|
WDW_SIZE = 3 /* Get Window Size */ |
|
}; |
|
|
|
static resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno, |
|
enum get_iov_fw_value_index value) |
|
{ |
|
const int *indexes; |
|
struct device_node *dn = pci_device_to_OF_node(dev); |
|
int i, num_res, ret = 0; |
|
|
|
indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); |
|
if (!indexes) |
|
return 0; |
|
|
|
/* |
|
* First element in the array is the number of Bars |
|
* returned. Search through the list to find the matching |
|
* bar |
|
*/ |
|
num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); |
|
if (resno >= num_res) |
|
return 0; /* or an errror */ |
|
|
|
i = START_OF_ENTRIES + NEXT_ENTRY * resno; |
|
switch (value) { |
|
case BAR_ADDRS: |
|
ret = of_read_number(&indexes[i], 2); |
|
break; |
|
case APERTURE_SIZE: |
|
ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); |
|
break; |
|
case WDW_SIZE: |
|
ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); |
|
break; |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
static void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes) |
|
{ |
|
struct resource *res; |
|
resource_size_t base, size; |
|
int i, r, num_res; |
|
|
|
num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); |
|
num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS); |
|
for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; |
|
i += NEXT_ENTRY, r++) { |
|
res = &dev->resource[r + PCI_IOV_RESOURCES]; |
|
base = of_read_number(&indexes[i], 2); |
|
size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); |
|
res->flags = pci_parse_of_flags(of_read_number |
|
(&indexes[i + LOW_INT], 1), 0); |
|
res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED); |
|
res->name = pci_name(dev); |
|
res->start = base; |
|
res->end = base + size - 1; |
|
} |
|
} |
|
|
|
static void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes) |
|
{ |
|
struct resource *res, *root, *conflict; |
|
resource_size_t base, size; |
|
int i, r, num_res; |
|
|
|
/* |
|
* First element in the array is the number of Bars |
|
* returned. Search through the list to find the matching |
|
* bars assign them from firmware into resources structure. |
|
*/ |
|
num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); |
|
for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; |
|
i += NEXT_ENTRY, r++) { |
|
res = &dev->resource[r + PCI_IOV_RESOURCES]; |
|
base = of_read_number(&indexes[i], 2); |
|
size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); |
|
res->name = pci_name(dev); |
|
res->start = base; |
|
res->end = base + size - 1; |
|
root = &iomem_resource; |
|
dev_dbg(&dev->dev, |
|
"pSeries IOV BAR %d: trying firmware assignment %pR\n", |
|
r + PCI_IOV_RESOURCES, res); |
|
conflict = request_resource_conflict(root, res); |
|
if (conflict) { |
|
dev_info(&dev->dev, |
|
"BAR %d: %pR conflicts with %s %pR\n", |
|
r + PCI_IOV_RESOURCES, res, |
|
conflict->name, conflict); |
|
res->flags |= IORESOURCE_UNSET; |
|
} |
|
} |
|
} |
|
|
|
static void pseries_disable_sriov_resources(struct pci_dev *pdev) |
|
{ |
|
int i; |
|
|
|
pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n"); |
|
for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) |
|
pdev->resource[i + PCI_IOV_RESOURCES].flags = 0; |
|
} |
|
|
|
static void pseries_pci_fixup_resources(struct pci_dev *pdev) |
|
{ |
|
const int *indexes; |
|
struct device_node *dn = pci_device_to_OF_node(pdev); |
|
|
|
/*Firmware must support open sriov otherwise dont configure*/ |
|
indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); |
|
if (indexes) |
|
of_pci_set_vf_bar_size(pdev, indexes); |
|
else |
|
pseries_disable_sriov_resources(pdev); |
|
} |
|
|
|
static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) |
|
{ |
|
const int *indexes; |
|
struct device_node *dn = pci_device_to_OF_node(pdev); |
|
|
|
if (!pdev->is_physfn || pci_dev_is_added(pdev)) |
|
return; |
|
/*Firmware must support open sriov otherwise dont configure*/ |
|
indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); |
|
if (indexes) |
|
of_pci_parse_iov_addrs(pdev, indexes); |
|
else |
|
pseries_disable_sriov_resources(pdev); |
|
} |
|
|
|
static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev, |
|
int resno) |
|
{ |
|
const __be32 *reg; |
|
struct device_node *dn = pci_device_to_OF_node(pdev); |
|
|
|
/*Firmware must support open sriov otherwise report regular alignment*/ |
|
reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL); |
|
if (!reg) |
|
return pci_iov_resource_size(pdev, resno); |
|
|
|
if (!pdev->is_physfn) |
|
return 0; |
|
return pseries_get_iov_fw_value(pdev, |
|
resno - PCI_IOV_RESOURCES, |
|
APERTURE_SIZE); |
|
} |
|
#endif |
|
|
|
static void __init pSeries_setup_arch(void) |
|
{ |
|
set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); |
|
|
|
/* Discover PIC type and setup ppc_md accordingly */ |
|
smp_init_pseries(); |
|
|
|
|
|
if (radix_enabled() && !mmu_has_feature(MMU_FTR_GTSE)) |
|
if (!firmware_has_feature(FW_FEATURE_RPT_INVALIDATE)) |
|
panic("BUG: Radix support requires either GTSE or RPT_INVALIDATE\n"); |
|
|
|
|
|
/* openpic global configuration register (64-bit format). */ |
|
/* openpic Interrupt Source Unit pointer (64-bit format). */ |
|
/* python0 facility area (mmio) (64-bit format) REAL address. */ |
|
|
|
/* init to some ~sane value until calibrate_delay() runs */ |
|
loops_per_jiffy = 50000000; |
|
|
|
fwnmi_init(); |
|
|
|
pseries_setup_security_mitigations(); |
|
pseries_lpar_read_hblkrm_characteristics(); |
|
|
|
/* By default, only probe PCI (can be overridden by rtas_pci) */ |
|
pci_add_flags(PCI_PROBE_ONLY); |
|
|
|
/* Find and initialize PCI host bridges */ |
|
init_pci_config_tokens(); |
|
of_reconfig_notifier_register(&pci_dn_reconfig_nb); |
|
|
|
pSeries_nvram_init(); |
|
|
|
if (firmware_has_feature(FW_FEATURE_LPAR)) { |
|
vpa_init(boot_cpuid); |
|
|
|
if (lppaca_shared_proc(get_lppaca())) { |
|
static_branch_enable(&shared_processor); |
|
pv_spinlocks_init(); |
|
} |
|
|
|
ppc_md.power_save = pseries_lpar_idle; |
|
ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; |
|
#ifdef CONFIG_PCI_IOV |
|
ppc_md.pcibios_fixup_resources = |
|
pseries_pci_fixup_resources; |
|
ppc_md.pcibios_fixup_sriov = |
|
pseries_pci_fixup_iov_resources; |
|
ppc_md.pcibios_iov_resource_alignment = |
|
pseries_pci_iov_resource_alignment; |
|
#endif |
|
} else { |
|
/* No special idle routine */ |
|
ppc_md.enable_pmcs = power4_enable_pmcs; |
|
} |
|
|
|
ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; |
|
|
|
if (swiotlb_force == SWIOTLB_FORCE) |
|
ppc_swiotlb_enable = 1; |
|
} |
|
|
|
static void pseries_panic(char *str) |
|
{ |
|
panic_flush_kmsg_end(); |
|
rtas_os_term(str); |
|
} |
|
|
|
static int __init pSeries_init_panel(void) |
|
{ |
|
/* Manually leave the kernel version on the panel. */ |
|
#ifdef __BIG_ENDIAN__ |
|
ppc_md.progress("Linux ppc64\n", 0); |
|
#else |
|
ppc_md.progress("Linux ppc64le\n", 0); |
|
#endif |
|
ppc_md.progress(init_utsname()->version, 0); |
|
|
|
return 0; |
|
} |
|
machine_arch_initcall(pseries, pSeries_init_panel); |
|
|
|
static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) |
|
{ |
|
return plpar_hcall_norets(H_SET_DABR, dabr); |
|
} |
|
|
|
static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) |
|
{ |
|
/* Have to set at least one bit in the DABRX according to PAPR */ |
|
if (dabrx == 0 && dabr == 0) |
|
dabrx = DABRX_USER; |
|
/* PAPR says we can only set kernel and user bits */ |
|
dabrx &= DABRX_KERNEL | DABRX_USER; |
|
|
|
return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); |
|
} |
|
|
|
static int pseries_set_dawr(int nr, unsigned long dawr, unsigned long dawrx) |
|
{ |
|
/* PAPR says we can't set HYP */ |
|
dawrx &= ~DAWRX_HYP; |
|
|
|
if (nr == 0) |
|
return plpar_set_watchpoint0(dawr, dawrx); |
|
else |
|
return plpar_set_watchpoint1(dawr, dawrx); |
|
} |
|
|
|
#define CMO_CHARACTERISTICS_TOKEN 44 |
|
#define CMO_MAXLENGTH 1026 |
|
|
|
void pSeries_coalesce_init(void) |
|
{ |
|
struct hvcall_mpp_x_data mpp_x_data; |
|
|
|
if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) |
|
powerpc_firmware_features |= FW_FEATURE_XCMO; |
|
else |
|
powerpc_firmware_features &= ~FW_FEATURE_XCMO; |
|
} |
|
|
|
/** |
|
* fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, |
|
* handle that here. (Stolen from parse_system_parameter_string) |
|
*/ |
|
static void pSeries_cmo_feature_init(void) |
|
{ |
|
char *ptr, *key, *value, *end; |
|
int call_status; |
|
int page_order = IOMMU_PAGE_SHIFT_4K; |
|
|
|
pr_debug(" -> fw_cmo_feature_init()\n"); |
|
spin_lock(&rtas_data_buf_lock); |
|
memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); |
|
call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, |
|
NULL, |
|
CMO_CHARACTERISTICS_TOKEN, |
|
__pa(rtas_data_buf), |
|
RTAS_DATA_BUF_SIZE); |
|
|
|
if (call_status != 0) { |
|
spin_unlock(&rtas_data_buf_lock); |
|
pr_debug("CMO not available\n"); |
|
pr_debug(" <- fw_cmo_feature_init()\n"); |
|
return; |
|
} |
|
|
|
end = rtas_data_buf + CMO_MAXLENGTH - 2; |
|
ptr = rtas_data_buf + 2; /* step over strlen value */ |
|
key = value = ptr; |
|
|
|
while (*ptr && (ptr <= end)) { |
|
/* Separate the key and value by replacing '=' with '\0' and |
|
* point the value at the string after the '=' |
|
*/ |
|
if (ptr[0] == '=') { |
|
ptr[0] = '\0'; |
|
value = ptr + 1; |
|
} else if (ptr[0] == '\0' || ptr[0] == ',') { |
|
/* Terminate the string containing the key/value pair */ |
|
ptr[0] = '\0'; |
|
|
|
if (key == value) { |
|
pr_debug("Malformed key/value pair\n"); |
|
/* Never found a '=', end processing */ |
|
break; |
|
} |
|
|
|
if (0 == strcmp(key, "CMOPageSize")) |
|
page_order = simple_strtol(value, NULL, 10); |
|
else if (0 == strcmp(key, "PrPSP")) |
|
CMO_PrPSP = simple_strtol(value, NULL, 10); |
|
else if (0 == strcmp(key, "SecPSP")) |
|
CMO_SecPSP = simple_strtol(value, NULL, 10); |
|
value = key = ptr + 1; |
|
} |
|
ptr++; |
|
} |
|
|
|
/* Page size is returned as the power of 2 of the page size, |
|
* convert to the page size in bytes before returning |
|
*/ |
|
CMO_PageSize = 1 << page_order; |
|
pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); |
|
|
|
if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { |
|
pr_info("CMO enabled\n"); |
|
pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, |
|
CMO_SecPSP); |
|
powerpc_firmware_features |= FW_FEATURE_CMO; |
|
pSeries_coalesce_init(); |
|
} else |
|
pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, |
|
CMO_SecPSP); |
|
spin_unlock(&rtas_data_buf_lock); |
|
pr_debug(" <- fw_cmo_feature_init()\n"); |
|
} |
|
|
|
/* |
|
* Early initialization. Relocation is on but do not reference unbolted pages |
|
*/ |
|
static void __init pseries_init(void) |
|
{ |
|
pr_debug(" -> pseries_init()\n"); |
|
|
|
#ifdef CONFIG_HVC_CONSOLE |
|
if (firmware_has_feature(FW_FEATURE_LPAR)) |
|
hvc_vio_init_early(); |
|
#endif |
|
if (firmware_has_feature(FW_FEATURE_XDABR)) |
|
ppc_md.set_dabr = pseries_set_xdabr; |
|
else if (firmware_has_feature(FW_FEATURE_DABR)) |
|
ppc_md.set_dabr = pseries_set_dabr; |
|
|
|
if (firmware_has_feature(FW_FEATURE_SET_MODE)) |
|
ppc_md.set_dawr = pseries_set_dawr; |
|
|
|
pSeries_cmo_feature_init(); |
|
iommu_init_early_pSeries(); |
|
|
|
pr_debug(" <- pseries_init()\n"); |
|
} |
|
|
|
/** |
|
* pseries_power_off - tell firmware about how to power off the system. |
|
* |
|
* This function calls either the power-off rtas token in normal cases |
|
* or the ibm,power-off-ups token (if present & requested) in case of |
|
* a power failure. If power-off token is used, power on will only be |
|
* possible with power button press. If ibm,power-off-ups token is used |
|
* it will allow auto poweron after power is restored. |
|
*/ |
|
static void pseries_power_off(void) |
|
{ |
|
int rc; |
|
int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); |
|
|
|
if (rtas_flash_term_hook) |
|
rtas_flash_term_hook(SYS_POWER_OFF); |
|
|
|
if (rtas_poweron_auto == 0 || |
|
rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { |
|
rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); |
|
printk(KERN_INFO "RTAS power-off returned %d\n", rc); |
|
} else { |
|
rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); |
|
printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); |
|
} |
|
for (;;); |
|
} |
|
|
|
static int __init pSeries_probe(void) |
|
{ |
|
if (!of_node_is_type(of_root, "chrp")) |
|
return 0; |
|
|
|
/* Cell blades firmware claims to be chrp while it's not. Until this |
|
* is fixed, we need to avoid those here. |
|
*/ |
|
if (of_machine_is_compatible("IBM,CPBW-1.0") || |
|
of_machine_is_compatible("IBM,CBEA")) |
|
return 0; |
|
|
|
pm_power_off = pseries_power_off; |
|
|
|
pr_debug("Machine is%s LPAR !\n", |
|
(powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); |
|
|
|
pseries_init(); |
|
|
|
return 1; |
|
} |
|
|
|
static int pSeries_pci_probe_mode(struct pci_bus *bus) |
|
{ |
|
if (firmware_has_feature(FW_FEATURE_LPAR)) |
|
return PCI_PROBE_DEVTREE; |
|
return PCI_PROBE_NORMAL; |
|
} |
|
|
|
struct pci_controller_ops pseries_pci_controller_ops = { |
|
.probe_mode = pSeries_pci_probe_mode, |
|
}; |
|
|
|
define_machine(pseries) { |
|
.name = "pSeries", |
|
.probe = pSeries_probe, |
|
.setup_arch = pSeries_setup_arch, |
|
.init_IRQ = pseries_init_irq, |
|
.show_cpuinfo = pSeries_show_cpuinfo, |
|
.log_error = pSeries_log_error, |
|
.discover_phbs = pSeries_discover_phbs, |
|
.pcibios_fixup = pSeries_final_fixup, |
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.restart = rtas_restart, |
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.halt = rtas_halt, |
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.panic = pseries_panic, |
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.get_boot_time = rtas_get_boot_time, |
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.get_rtc_time = rtas_get_rtc_time, |
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.set_rtc_time = rtas_set_rtc_time, |
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.calibrate_decr = generic_calibrate_decr, |
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.progress = rtas_progress, |
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.system_reset_exception = pSeries_system_reset_exception, |
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.machine_check_early = pseries_machine_check_realmode, |
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.machine_check_exception = pSeries_machine_check_exception, |
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#ifdef CONFIG_KEXEC_CORE |
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.machine_kexec = pSeries_machine_kexec, |
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.kexec_cpu_down = pseries_kexec_cpu_down, |
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#endif |
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#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
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.memory_block_size = pseries_memory_block_size, |
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#endif |
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};
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