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363 lines
8.5 KiB
363 lines
8.5 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* align.c - handle alignment exceptions for the Power PC. |
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* |
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* Copyright (c) 1996 Paul Mackerras <[email protected]> |
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* Copyright (c) 1998-1999 TiVo, Inc. |
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* PowerPC 403GCX modifications. |
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* Copyright (c) 1999 Grant Erickson <[email protected]> |
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* PowerPC 403GCX/405GP modifications. |
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* Copyright (c) 2001-2002 PPC64 team, IBM Corp |
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* 64-bit and Power4 support |
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* Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp |
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* <[email protected]> |
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* Merge ppc32 and ppc64 implementations |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/mm.h> |
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#include <asm/processor.h> |
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#include <linux/uaccess.h> |
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#include <asm/cache.h> |
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#include <asm/cputable.h> |
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#include <asm/emulated_ops.h> |
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#include <asm/switch_to.h> |
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#include <asm/disassemble.h> |
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#include <asm/cpu_has_feature.h> |
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#include <asm/sstep.h> |
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#include <asm/inst.h> |
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struct aligninfo { |
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unsigned char len; |
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unsigned char flags; |
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}; |
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#define INVALID { 0, 0 } |
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/* Bits in the flags field */ |
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#define LD 0 /* load */ |
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#define ST 1 /* store */ |
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#define SE 2 /* sign-extend value, or FP ld/st as word */ |
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#define SW 0x20 /* byte swap */ |
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#define E4 0x40 /* SPE endianness is word */ |
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#define E8 0x80 /* SPE endianness is double word */ |
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#ifdef CONFIG_SPE |
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static struct aligninfo spe_aligninfo[32] = { |
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{ 8, LD+E8 }, /* 0 00 00: evldd[x] */ |
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{ 8, LD+E4 }, /* 0 00 01: evldw[x] */ |
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{ 8, LD }, /* 0 00 10: evldh[x] */ |
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INVALID, /* 0 00 11 */ |
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{ 2, LD }, /* 0 01 00: evlhhesplat[x] */ |
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INVALID, /* 0 01 01 */ |
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{ 2, LD }, /* 0 01 10: evlhhousplat[x] */ |
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{ 2, LD+SE }, /* 0 01 11: evlhhossplat[x] */ |
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{ 4, LD }, /* 0 10 00: evlwhe[x] */ |
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INVALID, /* 0 10 01 */ |
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{ 4, LD }, /* 0 10 10: evlwhou[x] */ |
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{ 4, LD+SE }, /* 0 10 11: evlwhos[x] */ |
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{ 4, LD+E4 }, /* 0 11 00: evlwwsplat[x] */ |
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INVALID, /* 0 11 01 */ |
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{ 4, LD }, /* 0 11 10: evlwhsplat[x] */ |
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INVALID, /* 0 11 11 */ |
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{ 8, ST+E8 }, /* 1 00 00: evstdd[x] */ |
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{ 8, ST+E4 }, /* 1 00 01: evstdw[x] */ |
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{ 8, ST }, /* 1 00 10: evstdh[x] */ |
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INVALID, /* 1 00 11 */ |
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INVALID, /* 1 01 00 */ |
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INVALID, /* 1 01 01 */ |
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INVALID, /* 1 01 10 */ |
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INVALID, /* 1 01 11 */ |
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{ 4, ST }, /* 1 10 00: evstwhe[x] */ |
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INVALID, /* 1 10 01 */ |
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{ 4, ST }, /* 1 10 10: evstwho[x] */ |
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INVALID, /* 1 10 11 */ |
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{ 4, ST+E4 }, /* 1 11 00: evstwwe[x] */ |
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INVALID, /* 1 11 01 */ |
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{ 4, ST+E4 }, /* 1 11 10: evstwwo[x] */ |
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INVALID, /* 1 11 11 */ |
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}; |
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#define EVLDD 0x00 |
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#define EVLDW 0x01 |
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#define EVLDH 0x02 |
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#define EVLHHESPLAT 0x04 |
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#define EVLHHOUSPLAT 0x06 |
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#define EVLHHOSSPLAT 0x07 |
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#define EVLWHE 0x08 |
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#define EVLWHOU 0x0A |
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#define EVLWHOS 0x0B |
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#define EVLWWSPLAT 0x0C |
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#define EVLWHSPLAT 0x0E |
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#define EVSTDD 0x10 |
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#define EVSTDW 0x11 |
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#define EVSTDH 0x12 |
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#define EVSTWHE 0x18 |
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#define EVSTWHO 0x1A |
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#define EVSTWWE 0x1C |
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#define EVSTWWO 0x1E |
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/* |
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* Emulate SPE loads and stores. |
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* Only Book-E has these instructions, and it does true little-endian, |
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* so we don't need the address swizzling. |
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*/ |
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static int emulate_spe(struct pt_regs *regs, unsigned int reg, |
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struct ppc_inst ppc_instr) |
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{ |
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union { |
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u64 ll; |
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u32 w[2]; |
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u16 h[4]; |
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u8 v[8]; |
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} data, temp; |
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unsigned char __user *p, *addr; |
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unsigned long *evr = ¤t->thread.evr[reg]; |
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unsigned int nb, flags, instr; |
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instr = ppc_inst_val(ppc_instr); |
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instr = (instr >> 1) & 0x1f; |
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/* DAR has the operand effective address */ |
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addr = (unsigned char __user *)regs->dar; |
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nb = spe_aligninfo[instr].len; |
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flags = spe_aligninfo[instr].flags; |
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/* userland only */ |
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if (unlikely(!user_mode(regs))) |
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return 0; |
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flush_spe_to_thread(current); |
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/* If we are loading, get the data from user space, else |
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* get it from register values |
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*/ |
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if (flags & ST) { |
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data.ll = 0; |
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switch (instr) { |
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case EVSTDD: |
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case EVSTDW: |
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case EVSTDH: |
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data.w[0] = *evr; |
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data.w[1] = regs->gpr[reg]; |
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break; |
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case EVSTWHE: |
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data.h[2] = *evr >> 16; |
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data.h[3] = regs->gpr[reg] >> 16; |
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break; |
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case EVSTWHO: |
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data.h[2] = *evr & 0xffff; |
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data.h[3] = regs->gpr[reg] & 0xffff; |
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break; |
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case EVSTWWE: |
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data.w[1] = *evr; |
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break; |
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case EVSTWWO: |
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data.w[1] = regs->gpr[reg]; |
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break; |
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default: |
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return -EINVAL; |
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} |
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} else { |
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temp.ll = data.ll = 0; |
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p = addr; |
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if (!user_read_access_begin(addr, nb)) |
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return -EFAULT; |
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switch (nb) { |
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case 8: |
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unsafe_get_user(temp.v[0], p++, Efault_read); |
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unsafe_get_user(temp.v[1], p++, Efault_read); |
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unsafe_get_user(temp.v[2], p++, Efault_read); |
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unsafe_get_user(temp.v[3], p++, Efault_read); |
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fallthrough; |
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case 4: |
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unsafe_get_user(temp.v[4], p++, Efault_read); |
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unsafe_get_user(temp.v[5], p++, Efault_read); |
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fallthrough; |
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case 2: |
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unsafe_get_user(temp.v[6], p++, Efault_read); |
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unsafe_get_user(temp.v[7], p++, Efault_read); |
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} |
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user_read_access_end(); |
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switch (instr) { |
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case EVLDD: |
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case EVLDW: |
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case EVLDH: |
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data.ll = temp.ll; |
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break; |
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case EVLHHESPLAT: |
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data.h[0] = temp.h[3]; |
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data.h[2] = temp.h[3]; |
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break; |
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case EVLHHOUSPLAT: |
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case EVLHHOSSPLAT: |
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data.h[1] = temp.h[3]; |
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data.h[3] = temp.h[3]; |
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break; |
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case EVLWHE: |
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data.h[0] = temp.h[2]; |
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data.h[2] = temp.h[3]; |
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break; |
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case EVLWHOU: |
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case EVLWHOS: |
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data.h[1] = temp.h[2]; |
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data.h[3] = temp.h[3]; |
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break; |
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case EVLWWSPLAT: |
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data.w[0] = temp.w[1]; |
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data.w[1] = temp.w[1]; |
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break; |
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case EVLWHSPLAT: |
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data.h[0] = temp.h[2]; |
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data.h[1] = temp.h[2]; |
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data.h[2] = temp.h[3]; |
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data.h[3] = temp.h[3]; |
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break; |
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default: |
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return -EINVAL; |
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} |
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} |
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if (flags & SW) { |
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switch (flags & 0xf0) { |
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case E8: |
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data.ll = swab64(data.ll); |
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break; |
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case E4: |
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data.w[0] = swab32(data.w[0]); |
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data.w[1] = swab32(data.w[1]); |
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break; |
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/* Its half word endian */ |
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default: |
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data.h[0] = swab16(data.h[0]); |
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data.h[1] = swab16(data.h[1]); |
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data.h[2] = swab16(data.h[2]); |
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data.h[3] = swab16(data.h[3]); |
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break; |
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} |
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} |
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if (flags & SE) { |
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data.w[0] = (s16)data.h[1]; |
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data.w[1] = (s16)data.h[3]; |
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} |
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/* Store result to memory or update registers */ |
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if (flags & ST) { |
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p = addr; |
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if (!user_write_access_begin(addr, nb)) |
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return -EFAULT; |
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switch (nb) { |
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case 8: |
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unsafe_put_user(data.v[0], p++, Efault_write); |
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unsafe_put_user(data.v[1], p++, Efault_write); |
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unsafe_put_user(data.v[2], p++, Efault_write); |
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unsafe_put_user(data.v[3], p++, Efault_write); |
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fallthrough; |
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case 4: |
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unsafe_put_user(data.v[4], p++, Efault_write); |
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unsafe_put_user(data.v[5], p++, Efault_write); |
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fallthrough; |
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case 2: |
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unsafe_put_user(data.v[6], p++, Efault_write); |
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unsafe_put_user(data.v[7], p++, Efault_write); |
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} |
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user_write_access_end(); |
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} else { |
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*evr = data.w[0]; |
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regs->gpr[reg] = data.w[1]; |
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} |
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return 1; |
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Efault_read: |
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user_read_access_end(); |
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return -EFAULT; |
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Efault_write: |
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user_write_access_end(); |
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return -EFAULT; |
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} |
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#endif /* CONFIG_SPE */ |
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/* |
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* Called on alignment exception. Attempts to fixup |
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* |
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* Return 1 on success |
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* Return 0 if unable to handle the interrupt |
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* Return -EFAULT if data address is bad |
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* Other negative return values indicate that the instruction can't |
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* be emulated, and the process should be given a SIGBUS. |
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*/ |
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int fix_alignment(struct pt_regs *regs) |
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{ |
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struct ppc_inst instr; |
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struct instruction_op op; |
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int r, type; |
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if (is_kernel_addr(regs->nip)) |
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r = copy_inst_from_kernel_nofault(&instr, (void *)regs->nip); |
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else |
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r = __get_user_instr(instr, (void __user *)regs->nip); |
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if (unlikely(r)) |
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return -EFAULT; |
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if ((regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE)) { |
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/* We don't handle PPC little-endian any more... */ |
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if (cpu_has_feature(CPU_FTR_PPC_LE)) |
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return -EIO; |
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instr = ppc_inst_swab(instr); |
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} |
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#ifdef CONFIG_SPE |
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if (ppc_inst_primary_opcode(instr) == 0x4) { |
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int reg = (ppc_inst_val(instr) >> 21) & 0x1f; |
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PPC_WARN_ALIGNMENT(spe, regs); |
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return emulate_spe(regs, reg, instr); |
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} |
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#endif |
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/* |
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* ISA 3.0 (such as P9) copy, copy_first, paste and paste_last alignment |
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* check. |
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* |
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* Send a SIGBUS to the process that caused the fault. |
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* |
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* We do not emulate these because paste may contain additional metadata |
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* when pasting to a co-processor. Furthermore, paste_last is the |
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* synchronisation point for preceding copy/paste sequences. |
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*/ |
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if ((ppc_inst_val(instr) & 0xfc0006fe) == (PPC_INST_COPY & 0xfc0006fe)) |
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return -EIO; |
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r = analyse_instr(&op, regs, instr); |
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if (r < 0) |
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return -EINVAL; |
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type = GETTYPE(op.type); |
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if (!OP_IS_LOAD_STORE(type)) { |
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if (op.type != CACHEOP + DCBZ) |
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return -EINVAL; |
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PPC_WARN_ALIGNMENT(dcbz, regs); |
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r = emulate_dcbz(op.ea, regs); |
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} else { |
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if (type == LARX || type == STCX) |
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return -EIO; |
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PPC_WARN_ALIGNMENT(unaligned, regs); |
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r = emulate_loadstore(regs, &op); |
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} |
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if (!r) |
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return 1; |
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return r; |
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}
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