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73 lines
1.9 KiB
73 lines
1.9 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* Common timebase prototypes and such for all ppc machines. |
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*/ |
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#ifndef _ASM_POWERPC_VDSO_TIMEBASE_H |
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#define _ASM_POWERPC_VDSO_TIMEBASE_H |
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#include <asm/reg.h> |
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/* |
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* We use __powerpc64__ here because we want the compat VDSO to use the 32-bit |
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* version below in the else case of the ifdef. |
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*/ |
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#if defined(__powerpc64__) && (defined(CONFIG_PPC_CELL) || defined(CONFIG_E500)) |
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#define mftb() ({unsigned long rval; \ |
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asm volatile( \ |
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"90: mfspr %0, %2;\n" \ |
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ASM_FTR_IFSET( \ |
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"97: cmpwi %0,0;\n" \ |
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" beq- 90b;\n", "", %1) \ |
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: "=r" (rval) \ |
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: "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL) : "cr0"); \ |
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rval;}) |
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#elif defined(CONFIG_PPC_8xx) |
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#define mftb() ({unsigned long rval; \ |
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asm volatile("mftbl %0" : "=r" (rval)); rval;}) |
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#else |
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#define mftb() ({unsigned long rval; \ |
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asm volatile("mfspr %0, %1" : \ |
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"=r" (rval) : "i" (SPRN_TBRL)); rval;}) |
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#endif /* !CONFIG_PPC_CELL */ |
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#if defined(CONFIG_PPC_8xx) |
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#define mftbu() ({unsigned long rval; \ |
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asm volatile("mftbu %0" : "=r" (rval)); rval;}) |
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#else |
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#define mftbu() ({unsigned long rval; \ |
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asm volatile("mfspr %0, %1" : "=r" (rval) : \ |
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"i" (SPRN_TBRU)); rval;}) |
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#endif |
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#define mttbl(v) asm volatile("mttbl %0":: "r"(v)) |
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#define mttbu(v) asm volatile("mttbu %0":: "r"(v)) |
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static __always_inline u64 get_tb(void) |
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{ |
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unsigned int tbhi, tblo, tbhi2; |
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/* |
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* We use __powerpc64__ here not CONFIG_PPC64 because we want the compat |
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* VDSO to use the 32-bit compatible version in the while loop below. |
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*/ |
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if (__is_defined(__powerpc64__)) |
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return mftb(); |
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do { |
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tbhi = mftbu(); |
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tblo = mftb(); |
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tbhi2 = mftbu(); |
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} while (tbhi != tbhi2); |
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return ((u64)tbhi << 32) | tblo; |
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} |
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static inline void set_tb(unsigned int upper, unsigned int lower) |
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{ |
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mtspr(SPRN_TBWL, 0); |
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mtspr(SPRN_TBWU, upper); |
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mtspr(SPRN_TBWL, lower); |
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} |
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#endif /* _ASM_POWERPC_VDSO_TIMEBASE_H */
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