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689 lines
18 KiB
689 lines
18 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* |
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* Copyright SUSE Linux Products GmbH 2010 |
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* |
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* Authors: Alexander Graf <[email protected]> |
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*/ |
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#ifndef __ASM_KVM_BOOK3S_64_H__ |
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#define __ASM_KVM_BOOK3S_64_H__ |
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#include <linux/string.h> |
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#include <asm/bitops.h> |
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#include <asm/book3s/64/mmu-hash.h> |
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#include <asm/cpu_has_feature.h> |
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#include <asm/ppc-opcode.h> |
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#include <asm/pte-walk.h> |
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#ifdef CONFIG_PPC_PSERIES |
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static inline bool kvmhv_on_pseries(void) |
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{ |
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return !cpu_has_feature(CPU_FTR_HVMODE); |
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} |
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#else |
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static inline bool kvmhv_on_pseries(void) |
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{ |
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return false; |
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} |
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#endif |
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/* |
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* Structure for a nested guest, that is, for a guest that is managed by |
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* one of our guests. |
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*/ |
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struct kvm_nested_guest { |
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struct kvm *l1_host; /* L1 VM that owns this nested guest */ |
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int l1_lpid; /* lpid L1 guest thinks this guest is */ |
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int shadow_lpid; /* real lpid of this nested guest */ |
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pgd_t *shadow_pgtable; /* our page table for this guest */ |
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u64 l1_gr_to_hr; /* L1's addr of part'n-scoped table */ |
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u64 process_table; /* process table entry for this guest */ |
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long refcnt; /* number of pointers to this struct */ |
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struct mutex tlb_lock; /* serialize page faults and tlbies */ |
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struct kvm_nested_guest *next; |
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cpumask_t need_tlb_flush; |
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cpumask_t cpu_in_guest; |
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short prev_cpu[NR_CPUS]; |
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u8 radix; /* is this nested guest radix */ |
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}; |
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/* |
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* We define a nested rmap entry as a single 64-bit quantity |
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* 0xFFF0000000000000 12-bit lpid field |
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* 0x000FFFFFFFFFF000 40-bit guest 4k page frame number |
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* 0x0000000000000001 1-bit single entry flag |
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*/ |
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#define RMAP_NESTED_LPID_MASK 0xFFF0000000000000UL |
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#define RMAP_NESTED_LPID_SHIFT (52) |
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#define RMAP_NESTED_GPA_MASK 0x000FFFFFFFFFF000UL |
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#define RMAP_NESTED_IS_SINGLE_ENTRY 0x0000000000000001UL |
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/* Structure for a nested guest rmap entry */ |
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struct rmap_nested { |
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struct llist_node list; |
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u64 rmap; |
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}; |
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/* |
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* for_each_nest_rmap_safe - iterate over the list of nested rmap entries |
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* safe against removal of the list entry or NULL list |
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* @pos: a (struct rmap_nested *) to use as a loop cursor |
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* @node: pointer to the first entry |
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* NOTE: this can be NULL |
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* @rmapp: an (unsigned long *) in which to return the rmap entries on each |
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* iteration |
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* NOTE: this must point to already allocated memory |
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* |
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* The nested_rmap is a llist of (struct rmap_nested) entries pointed to by the |
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* rmap entry in the memslot. The list is always terminated by a "single entry" |
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* stored in the list element of the final entry of the llist. If there is ONLY |
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* a single entry then this is itself in the rmap entry of the memslot, not a |
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* llist head pointer. |
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* |
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* Note that the iterator below assumes that a nested rmap entry is always |
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* non-zero. This is true for our usage because the LPID field is always |
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* non-zero (zero is reserved for the host). |
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* |
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* This should be used to iterate over the list of rmap_nested entries with |
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* processing done on the u64 rmap value given by each iteration. This is safe |
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* against removal of list entries and it is always safe to call free on (pos). |
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* |
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* e.g. |
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* struct rmap_nested *cursor; |
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* struct llist_node *first; |
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* unsigned long rmap; |
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* for_each_nest_rmap_safe(cursor, first, &rmap) { |
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* do_something(rmap); |
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* free(cursor); |
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* } |
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*/ |
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#define for_each_nest_rmap_safe(pos, node, rmapp) \ |
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for ((pos) = llist_entry((node), typeof(*(pos)), list); \ |
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(node) && \ |
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(*(rmapp) = ((RMAP_NESTED_IS_SINGLE_ENTRY & ((u64) (node))) ? \ |
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((u64) (node)) : ((pos)->rmap))) && \ |
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(((node) = ((RMAP_NESTED_IS_SINGLE_ENTRY & ((u64) (node))) ? \ |
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((struct llist_node *) ((pos) = NULL)) : \ |
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(pos)->list.next)), true); \ |
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(pos) = llist_entry((node), typeof(*(pos)), list)) |
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struct kvm_nested_guest *kvmhv_get_nested(struct kvm *kvm, int l1_lpid, |
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bool create); |
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void kvmhv_put_nested(struct kvm_nested_guest *gp); |
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int kvmhv_nested_next_lpid(struct kvm *kvm, int lpid); |
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/* Encoding of first parameter for H_TLB_INVALIDATE */ |
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#define H_TLBIE_P1_ENC(ric, prs, r) (___PPC_RIC(ric) | ___PPC_PRS(prs) | \ |
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___PPC_R(r)) |
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/* Power architecture requires HPT is at least 256kiB, at most 64TiB */ |
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#define PPC_MIN_HPT_ORDER 18 |
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#define PPC_MAX_HPT_ORDER 46 |
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#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE |
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static inline struct kvmppc_book3s_shadow_vcpu *svcpu_get(struct kvm_vcpu *vcpu) |
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{ |
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preempt_disable(); |
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return &get_paca()->shadow_vcpu; |
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} |
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static inline void svcpu_put(struct kvmppc_book3s_shadow_vcpu *svcpu) |
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{ |
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preempt_enable(); |
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} |
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#endif |
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
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static inline bool kvm_is_radix(struct kvm *kvm) |
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{ |
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return kvm->arch.radix; |
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} |
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static inline bool kvmhv_vcpu_is_radix(struct kvm_vcpu *vcpu) |
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{ |
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bool radix; |
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if (vcpu->arch.nested) |
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radix = vcpu->arch.nested->radix; |
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else |
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radix = kvm_is_radix(vcpu->kvm); |
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return radix; |
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} |
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int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpcr); |
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#define KVM_DEFAULT_HPT_ORDER 24 /* 16MB HPT by default */ |
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#endif |
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/* |
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* Invalid HDSISR value which is used to indicate when HW has not set the reg. |
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* Used to work around an errata. |
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*/ |
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#define HDSISR_CANARY 0x7fff |
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/* |
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* We use a lock bit in HPTE dword 0 to synchronize updates and |
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* accesses to each HPTE, and another bit to indicate non-present |
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* HPTEs. |
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*/ |
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#define HPTE_V_HVLOCK 0x40UL |
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#define HPTE_V_ABSENT 0x20UL |
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/* |
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* We use this bit in the guest_rpte field of the revmap entry |
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* to indicate a modified HPTE. |
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*/ |
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#define HPTE_GR_MODIFIED (1ul << 62) |
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/* These bits are reserved in the guest view of the HPTE */ |
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#define HPTE_GR_RESERVED HPTE_GR_MODIFIED |
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static inline long try_lock_hpte(__be64 *hpte, unsigned long bits) |
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{ |
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unsigned long tmp, old; |
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__be64 be_lockbit, be_bits; |
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/* |
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* We load/store in native endian, but the HTAB is in big endian. If |
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* we byte swap all data we apply on the PTE we're implicitly correct |
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* again. |
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*/ |
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be_lockbit = cpu_to_be64(HPTE_V_HVLOCK); |
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be_bits = cpu_to_be64(bits); |
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asm volatile(" ldarx %0,0,%2\n" |
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" and. %1,%0,%3\n" |
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" bne 2f\n" |
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" or %0,%0,%4\n" |
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" stdcx. %0,0,%2\n" |
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" beq+ 2f\n" |
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" mr %1,%3\n" |
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"2: isync" |
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: "=&r" (tmp), "=&r" (old) |
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: "r" (hpte), "r" (be_bits), "r" (be_lockbit) |
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: "cc", "memory"); |
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return old == 0; |
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} |
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static inline void unlock_hpte(__be64 *hpte, unsigned long hpte_v) |
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{ |
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hpte_v &= ~HPTE_V_HVLOCK; |
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asm volatile(PPC_RELEASE_BARRIER "" : : : "memory"); |
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hpte[0] = cpu_to_be64(hpte_v); |
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} |
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/* Without barrier */ |
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static inline void __unlock_hpte(__be64 *hpte, unsigned long hpte_v) |
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{ |
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hpte_v &= ~HPTE_V_HVLOCK; |
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hpte[0] = cpu_to_be64(hpte_v); |
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} |
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/* |
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* These functions encode knowledge of the POWER7/8/9 hardware |
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* interpretations of the HPTE LP (large page size) field. |
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*/ |
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static inline int kvmppc_hpte_page_shifts(unsigned long h, unsigned long l) |
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{ |
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unsigned int lphi; |
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if (!(h & HPTE_V_LARGE)) |
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return 12; /* 4kB */ |
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lphi = (l >> 16) & 0xf; |
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switch ((l >> 12) & 0xf) { |
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case 0: |
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return !lphi ? 24 : 0; /* 16MB */ |
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break; |
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case 1: |
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return 16; /* 64kB */ |
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break; |
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case 3: |
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return !lphi ? 34 : 0; /* 16GB */ |
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break; |
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case 7: |
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return (16 << 8) + 12; /* 64kB in 4kB */ |
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break; |
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case 8: |
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if (!lphi) |
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return (24 << 8) + 16; /* 16MB in 64kkB */ |
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if (lphi == 3) |
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return (24 << 8) + 12; /* 16MB in 4kB */ |
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break; |
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} |
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return 0; |
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} |
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static inline int kvmppc_hpte_base_page_shift(unsigned long h, unsigned long l) |
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{ |
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return kvmppc_hpte_page_shifts(h, l) & 0xff; |
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} |
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static inline int kvmppc_hpte_actual_page_shift(unsigned long h, unsigned long l) |
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{ |
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int tmp = kvmppc_hpte_page_shifts(h, l); |
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if (tmp >= 0x100) |
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tmp >>= 8; |
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return tmp; |
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} |
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static inline unsigned long kvmppc_actual_pgsz(unsigned long v, unsigned long r) |
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{ |
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int shift = kvmppc_hpte_actual_page_shift(v, r); |
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if (shift) |
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return 1ul << shift; |
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return 0; |
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} |
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static inline int kvmppc_pgsize_lp_encoding(int base_shift, int actual_shift) |
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{ |
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switch (base_shift) { |
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case 12: |
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switch (actual_shift) { |
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case 12: |
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return 0; |
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case 16: |
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return 7; |
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case 24: |
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return 0x38; |
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} |
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break; |
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case 16: |
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switch (actual_shift) { |
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case 16: |
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return 1; |
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case 24: |
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return 8; |
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} |
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break; |
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case 24: |
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return 0; |
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} |
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return -1; |
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} |
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static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r, |
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unsigned long pte_index) |
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{ |
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int a_pgshift, b_pgshift; |
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unsigned long rb = 0, va_low, sllp; |
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b_pgshift = a_pgshift = kvmppc_hpte_page_shifts(v, r); |
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if (a_pgshift >= 0x100) { |
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b_pgshift &= 0xff; |
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a_pgshift >>= 8; |
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} |
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/* |
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* Ignore the top 14 bits of va |
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* v have top two bits covering segment size, hence move |
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* by 16 bits, Also clear the lower HPTE_V_AVPN_SHIFT (7) bits. |
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* AVA field in v also have the lower 23 bits ignored. |
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* For base page size 4K we need 14 .. 65 bits (so need to |
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* collect extra 11 bits) |
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* For others we need 14..14+i |
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*/ |
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/* This covers 14..54 bits of va*/ |
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rb = (v & ~0x7fUL) << 16; /* AVA field */ |
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/* |
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* AVA in v had cleared lower 23 bits. We need to derive |
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* that from pteg index |
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*/ |
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va_low = pte_index >> 3; |
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if (v & HPTE_V_SECONDARY) |
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va_low = ~va_low; |
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/* |
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* get the vpn bits from va_low using reverse of hashing. |
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* In v we have va with 23 bits dropped and then left shifted |
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* HPTE_V_AVPN_SHIFT (7) bits. Now to find vsid we need |
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* right shift it with (SID_SHIFT - (23 - 7)) |
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*/ |
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if (!(v & HPTE_V_1TB_SEG)) |
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va_low ^= v >> (SID_SHIFT - 16); |
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else |
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va_low ^= v >> (SID_SHIFT_1T - 16); |
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va_low &= 0x7ff; |
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if (b_pgshift <= 12) { |
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if (a_pgshift > 12) { |
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sllp = (a_pgshift == 16) ? 5 : 4; |
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rb |= sllp << 5; /* AP field */ |
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} |
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rb |= (va_low & 0x7ff) << 12; /* remaining 11 bits of AVA */ |
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} else { |
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int aval_shift; |
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/* |
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* remaining bits of AVA/LP fields |
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* Also contain the rr bits of LP |
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*/ |
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rb |= (va_low << b_pgshift) & 0x7ff000; |
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/* |
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* Now clear not needed LP bits based on actual psize |
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*/ |
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rb &= ~((1ul << a_pgshift) - 1); |
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/* |
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* AVAL field 58..77 - base_page_shift bits of va |
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* we have space for 58..64 bits, Missing bits should |
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* be zero filled. +1 is to take care of L bit shift |
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*/ |
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aval_shift = 64 - (77 - b_pgshift) + 1; |
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rb |= ((va_low << aval_shift) & 0xfe); |
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rb |= 1; /* L field */ |
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rb |= r & 0xff000 & ((1ul << a_pgshift) - 1); /* LP field */ |
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} |
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rb |= (v >> HPTE_V_SSIZE_SHIFT) << 8; /* B field */ |
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return rb; |
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} |
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static inline unsigned long hpte_rpn(unsigned long ptel, unsigned long psize) |
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{ |
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return ((ptel & HPTE_R_RPN) & ~(psize - 1)) >> PAGE_SHIFT; |
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} |
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static inline int hpte_is_writable(unsigned long ptel) |
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{ |
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unsigned long pp = ptel & (HPTE_R_PP0 | HPTE_R_PP); |
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return pp != PP_RXRX && pp != PP_RXXX; |
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} |
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static inline unsigned long hpte_make_readonly(unsigned long ptel) |
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{ |
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if ((ptel & HPTE_R_PP0) || (ptel & HPTE_R_PP) == PP_RWXX) |
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ptel = (ptel & ~HPTE_R_PP) | PP_RXXX; |
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else |
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ptel |= PP_RXRX; |
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return ptel; |
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} |
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static inline bool hpte_cache_flags_ok(unsigned long hptel, bool is_ci) |
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{ |
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unsigned int wimg = hptel & HPTE_R_WIMG; |
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/* Handle SAO */ |
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if (wimg == (HPTE_R_W | HPTE_R_I | HPTE_R_M) && |
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cpu_has_feature(CPU_FTR_ARCH_206)) |
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wimg = HPTE_R_M; |
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if (!is_ci) |
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return wimg == HPTE_R_M; |
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/* |
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* if host is mapped cache inhibited, make sure hptel also have |
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* cache inhibited. |
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*/ |
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if (wimg & HPTE_R_W) /* FIXME!! is this ok for all guest. ? */ |
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return false; |
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return !!(wimg & HPTE_R_I); |
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} |
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/* |
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* If it's present and writable, atomically set dirty and referenced bits and |
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* return the PTE, otherwise return 0. |
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*/ |
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static inline pte_t kvmppc_read_update_linux_pte(pte_t *ptep, int writing) |
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{ |
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pte_t old_pte, new_pte = __pte(0); |
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while (1) { |
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/* |
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* Make sure we don't reload from ptep |
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*/ |
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old_pte = READ_ONCE(*ptep); |
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/* |
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* wait until H_PAGE_BUSY is clear then set it atomically |
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*/ |
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if (unlikely(pte_val(old_pte) & H_PAGE_BUSY)) { |
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cpu_relax(); |
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continue; |
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} |
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/* If pte is not present return None */ |
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if (unlikely(!pte_present(old_pte))) |
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return __pte(0); |
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new_pte = pte_mkyoung(old_pte); |
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if (writing && pte_write(old_pte)) |
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new_pte = pte_mkdirty(new_pte); |
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if (pte_xchg(ptep, old_pte, new_pte)) |
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break; |
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} |
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return new_pte; |
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} |
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static inline bool hpte_read_permission(unsigned long pp, unsigned long key) |
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{ |
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if (key) |
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return PP_RWRX <= pp && pp <= PP_RXRX; |
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return true; |
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} |
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static inline bool hpte_write_permission(unsigned long pp, unsigned long key) |
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{ |
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if (key) |
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return pp == PP_RWRW; |
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return pp <= PP_RWRW; |
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} |
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static inline int hpte_get_skey_perm(unsigned long hpte_r, unsigned long amr) |
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{ |
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unsigned long skey; |
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skey = ((hpte_r & HPTE_R_KEY_HI) >> 57) | |
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((hpte_r & HPTE_R_KEY_LO) >> 9); |
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return (amr >> (62 - 2 * skey)) & 3; |
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} |
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static inline void lock_rmap(unsigned long *rmap) |
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{ |
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do { |
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while (test_bit(KVMPPC_RMAP_LOCK_BIT, rmap)) |
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cpu_relax(); |
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} while (test_and_set_bit_lock(KVMPPC_RMAP_LOCK_BIT, rmap)); |
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} |
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static inline void unlock_rmap(unsigned long *rmap) |
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{ |
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__clear_bit_unlock(KVMPPC_RMAP_LOCK_BIT, rmap); |
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} |
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static inline bool slot_is_aligned(struct kvm_memory_slot *memslot, |
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unsigned long pagesize) |
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{ |
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unsigned long mask = (pagesize >> PAGE_SHIFT) - 1; |
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if (pagesize <= PAGE_SIZE) |
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return true; |
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return !(memslot->base_gfn & mask) && !(memslot->npages & mask); |
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} |
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/* |
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* This works for 4k, 64k and 16M pages on POWER7, |
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* and 4k and 16M pages on PPC970. |
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*/ |
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static inline unsigned long slb_pgsize_encoding(unsigned long psize) |
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{ |
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unsigned long senc = 0; |
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if (psize > 0x1000) { |
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senc = SLB_VSID_L; |
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if (psize == 0x10000) |
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senc |= SLB_VSID_LP_01; |
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} |
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return senc; |
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} |
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static inline int is_vrma_hpte(unsigned long hpte_v) |
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{ |
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return (hpte_v & ~0xffffffUL) == |
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(HPTE_V_1TB_SEG | (VRMA_VSID << (40 - 16))); |
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} |
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
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/* |
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* Note modification of an HPTE; set the HPTE modified bit |
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* if anyone is interested. |
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*/ |
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static inline void note_hpte_modification(struct kvm *kvm, |
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struct revmap_entry *rev) |
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{ |
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if (atomic_read(&kvm->arch.hpte_mod_interest)) |
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rev->guest_rpte |= HPTE_GR_MODIFIED; |
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} |
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/* |
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* Like kvm_memslots(), but for use in real mode when we can't do |
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* any RCU stuff (since the secondary threads are offline from the |
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* kernel's point of view), and we can't print anything. |
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* Thus we use rcu_dereference_raw() rather than rcu_dereference_check(). |
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*/ |
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static inline struct kvm_memslots *kvm_memslots_raw(struct kvm *kvm) |
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{ |
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return rcu_dereference_raw_check(kvm->memslots[0]); |
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} |
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extern void kvmppc_mmu_debugfs_init(struct kvm *kvm); |
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extern void kvmhv_radix_debugfs_init(struct kvm *kvm); |
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|
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extern void kvmhv_rm_send_ipi(int cpu); |
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static inline unsigned long kvmppc_hpt_npte(struct kvm_hpt_info *hpt) |
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{ |
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/* HPTEs are 2**4 bytes long */ |
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return 1UL << (hpt->order - 4); |
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} |
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static inline unsigned long kvmppc_hpt_mask(struct kvm_hpt_info *hpt) |
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{ |
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/* 128 (2**7) bytes in each HPTEG */ |
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return (1UL << (hpt->order - 7)) - 1; |
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} |
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/* Set bits in a dirty bitmap, which is in LE format */ |
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static inline void set_dirty_bits(unsigned long *map, unsigned long i, |
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unsigned long npages) |
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{ |
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if (npages >= 8) |
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memset((char *)map + i / 8, 0xff, npages / 8); |
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else |
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for (; npages; ++i, --npages) |
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__set_bit_le(i, map); |
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} |
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static inline void set_dirty_bits_atomic(unsigned long *map, unsigned long i, |
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unsigned long npages) |
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{ |
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if (npages >= 8) |
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memset((char *)map + i / 8, 0xff, npages / 8); |
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else |
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for (; npages; ++i, --npages) |
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set_bit_le(i, map); |
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} |
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static inline u64 sanitize_msr(u64 msr) |
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{ |
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msr &= ~MSR_HV; |
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msr |= MSR_ME; |
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return msr; |
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} |
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
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static inline void copy_from_checkpoint(struct kvm_vcpu *vcpu) |
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{ |
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vcpu->arch.regs.ccr = vcpu->arch.cr_tm; |
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vcpu->arch.regs.xer = vcpu->arch.xer_tm; |
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vcpu->arch.regs.link = vcpu->arch.lr_tm; |
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vcpu->arch.regs.ctr = vcpu->arch.ctr_tm; |
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vcpu->arch.amr = vcpu->arch.amr_tm; |
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vcpu->arch.ppr = vcpu->arch.ppr_tm; |
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vcpu->arch.dscr = vcpu->arch.dscr_tm; |
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vcpu->arch.tar = vcpu->arch.tar_tm; |
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memcpy(vcpu->arch.regs.gpr, vcpu->arch.gpr_tm, |
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sizeof(vcpu->arch.regs.gpr)); |
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vcpu->arch.fp = vcpu->arch.fp_tm; |
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vcpu->arch.vr = vcpu->arch.vr_tm; |
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vcpu->arch.vrsave = vcpu->arch.vrsave_tm; |
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} |
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static inline void copy_to_checkpoint(struct kvm_vcpu *vcpu) |
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{ |
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vcpu->arch.cr_tm = vcpu->arch.regs.ccr; |
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vcpu->arch.xer_tm = vcpu->arch.regs.xer; |
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vcpu->arch.lr_tm = vcpu->arch.regs.link; |
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vcpu->arch.ctr_tm = vcpu->arch.regs.ctr; |
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vcpu->arch.amr_tm = vcpu->arch.amr; |
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vcpu->arch.ppr_tm = vcpu->arch.ppr; |
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vcpu->arch.dscr_tm = vcpu->arch.dscr; |
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vcpu->arch.tar_tm = vcpu->arch.tar; |
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memcpy(vcpu->arch.gpr_tm, vcpu->arch.regs.gpr, |
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sizeof(vcpu->arch.regs.gpr)); |
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vcpu->arch.fp_tm = vcpu->arch.fp; |
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vcpu->arch.vr_tm = vcpu->arch.vr; |
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vcpu->arch.vrsave_tm = vcpu->arch.vrsave; |
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} |
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#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ |
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extern int kvmppc_create_pte(struct kvm *kvm, pgd_t *pgtable, pte_t pte, |
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unsigned long gpa, unsigned int level, |
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unsigned long mmu_seq, unsigned int lpid, |
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unsigned long *rmapp, struct rmap_nested **n_rmap); |
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extern void kvmhv_insert_nest_rmap(struct kvm *kvm, unsigned long *rmapp, |
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struct rmap_nested **n_rmap); |
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extern void kvmhv_update_nest_rmap_rc_list(struct kvm *kvm, unsigned long *rmapp, |
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unsigned long clr, unsigned long set, |
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unsigned long hpa, unsigned long nbytes); |
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extern void kvmhv_remove_nest_rmap_range(struct kvm *kvm, |
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const struct kvm_memory_slot *memslot, |
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unsigned long gpa, unsigned long hpa, |
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unsigned long nbytes); |
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|
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static inline pte_t * |
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find_kvm_secondary_pte_unlocked(struct kvm *kvm, unsigned long ea, |
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unsigned *hshift) |
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{ |
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pte_t *pte; |
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|
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pte = __find_linux_pte(kvm->arch.pgtable, ea, NULL, hshift); |
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return pte; |
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} |
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static inline pte_t *find_kvm_secondary_pte(struct kvm *kvm, unsigned long ea, |
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unsigned *hshift) |
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{ |
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pte_t *pte; |
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|
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VM_WARN(!spin_is_locked(&kvm->mmu_lock), |
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"%s called with kvm mmu_lock not held \n", __func__); |
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pte = __find_linux_pte(kvm->arch.pgtable, ea, NULL, hshift); |
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|
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return pte; |
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} |
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static inline pte_t *find_kvm_host_pte(struct kvm *kvm, unsigned long mmu_seq, |
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unsigned long ea, unsigned *hshift) |
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{ |
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pte_t *pte; |
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|
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VM_WARN(!spin_is_locked(&kvm->mmu_lock), |
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"%s called with kvm mmu_lock not held \n", __func__); |
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|
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if (mmu_notifier_retry(kvm, mmu_seq)) |
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return NULL; |
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pte = __find_linux_pte(kvm->mm->pgd, ea, NULL, hshift); |
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|
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return pte; |
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} |
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extern pte_t *find_kvm_nested_guest_pte(struct kvm *kvm, unsigned long lpid, |
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unsigned long ea, unsigned *hshift); |
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#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ |
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#endif /* __ASM_KVM_BOOK3S_64_H__ */
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