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249 lines
6.2 KiB
249 lines
6.2 KiB
/* |
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* P1022/P1013 Silicon/SoC Device Tree Source (post include) |
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* |
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* Copyright 2011 Freescale Semiconductor Inc. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* * Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* * Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* * Neither the name of Freescale Semiconductor nor the |
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* names of its contributors may be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* |
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* ALTERNATIVELY, this software may be distributed under the terms of the |
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* GNU General Public License ("GPL") as published by the Free Software |
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* Foundation, either version 2 of that License or (at your option) any |
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* later version. |
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* |
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY |
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY |
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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&lbc { |
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#address-cells = <2>; |
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#size-cells = <1>; |
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/* |
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* The localbus on the P1022 is not a simple-bus because of the eLBC |
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* pin muxing when the DIU is enabled. |
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*/ |
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compatible = "fsl,p1022-elbc", "fsl,elbc"; |
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interrupts = <19 2 0 0>, |
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<16 2 0 0>; |
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}; |
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/* controller at 0x9000 */ |
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&pci0 { |
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compatible = "fsl,mpc8548-pcie"; |
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device_type = "pci"; |
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#size-cells = <2>; |
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#address-cells = <3>; |
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bus-range = <0 255>; |
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clock-frequency = <33333333>; |
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interrupts = <16 2 0 0>; |
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pcie@0 { |
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reg = <0 0 0 0 0>; |
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#interrupt-cells = <1>; |
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#size-cells = <2>; |
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#address-cells = <3>; |
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device_type = "pci"; |
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interrupts = <16 2 0 0>; |
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interrupt-map-mask = <0xf800 0 0 7>; |
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interrupt-map = < |
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/* IDSEL 0x0 */ |
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0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 |
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0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 |
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0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 |
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0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 |
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>; |
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}; |
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}; |
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/* controller at 0xa000 */ |
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&pci1 { |
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compatible = "fsl,mpc8548-pcie"; |
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device_type = "pci"; |
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#size-cells = <2>; |
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#address-cells = <3>; |
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bus-range = <0 255>; |
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clock-frequency = <33333333>; |
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interrupts = <16 2 0 0>; |
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pcie@0 { |
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reg = <0 0 0 0 0>; |
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#interrupt-cells = <1>; |
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#size-cells = <2>; |
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#address-cells = <3>; |
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device_type = "pci"; |
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interrupts = <16 2 0 0>; |
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interrupt-map-mask = <0xf800 0 0 7>; |
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interrupt-map = < |
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/* IDSEL 0x0 */ |
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0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 |
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0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 |
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0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 |
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0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 |
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>; |
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}; |
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}; |
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/* controller at 0xb000 */ |
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&pci2 { |
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compatible = "fsl,mpc8548-pcie"; |
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device_type = "pci"; |
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#size-cells = <2>; |
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#address-cells = <3>; |
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bus-range = <0 255>; |
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clock-frequency = <33333333>; |
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interrupts = <16 2 0 0>; |
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pcie@0 { |
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reg = <0 0 0 0 0>; |
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#interrupt-cells = <1>; |
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#size-cells = <2>; |
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#address-cells = <3>; |
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device_type = "pci"; |
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interrupts = <16 2 0 0>; |
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interrupt-map-mask = <0xf800 0 0 7>; |
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interrupt-map = < |
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/* IDSEL 0x0 */ |
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0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 |
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0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 |
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0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 |
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0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 |
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>; |
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}; |
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}; |
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&soc { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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device_type = "soc"; |
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compatible = "fsl,p1022-immr", "simple-bus"; |
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bus-frequency = <0>; // Filled out by uboot. |
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ecm-law@0 { |
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compatible = "fsl,ecm-law"; |
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reg = <0x0 0x1000>; |
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fsl,num-laws = <12>; |
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}; |
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ecm@1000 { |
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compatible = "fsl,p1022-ecm", "fsl,ecm"; |
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reg = <0x1000 0x1000>; |
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interrupts = <16 2 0 0>; |
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}; |
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memory-controller@2000 { |
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compatible = "fsl,p1022-memory-controller"; |
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reg = <0x2000 0x1000>; |
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interrupts = <16 2 0 0>; |
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}; |
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/include/ "pq3-i2c-0.dtsi" |
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/include/ "pq3-i2c-1.dtsi" |
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/include/ "pq3-duart-0.dtsi" |
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/include/ "pq3-espi-0.dtsi" |
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spi@7000 { |
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fsl,espi-num-chipselects = <4>; |
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}; |
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/include/ "pq3-dma-1.dtsi" |
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dma@c300 { |
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dma00: dma-channel@0 { |
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compatible = "fsl,ssi-dma-channel"; |
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}; |
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dma01: dma-channel@80 { |
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compatible = "fsl,ssi-dma-channel"; |
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}; |
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}; |
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/include/ "pq3-gpio-0.dtsi" |
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display: display@10000 { |
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compatible = "fsl,diu", "fsl,p1022-diu"; |
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reg = <0x10000 1000>; |
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interrupts = <64 2 0 0>; |
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}; |
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ssi@15000 { |
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compatible = "fsl,mpc8610-ssi"; |
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cell-index = <0>; |
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reg = <0x15000 0x100>; |
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interrupts = <75 2 0 0>; |
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fsl,playback-dma = <&dma00>; |
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fsl,capture-dma = <&dma01>; |
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fsl,fifo-depth = <15>; |
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}; |
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/include/ "pq3-sata2-0.dtsi" |
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/include/ "pq3-sata2-1.dtsi" |
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L2: l2-cache-controller@20000 { |
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compatible = "fsl,p1022-l2-cache-controller"; |
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reg = <0x20000 0x1000>; |
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cache-line-size = <32>; // 32 bytes |
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cache-size = <0x40000>; // L2,256K |
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interrupts = <16 2 0 0>; |
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}; |
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/include/ "pq3-dma-0.dtsi" |
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/include/ "pq3-usb2-dr-0.dtsi" |
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usb@22000 { |
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compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; |
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}; |
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/include/ "pq3-usb2-dr-1.dtsi" |
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usb@23000 { |
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compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; |
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}; |
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/include/ "pq3-esdhc-0.dtsi" |
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sdhc@2e000 { |
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compatible = "fsl,p1022-esdhc", "fsl,esdhc"; |
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sdhci,auto-cmd12; |
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}; |
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/include/ "pq3-sec3.3-0.dtsi" |
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/include/ "pq3-mpic.dtsi" |
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/include/ "pq3-mpic-timer-B.dtsi" |
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/include/ "pq3-etsec2-0.dtsi" |
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enet0: enet0_grp2: ethernet@b0000 { |
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fsl,wake-on-filer; |
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}; |
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/include/ "pq3-etsec2-1.dtsi" |
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enet1: enet1_grp2: ethernet@b1000 { |
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fsl,wake-on-filer; |
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}; |
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global-utilities@e0000 { |
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compatible = "fsl,p1022-guts"; |
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reg = <0xe0000 0x1000>; |
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fsl,has-rstcr; |
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}; |
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power@e0070{ |
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compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc"; |
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reg = <0xe0070 0x20>; |
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}; |
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}; |
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/include/ "pq3-etsec2-grp2-0.dtsi" |
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/include/ "pq3-etsec2-grp2-1.dtsi"
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