mirror of https://github.com/Qortal/Brooklyn
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
251 lines
4.8 KiB
251 lines
4.8 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
|
/* |
|
* GE IMP3A Device Tree Source |
|
* |
|
* Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc. |
|
* |
|
* Based on: P2020 DS Device Tree Source |
|
* Copyright 2009 Freescale Semiconductor Inc. |
|
*/ |
|
|
|
/include/ "p2020si-pre.dtsi" |
|
|
|
/ { |
|
model = "GE_IMP3A"; |
|
compatible = "ge,imp3a"; |
|
|
|
memory { |
|
device_type = "memory"; |
|
}; |
|
|
|
lbc: localbus@fef05000 { |
|
reg = <0 0xfef05000 0 0x1000>; |
|
|
|
ranges = <0x0 0x0 0x0 0xff000000 0x01000000 |
|
0x1 0x0 0x0 0xe0000000 0x08000000 |
|
0x2 0x0 0x0 0xe8000000 0x08000000 |
|
0x3 0x0 0x0 0xfc100000 0x00020000 |
|
0x4 0x0 0x0 0xfc000000 0x00008000 |
|
0x5 0x0 0x0 0xfc008000 0x00008000 |
|
0x6 0x0 0x0 0xfee00000 0x00040000 |
|
0x7 0x0 0x0 0xfee80000 0x00040000>; |
|
|
|
/* nor@0,0 is a mirror of part of the memory in nor@1,0 |
|
nor@0,0 { |
|
#address-cells = <1>; |
|
#size-cells = <1>; |
|
compatible = "ge,imp3a-firmware-mirror", "cfi-flash"; |
|
reg = <0x0 0x0 0x1000000>; |
|
bank-width = <2>; |
|
device-width = <1>; |
|
|
|
partition@0 { |
|
label = "firmware"; |
|
reg = <0x0 0x1000000>; |
|
read-only; |
|
}; |
|
}; |
|
*/ |
|
|
|
nor@1,0 { |
|
#address-cells = <1>; |
|
#size-cells = <1>; |
|
compatible = "ge,imp3a-paged-flash", "cfi-flash"; |
|
reg = <0x1 0x0 0x8000000>; |
|
bank-width = <2>; |
|
device-width = <1>; |
|
|
|
partition@0 { |
|
label = "user"; |
|
reg = <0x0 0x7800000>; |
|
}; |
|
|
|
partition@7800000 { |
|
label = "firmware"; |
|
reg = <0x7800000 0x800000>; |
|
read-only; |
|
}; |
|
}; |
|
|
|
nvram@3,0 { |
|
device_type = "nvram"; |
|
compatible = "simtek,stk14ca8"; |
|
reg = <0x3 0x0 0x20000>; |
|
}; |
|
|
|
fpga@4,0 { |
|
compatible = "ge,imp3a-fpga-regs"; |
|
reg = <0x4 0x0 0x20>; |
|
}; |
|
|
|
gef_pic: pic@4,20 { |
|
#interrupt-cells = <1>; |
|
interrupt-controller; |
|
device_type = "interrupt-controller"; |
|
compatible = "ge,imp3a-fpga-pic", "gef,fpga-pic-1.00"; |
|
reg = <0x4 0x20 0x20>; |
|
interrupts = <6 7 0 0>; |
|
}; |
|
|
|
gef_gpio: gpio@4,400 { |
|
#gpio-cells = <2>; |
|
compatible = "ge,imp3a-gpio"; |
|
reg = <0x4 0x400 0x24>; |
|
gpio-controller; |
|
}; |
|
|
|
wdt@4,800 { |
|
compatible = "ge,imp3a-fpga-wdt", "gef,fpga-wdt-1.00", |
|
"gef,fpga-wdt"; |
|
reg = <0x4 0x800 0x8>; |
|
interrupts = <10 4>; |
|
interrupt-parent = <&gef_pic>; |
|
}; |
|
|
|
/* Second watchdog available, driver currently supports one. |
|
wdt@4,808 { |
|
compatible = "gef,imp3a-fpga-wdt", "gef,fpga-wdt-1.00", |
|
"gef,fpga-wdt"; |
|
reg = <0x4 0x808 0x8>; |
|
interrupts = <9 4>; |
|
interrupt-parent = <&gef_pic>; |
|
}; |
|
*/ |
|
|
|
nand@6,0 { |
|
compatible = "fsl,elbc-fcm-nand"; |
|
reg = <0x6 0x0 0x40000>; |
|
}; |
|
|
|
nand@7,0 { |
|
compatible = "fsl,elbc-fcm-nand"; |
|
reg = <0x7 0x0 0x40000>; |
|
}; |
|
}; |
|
|
|
soc: soc@fef00000 { |
|
ranges = <0x0 0 0xfef00000 0x100000>; |
|
|
|
i2c@3000 { |
|
hwmon@48 { |
|
compatible = "national,lm92"; |
|
reg = <0x48>; |
|
}; |
|
|
|
hwmon@4c { |
|
compatible = "adi,adt7461"; |
|
reg = <0x4c>; |
|
}; |
|
|
|
rtc@51 { |
|
compatible = "epson,rx8581"; |
|
reg = <0x51>; |
|
}; |
|
|
|
eti@6b { |
|
compatible = "dallas,ds1682"; |
|
reg = <0x6b>; |
|
}; |
|
}; |
|
|
|
usb@22000 { |
|
phy_type = "ulpi"; |
|
dr_mode = "host"; |
|
}; |
|
|
|
mdio@24520 { |
|
phy0: ethernet-phy@0 { |
|
interrupt-parent = <&gef_pic>; |
|
interrupts = <0xc 0x4>; |
|
reg = <0x1>; |
|
}; |
|
phy1: ethernet-phy@1 { |
|
interrupt-parent = <&gef_pic>; |
|
interrupts = <0xb 0x4>; |
|
reg = <0x2>; |
|
}; |
|
tbi0: tbi-phy@11 { |
|
reg = <0x11>; |
|
device_type = "tbi-phy"; |
|
}; |
|
}; |
|
|
|
mdio@25520 { |
|
tbi1: tbi-phy@11 { |
|
reg = <0x11>; |
|
device_type = "tbi-phy"; |
|
}; |
|
}; |
|
|
|
mdio@26520 { |
|
status = "disabled"; |
|
}; |
|
|
|
enet0: ethernet@24000 { |
|
tbi-handle = <&tbi0>; |
|
phy-handle = <&phy0>; |
|
phy-connection-type = "gmii"; |
|
}; |
|
|
|
enet1: ethernet@25000 { |
|
tbi-handle = <&tbi1>; |
|
phy-handle = <&phy1>; |
|
phy-connection-type = "gmii"; |
|
}; |
|
|
|
enet2: ethernet@26000 { |
|
status = "disabled"; |
|
}; |
|
}; |
|
|
|
pci0: pcie@fef08000 { |
|
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 |
|
0x1000000 0x0 0x00000000 0 0xfe020000 0x0 0x10000>; |
|
reg = <0 0xfef08000 0 0x1000>; |
|
|
|
pcie@0 { |
|
ranges = <0x2000000 0x0 0xc0000000 |
|
0x2000000 0x0 0xc0000000 |
|
0x0 0x20000000 |
|
|
|
0x1000000 0x0 0x0 |
|
0x1000000 0x0 0x0 |
|
0x0 0x10000>; |
|
}; |
|
}; |
|
|
|
pci1: pcie@fef09000 { |
|
reg = <0 0xfef09000 0 0x1000>; |
|
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 |
|
0x1000000 0x0 0x00000000 0 0xfe010000 0x0 0x10000>; |
|
|
|
pcie@0 { |
|
ranges = <0x2000000 0x0 0xa0000000 |
|
0x2000000 0x0 0xa0000000 |
|
0x0 0x20000000 |
|
|
|
0x1000000 0x0 0x0 |
|
0x1000000 0x0 0x0 |
|
0x0 0x10000>; |
|
}; |
|
|
|
}; |
|
|
|
pci2: pcie@fef0a000 { |
|
reg = <0 0xfef0a000 0 0x1000>; |
|
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 |
|
0x1000000 0x0 0x00000000 0 0xfe000000 0x0 0x10000>; |
|
|
|
pcie@0 { |
|
ranges = <0x2000000 0x0 0x80000000 |
|
0x2000000 0x0 0x80000000 |
|
0x0 0x20000000 |
|
|
|
0x1000000 0x0 0x0 |
|
0x1000000 0x0 0x0 |
|
0x0 0x10000>; |
|
}; |
|
}; |
|
}; |
|
|
|
/include/ "p2020si-post.dtsi"
|
|
|