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151 lines
3.1 KiB
151 lines
3.1 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Cyrus 5020 Device Tree Source, based on p5020ds.dts |
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* |
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* Copyright 2015 Andy Fleming |
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* |
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* p5020ds.dts copyright: |
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* Copyright 2010 - 2014 Freescale Semiconductor Inc. |
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*/ |
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/include/ "p5020si-pre.dtsi" |
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/ { |
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model = "varisys,CYRUS"; |
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compatible = "varisys,CYRUS"; |
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#address-cells = <2>; |
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#size-cells = <2>; |
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interrupt-parent = <&mpic>; |
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memory { |
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device_type = "memory"; |
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}; |
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reserved-memory { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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ranges; |
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bman_fbpr: bman-fbpr { |
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size = <0 0x1000000>; |
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alignment = <0 0x1000000>; |
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}; |
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qman_fqd: qman-fqd { |
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size = <0 0x400000>; |
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alignment = <0 0x400000>; |
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}; |
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qman_pfdr: qman-pfdr { |
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size = <0 0x2000000>; |
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alignment = <0 0x2000000>; |
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}; |
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}; |
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dcsr: dcsr@f00000000 { |
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ranges = <0x00000000 0xf 0x00000000 0x01008000>; |
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}; |
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bportals: bman-portals@ff4000000 { |
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ranges = <0x0 0xf 0xf4000000 0x200000>; |
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}; |
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qportals: qman-portals@ff4200000 { |
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ranges = <0x0 0xf 0xf4200000 0x200000>; |
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}; |
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soc: soc@ffe000000 { |
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ranges = <0x00000000 0xf 0xfe000000 0x1000000>; |
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reg = <0xf 0xfe000000 0 0x00001000>; |
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spi@110000 { |
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}; |
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i2c@118100 { |
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}; |
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i2c@119100 { |
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rtc@6f { |
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compatible = "microchip,mcp7941x"; |
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reg = <0x6f>; |
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}; |
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}; |
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}; |
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rio: rapidio@ffe0c0000 { |
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reg = <0xf 0xfe0c0000 0 0x11000>; |
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port1 { |
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ranges = <0 0 0xc 0x20000000 0 0x10000000>; |
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}; |
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port2 { |
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ranges = <0 0 0xc 0x30000000 0 0x10000000>; |
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}; |
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}; |
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lbc: localbus@ffe124000 { |
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reg = <0xf 0xfe124000 0 0x1000>; |
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ranges = <0 0 0xf 0xe8000000 0x08000000 |
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2 0 0xf 0xffa00000 0x00040000 |
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3 0 0xf 0xffdf0000 0x00008000>; |
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}; |
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pci0: pcie@ffe200000 { |
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reg = <0xf 0xfe200000 0 0x1000>; |
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ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 |
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0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; |
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pcie@0 { |
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ranges = <0x02000000 0 0xe0000000 |
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0x02000000 0 0xe0000000 |
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0 0x20000000 |
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0x01000000 0 0x00000000 |
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0x01000000 0 0x00000000 |
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0 0x00010000>; |
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}; |
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}; |
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pci1: pcie@ffe201000 { |
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reg = <0xf 0xfe201000 0 0x1000>; |
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ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 |
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0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; |
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pcie@0 { |
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ranges = <0x02000000 0 0xe0000000 |
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0x02000000 0 0xe0000000 |
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0 0x20000000 |
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0x01000000 0 0x00000000 |
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0x01000000 0 0x00000000 |
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0 0x00010000>; |
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}; |
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}; |
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pci2: pcie@ffe202000 { |
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reg = <0xf 0xfe202000 0 0x1000>; |
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ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 |
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0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; |
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pcie@0 { |
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ranges = <0x02000000 0 0xe0000000 |
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0x02000000 0 0xe0000000 |
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0 0x20000000 |
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0x01000000 0 0x00000000 |
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0x01000000 0 0x00000000 |
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0 0x00010000>; |
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}; |
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}; |
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pci3: pcie@ffe203000 { |
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reg = <0xf 0xfe203000 0 0x1000>; |
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ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000 |
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0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; |
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pcie@0 { |
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ranges = <0x02000000 0 0xe0000000 |
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0x02000000 0 0xe0000000 |
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0 0x20000000 |
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0x01000000 0 0x00000000 |
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0x01000000 0 0x00000000 |
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0 0x00010000>; |
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}; |
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}; |
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}; |
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/include/ "p5020si-post.dtsi"
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