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798 lines
17 KiB
798 lines
17 KiB
=============================================== |
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ETMv4 sysfs linux driver programming reference. |
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=============================================== |
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:Author: Mike Leach <[email protected]> |
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:Date: October 11th, 2019 |
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|
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Supplement to existing ETMv4 driver documentation. |
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Sysfs files and directories |
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--------------------------- |
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Root: ``/sys/bus/coresight/devices/etm<N>`` |
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The following paragraphs explain the association between sysfs files and the |
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ETMv4 registers that they effect. Note the register names are given without |
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the ‘TRC’ prefix. |
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---- |
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:File: ``mode`` (rw) |
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:Trace Registers: {CONFIGR + others} |
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:Notes: |
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Bit select trace features. See ‘mode’ section below. Bits |
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in this will cause equivalent programming of trace config and |
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other registers to enable the features requested. |
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:Syntax & eg: |
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``echo bitfield > mode`` |
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bitfield up to 32 bits setting trace features. |
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:Example: |
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``$> echo 0x012 > mode`` |
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---- |
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:File: ``reset`` (wo) |
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:Trace Registers: All |
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:Notes: |
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Reset all programming to trace nothing / no logic programmed. |
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:Syntax: |
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``echo 1 > reset`` |
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---- |
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:File: ``enable_source`` (wo) |
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:Trace Registers: PRGCTLR, All hardware regs. |
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:Notes: |
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- > 0 : Programs up the hardware with the current values held in the driver |
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and enables trace. |
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- = 0 : disable trace hardware. |
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:Syntax: |
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``echo 1 > enable_source`` |
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---- |
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:File: ``cpu`` (ro) |
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:Trace Registers: None. |
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:Notes: |
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CPU ID that this ETM is attached to. |
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:Example: |
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``$> cat cpu`` |
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``$> 0`` |
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---- |
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:File: ``addr_idx`` (rw) |
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:Trace Registers: None. |
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:Notes: |
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Virtual register to index address comparator and range |
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features. Set index for first of the pair in a range. |
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:Syntax: |
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``echo idx > addr_idx`` |
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Where idx < nr_addr_cmp x 2 |
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---- |
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:File: ``addr_range`` (rw) |
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:Trace Registers: ACVR[idx, idx+1], VIIECTLR |
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:Notes: |
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Pair of addresses for a range selected by addr_idx. Include |
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/ exclude according to the optional parameter, or if omitted |
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uses the current ‘mode’ setting. Select comparator range in |
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control register. Error if index is odd value. |
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:Depends: ``mode, addr_idx`` |
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:Syntax: |
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``echo addr1 addr2 [exclude] > addr_range`` |
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Where addr1 and addr2 define the range and addr1 < addr2. |
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Optional exclude value:- |
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- 0 for include |
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- 1 for exclude. |
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:Example: |
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``$> echo 0x0000 0x2000 0 > addr_range`` |
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---- |
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:File: ``addr_single`` (rw) |
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:Trace Registers: ACVR[idx] |
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:Notes: |
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Set a single address comparator according to addr_idx. This |
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is used if the address comparator is used as part of event |
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generation logic etc. |
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:Depends: ``addr_idx`` |
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:Syntax: |
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``echo addr1 > addr_single`` |
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---- |
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:File: ``addr_start`` (rw) |
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:Trace Registers: ACVR[idx], VISSCTLR |
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:Notes: |
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Set a trace start address comparator according to addr_idx. |
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Select comparator in control register. |
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:Depends: ``addr_idx`` |
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:Syntax: |
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``echo addr1 > addr_start`` |
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---- |
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:File: ``addr_stop`` (rw) |
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:Trace Registers: ACVR[idx], VISSCTLR |
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:Notes: |
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Set a trace stop address comparator according to addr_idx. |
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Select comparator in control register. |
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:Depends: ``addr_idx`` |
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:Syntax: |
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``echo addr1 > addr_stop`` |
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---- |
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:File: ``addr_context`` (rw) |
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:Trace Registers: ACATR[idx,{6:4}] |
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:Notes: |
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Link context ID comparator to address comparator addr_idx |
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:Depends: ``addr_idx`` |
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:Syntax: |
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``echo ctxt_idx > addr_context`` |
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Where ctxt_idx is the index of the linked context id / vmid |
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comparator. |
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---- |
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:File: ``addr_ctxtype`` (rw) |
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:Trace Registers: ACATR[idx,{3:2}] |
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:Notes: |
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Input value string. Set type for linked context ID comparator |
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:Depends: ``addr_idx`` |
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:Syntax: |
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``echo type > addr_ctxtype`` |
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Type one of {all, vmid, ctxid, none} |
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:Example: |
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``$> echo ctxid > addr_ctxtype`` |
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---- |
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:File: ``addr_exlevel_s_ns`` (rw) |
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:Trace Registers: ACATR[idx,{14:8}] |
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:Notes: |
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Set the ELx secure and non-secure matching bits for the |
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selected address comparator |
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:Depends: ``addr_idx`` |
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:Syntax: |
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``echo val > addr_exlevel_s_ns`` |
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val is a 7 bit value for exception levels to exclude. Input |
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value shifted to correct bits in register. |
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:Example: |
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``$> echo 0x4F > addr_exlevel_s_ns`` |
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---- |
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:File: ``addr_instdatatype`` (rw) |
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:Trace Registers: ACATR[idx,{1:0}] |
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:Notes: |
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Set the comparator address type for matching. Driver only |
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supports setting instruction address type. |
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:Depends: ``addr_idx`` |
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---- |
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:File: ``addr_cmp_view`` (ro) |
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:Trace Registers: ACVR[idx, idx+1], ACATR[idx], VIIECTLR |
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:Notes: |
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Read the currently selected address comparator. If part of |
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address range then display both addresses. |
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:Depends: ``addr_idx`` |
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:Syntax: |
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``cat addr_cmp_view`` |
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:Example: |
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``$> cat addr_cmp_view`` |
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``addr_cmp[0] range 0x0 0xffffffffffffffff include ctrl(0x4b00)`` |
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---- |
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:File: ``nr_addr_cmp`` (ro) |
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:Trace Registers: From IDR4 |
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:Notes: |
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Number of address comparator pairs |
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---- |
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:File: ``sshot_idx`` (rw) |
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:Trace Registers: None |
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:Notes: |
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Select single shot register set. |
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---- |
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:File: ``sshot_ctrl`` (rw) |
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:Trace Registers: SSCCR[idx] |
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:Notes: |
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Access a single shot comparator control register. |
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:Depends: ``sshot_idx`` |
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:Syntax: |
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``echo val > sshot_ctrl`` |
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Writes val into the selected control register. |
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---- |
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:File: ``sshot_status`` (ro) |
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:Trace Registers: SSCSR[idx] |
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:Notes: |
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Read a single shot comparator status register |
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:Depends: ``sshot_idx`` |
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:Syntax: |
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``cat sshot_status`` |
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Read status. |
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:Example: |
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``$> cat sshot_status`` |
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``0x1`` |
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---- |
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:File: ``sshot_pe_ctrl`` (rw) |
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:Trace Registers: SSPCICR[idx] |
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:Notes: |
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Access a single shot PE comparator input control register. |
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:Depends: ``sshot_idx`` |
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:Syntax: |
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``echo val > sshot_pe_ctrl`` |
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Writes val into the selected control register. |
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---- |
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:File: ``ns_exlevel_vinst`` (rw) |
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:Trace Registers: VICTLR{23:20} |
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:Notes: |
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Program non-secure exception level filters. Set / clear NS |
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exception filter bits. Setting ‘1’ excludes trace from the |
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exception level. |
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:Syntax: |
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``echo bitfield > ns_exlevel_viinst`` |
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Where bitfield contains bits to set clear for EL0 to EL2 |
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:Example: |
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``%> echo 0x4 > ns_exlevel_viinst`` |
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Excludes EL2 NS trace. |
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---- |
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:File: ``vinst_pe_cmp_start_stop`` (rw) |
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:Trace Registers: VIPCSSCTLR |
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:Notes: |
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Access PE start stop comparator input control registers |
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---- |
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:File: ``bb_ctrl`` (rw) |
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:Trace Registers: BBCTLR |
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:Notes: |
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Define ranges that Branch Broadcast will operate in. |
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Default (0x0) is all addresses. |
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:Depends: BB enabled. |
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---- |
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:File: ``cyc_threshold`` (rw) |
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:Trace Registers: CCCTLR |
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:Notes: |
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Set the threshold for which cycle counts will be emitted. |
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Error if attempt to set below minimum defined in IDR3, masked |
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to width of valid bits. |
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:Depends: CC enabled. |
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---- |
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:File: ``syncfreq`` (rw) |
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:Trace Registers: SYNCPR |
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:Notes: |
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Set trace synchronisation period. Power of 2 value, 0 (off) |
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or 8-20. Driver defaults to 12 (every 4096 bytes). |
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---- |
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:File: ``cntr_idx`` (rw) |
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:Trace Registers: none |
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:Notes: |
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Select the counter to access |
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:Syntax: |
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``echo idx > cntr_idx`` |
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Where idx < nr_cntr |
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---- |
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:File: ``cntr_ctrl`` (rw) |
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:Trace Registers: CNTCTLR[idx] |
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:Notes: |
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Set counter control value. |
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:Depends: ``cntr_idx`` |
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:Syntax: |
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``echo val > cntr_ctrl`` |
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Where val is per ETMv4 spec. |
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---- |
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:File: ``cntrldvr`` (rw) |
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:Trace Registers: CNTRLDVR[idx] |
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:Notes: |
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Set counter reload value. |
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:Depends: ``cntr_idx`` |
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:Syntax: |
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``echo val > cntrldvr`` |
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Where val is per ETMv4 spec. |
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---- |
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:File: ``nr_cntr`` (ro) |
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:Trace Registers: From IDR5 |
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:Notes: |
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Number of counters implemented. |
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---- |
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:File: ``ctxid_idx`` (rw) |
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:Trace Registers: None |
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:Notes: |
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Select the context ID comparator to access |
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:Syntax: |
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``echo idx > ctxid_idx`` |
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Where idx < numcidc |
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---- |
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:File: ``ctxid_pid`` (rw) |
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:Trace Registers: CIDCVR[idx] |
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:Notes: |
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Set the context ID comparator value |
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:Depends: ``ctxid_idx`` |
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---- |
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:File: ``ctxid_masks`` (rw) |
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:Trace Registers: CIDCCTLR0, CIDCCTLR1, CIDCVR<0-7> |
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:Notes: |
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Pair of values to set the byte masks for 1-8 context ID |
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comparators. Automatically clears masked bytes to 0 in CID |
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value registers. |
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:Syntax: |
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``echo m3m2m1m0 [m7m6m5m4] > ctxid_masks`` |
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32 bit values made up of mask bytes, where mN represents a |
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byte mask value for Context ID comparator N. |
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Second value not required on systems that have fewer than 4 |
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context ID comparators |
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---- |
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:File: ``numcidc`` (ro) |
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:Trace Registers: From IDR4 |
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:Notes: |
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Number of Context ID comparators |
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---- |
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:File: ``vmid_idx`` (rw) |
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:Trace Registers: None |
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:Notes: |
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Select the VM ID comparator to access. |
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:Syntax: |
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``echo idx > vmid_idx`` |
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Where idx < numvmidc |
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---- |
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:File: ``vmid_val`` (rw) |
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:Trace Registers: VMIDCVR[idx] |
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:Notes: |
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Set the VM ID comparator value |
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:Depends: ``vmid_idx`` |
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---- |
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:File: ``vmid_masks`` (rw) |
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:Trace Registers: VMIDCCTLR0, VMIDCCTLR1, VMIDCVR<0-7> |
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:Notes: |
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Pair of values to set the byte masks for 1-8 VM ID comparators. |
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Automatically clears masked bytes to 0 in VMID value registers. |
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:Syntax: |
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``echo m3m2m1m0 [m7m6m5m4] > vmid_masks`` |
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Where mN represents a byte mask value for VMID comparator N. |
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Second value not required on systems that have fewer than 4 |
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VMID comparators. |
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---- |
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:File: ``numvmidc`` (ro) |
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:Trace Registers: From IDR4 |
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:Notes: |
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Number of VMID comparators |
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---- |
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:File: ``res_idx`` (rw) |
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:Trace Registers: None. |
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:Notes: |
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Select the resource selector control to access. Must be 2 or |
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higher as selectors 0 and 1 are hardwired. |
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:Syntax: |
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``echo idx > res_idx`` |
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Where 2 <= idx < nr_resource x 2 |
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---- |
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:File: ``res_ctrl`` (rw) |
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:Trace Registers: RSCTLR[idx] |
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:Notes: |
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Set resource selector control value. Value per ETMv4 spec. |
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:Depends: ``res_idx`` |
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:Syntax: |
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``echo val > res_cntr`` |
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Where val is per ETMv4 spec. |
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---- |
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:File: ``nr_resource`` (ro) |
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:Trace Registers: From IDR4 |
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:Notes: |
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Number of resource selector pairs |
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---- |
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:File: ``event`` (rw) |
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:Trace Registers: EVENTCTRL0R |
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:Notes: |
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Set up to 4 implemented event fields. |
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:Syntax: |
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``echo ev3ev2ev1ev0 > event`` |
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Where evN is an 8 bit event field. Up to 4 event fields make up the |
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32-bit input value. Number of valid fields is implementation dependent, |
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defined in IDR0. |
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---- |
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:File: ``event_instren`` (rw) |
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:Trace Registers: EVENTCTRL1R |
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:Notes: |
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Choose events which insert event packets into trace stream. |
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:Depends: EVENTCTRL0R |
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:Syntax: |
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``echo bitfield > event_instren`` |
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Where bitfield is up to 4 bits according to number of event fields. |
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---- |
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:File: ``event_ts`` (rw) |
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:Trace Registers: TSCTLR |
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:Notes: |
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Set the event that will generate timestamp requests. |
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:Depends: ``TS activated`` |
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:Syntax: |
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``echo evfield > event_ts`` |
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Where evfield is an 8 bit event selector. |
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---- |
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:File: ``seq_idx`` (rw) |
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:Trace Registers: None |
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:Notes: |
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Sequencer event register select - 0 to 2 |
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---- |
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:File: ``seq_state`` (rw) |
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:Trace Registers: SEQSTR |
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:Notes: |
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Sequencer current state - 0 to 3. |
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---- |
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:File: ``seq_event`` (rw) |
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:Trace Registers: SEQEVR[idx] |
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:Notes: |
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State transition event registers |
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:Depends: ``seq_idx`` |
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:Syntax: |
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``echo evBevF > seq_event`` |
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Where evBevF is a 16 bit value made up of two event selectors, |
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- evB : back |
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- evF : forwards. |
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---- |
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:File: ``seq_reset_event`` (rw) |
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:Trace Registers: SEQRSTEVR |
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:Notes: |
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Sequencer reset event |
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:Syntax: |
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``echo evfield > seq_reset_event`` |
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Where evfield is an 8 bit event selector. |
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|
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---- |
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:File: ``nrseqstate`` (ro) |
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:Trace Registers: From IDR5 |
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:Notes: |
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Number of sequencer states (0 or 4) |
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|
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---- |
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:File: ``nr_pe_cmp`` (ro) |
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:Trace Registers: From IDR4 |
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:Notes: |
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Number of PE comparator inputs |
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|
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---- |
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:File: ``nr_ext_inp`` (ro) |
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:Trace Registers: From IDR5 |
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:Notes: |
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Number of external inputs |
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|
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---- |
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:File: ``nr_ss_cmp`` (ro) |
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:Trace Registers: From IDR4 |
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:Notes: |
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Number of Single Shot control registers |
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|
|
---- |
|
|
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*Note:* When programming any address comparator the driver will tag the |
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comparator with a type used - i.e. RANGE, SINGLE, START, STOP. Once this tag |
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is set, then only the values can be changed using the same sysfs file / type |
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used to program it. |
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Thus:: |
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|
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% echo 0 > addr_idx ; select address comparator 0 |
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% echo 0x1000 0x5000 0 > addr_range ; set address range on comparators 0, 1. |
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% echo 0x2000 > addr_start ; error as comparator 0 is a range comparator |
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% echo 2 > addr_idx ; select address comparator 2 |
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% echo 0x2000 > addr_start ; this is OK as comparator 2 is unused. |
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% echo 0x3000 > addr_stop ; error as comparator 2 set as start address. |
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% echo 2 > addr_idx ; select address comparator 3 |
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% echo 0x3000 > addr_stop ; this is OK |
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|
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To remove programming on all the comparators (and all the other hardware) use |
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the reset parameter:: |
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% echo 1 > reset |
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|
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The ‘mode’ sysfs parameter. |
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--------------------------- |
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|
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This is a bitfield selection parameter that sets the overall trace mode for the |
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ETM. The table below describes the bits, using the defines from the driver |
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source file, along with a description of the feature these represent. Many |
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features are optional and therefore dependent on implementation in the |
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hardware. |
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Bit assignments shown below:- |
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|
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---- |
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|
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**bit (0):** |
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ETM_MODE_EXCLUDE |
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|
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**description:** |
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This is the default value for the include / exclude function when |
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setting address ranges. Set 1 for exclude range. When the mode |
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parameter is set this value is applied to the currently indexed |
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address range. |
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**bit (4):** |
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ETM_MODE_BB |
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**description:** |
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Set to enable branch broadcast if supported in hardware [IDR0]. |
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**bit (5):** |
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ETMv4_MODE_CYCACC |
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|
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**description:** |
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Set to enable cycle accurate trace if supported [IDR0]. |
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**bit (6):** |
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ETMv4_MODE_CTXID |
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**description:** |
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Set to enable context ID tracing if supported in hardware [IDR2]. |
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**bit (7):** |
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ETM_MODE_VMID |
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**description:** |
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Set to enable virtual machine ID tracing if supported [IDR2]. |
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**bit (11):** |
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ETMv4_MODE_TIMESTAMP |
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**description:** |
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Set to enable timestamp generation if supported [IDR0]. |
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**bit (12):** |
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ETM_MODE_RETURNSTACK |
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**description:** |
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Set to enable trace return stack use if supported [IDR0]. |
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|
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**bit (13-14):** |
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ETM_MODE_QELEM(val) |
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|
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**description:** |
|
‘val’ determines level of Q element support enabled if |
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implemented by the ETM [IDR0] |
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|
|
|
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**bit (19):** |
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ETM_MODE_ATB_TRIGGER |
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|
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**description:** |
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Set to enable the ATBTRIGGER bit in the event control register |
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[EVENTCTLR1] if supported [IDR5]. |
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**bit (20):** |
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ETM_MODE_LPOVERRIDE |
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**description:** |
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Set to enable the LPOVERRIDE bit in the event control register |
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[EVENTCTLR1], if supported [IDR5]. |
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**bit (21):** |
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ETM_MODE_ISTALL_EN |
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**description:** |
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Set to enable the ISTALL bit in the stall control register |
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[STALLCTLR] |
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**bit (23):** |
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ETM_MODE_INSTPRIO |
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**description:** |
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Set to enable the INSTPRIORITY bit in the stall control register |
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[STALLCTLR] , if supported [IDR0]. |
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**bit (24):** |
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ETM_MODE_NOOVERFLOW |
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**description:** |
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Set to enable the NOOVERFLOW bit in the stall control register |
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[STALLCTLR], if supported [IDR3]. |
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**bit (25):** |
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ETM_MODE_TRACE_RESET |
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**description:** |
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Set to enable the TRCRESET bit in the viewinst control register |
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[VICTLR] , if supported [IDR3]. |
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**bit (26):** |
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ETM_MODE_TRACE_ERR |
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**description:** |
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Set to enable the TRCCTRL bit in the viewinst control register |
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[VICTLR]. |
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**bit (27):** |
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ETM_MODE_VIEWINST_STARTSTOP |
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**description:** |
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Set the initial state value of the ViewInst start / stop logic |
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in the viewinst control register [VICTLR] |
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**bit (30):** |
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ETM_MODE_EXCL_KERN |
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**description:** |
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Set default trace setup to exclude kernel mode trace (see note a) |
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**bit (31):** |
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ETM_MODE_EXCL_USER |
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**description:** |
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Set default trace setup to exclude user space trace (see note a) |
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---- |
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*Note a)* On startup the ETM is programmed to trace the complete address space |
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using address range comparator 0. ‘mode’ bits 30 / 31 modify this setting to |
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set EL exclude bits for NS state in either user space (EL0) or kernel space |
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(EL1) in the address range comparator. (the default setting excludes all |
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secure EL, and NS EL2) |
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Once the reset parameter has been used, and/or custom programming has been |
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implemented - using these bits will result in the EL bits for address |
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comparator 0 being set in the same way. |
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*Note b)* Bits 2-3, 8-10, 15-16, 18, 22, control features that only work with |
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data trace. As A-profile data trace is architecturally prohibited in ETMv4, |
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these have been omitted here. Possible uses could be where a kernel has |
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support for control of R or M profile infrastructure as part of a heterogeneous |
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system. |
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Bits 17, 28-29 are unused.
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