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110 lines
3.2 KiB
110 lines
3.2 KiB
* ARM PrimeCell Color LCD Controller PL110/PL111 |
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See also Documentation/devicetree/bindings/arm/primecell.yaml |
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Required properties: |
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- compatible: must be one of: |
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"arm,pl110", "arm,primecell" |
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"arm,pl111", "arm,primecell" |
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- reg: base address and size of the control registers block |
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- interrupt-names: either the single entry "combined" representing a |
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combined interrupt output (CLCDINTR), or the four entries |
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"mbe", "vcomp", "lnbu", "fuf" representing the individual |
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CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts |
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- interrupts: contains an interrupt specifier for each entry in |
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interrupt-names |
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- clock-names: should contain "clcdclk" and "apb_pclk" |
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- clocks: contains phandle and clock specifier pairs for the entries |
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in the clock-names property. See |
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Documentation/devicetree/bindings/clock/clock-bindings.txt |
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Optional properties: |
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- memory-region: phandle to a node describing memory (see |
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Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) |
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to be used for the framebuffer; if not present, the framebuffer |
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may be located anywhere in the memory |
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- max-memory-bandwidth: maximum bandwidth in bytes per second that the |
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cell's memory interface can handle; if not present, the memory |
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interface is fast enough to handle all possible video modes |
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Required sub-nodes: |
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- port: describes LCD panel signals, following the common binding |
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for video transmitter interfaces; see |
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Documentation/devicetree/bindings/media/video-interfaces.txt |
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Deprecated properties: |
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The port's endbpoint subnode had this, now deprecated property |
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in the past. Drivers should be able to survive without it: |
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- arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values, |
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defining the way CLD pads are wired up; first value |
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contains index of the "CLD" external pin (pad) used |
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as R0 (first bit of the red component), second value |
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index of the pad used as G0, third value index of the |
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pad used as B0, see also "LCD panel signal multiplexing |
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details" paragraphs in the PL110/PL111 Technical |
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Reference Manuals; this implicitly defines available |
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color modes, for example: |
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- PL111 TFT 4:4:4 panel: |
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arm,pl11x,tft-r0g0b0-pads = <4 15 20>; |
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- PL110 TFT (1:)5:5:5 panel: |
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arm,pl11x,tft-r0g0b0-pads = <1 7 13>; |
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- PL111 TFT (1:)5:5:5 panel: |
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arm,pl11x,tft-r0g0b0-pads = <3 11 19>; |
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- PL111 TFT 5:6:5 panel: |
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arm,pl11x,tft-r0g0b0-pads = <3 10 19>; |
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- PL110 and PL111 TFT 8:8:8 panel: |
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arm,pl11x,tft-r0g0b0-pads = <0 8 16>; |
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- PL110 and PL111 TFT 8:8:8 panel, R & B components swapped: |
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arm,pl11x,tft-r0g0b0-pads = <16 8 0>; |
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Example: |
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clcd@10020000 { |
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compatible = "arm,pl111", "arm,primecell"; |
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reg = <0x10020000 0x1000>; |
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interrupt-names = "combined"; |
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interrupts = <0 44 4>; |
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clocks = <&oscclk1>, <&oscclk2>; |
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clock-names = "clcdclk", "apb_pclk"; |
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max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */ |
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port { |
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clcd_pads: endpoint { |
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remote-endpoint = <&clcd_panel>; |
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}; |
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}; |
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}; |
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panel { |
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compatible = "panel-dpi"; |
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port { |
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clcd_panel: endpoint { |
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remote-endpoint = <&clcd_pads>; |
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}; |
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}; |
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panel-timing { |
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clock-frequency = <25175000>; |
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hactive = <640>; |
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hback-porch = <40>; |
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hfront-porch = <24>; |
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hsync-len = <96>; |
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vactive = <480>; |
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vback-porch = <32>; |
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vfront-porch = <11>; |
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vsync-len = <2>; |
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}; |
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};
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