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28 lines
762 B
28 lines
762 B
Binding for the HSDK Generic PLL clock |
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This binding uses the common clock binding[1]. |
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
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Required properties: |
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- compatible: should be "snps,hsdk-<name>-pll-clock" |
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"snps,hsdk-core-pll-clock" |
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"snps,hsdk-gp-pll-clock" |
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"snps,hsdk-hdmi-pll-clock" |
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- reg : should contain base register location and length. |
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- clocks: shall be the input parent clock phandle for the PLL. |
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- #clock-cells: from common clock binding; Should always be set to 0. |
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Example: |
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input_clk: input-clk { |
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clock-frequency = <33333333>; |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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}; |
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cpu_clk: cpu-clk@0 { |
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compatible = "snps,hsdk-core-pll-clock"; |
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reg = <0x00 0x10>; |
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#clock-cells = <0>; |
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clocks = <&input_clk>; |
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};
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