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71 lines
2.2 KiB
71 lines
2.2 KiB
* Peripheral Clock bindings for Marvell Armada 37xx SoCs |
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Marvell Armada 37xx SoCs provide peripheral clocks which are |
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used as clock source for the peripheral of the SoC. |
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There are two different blocks associated to north bridge and south |
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bridge. |
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The peripheral clock consumer should specify the desired clock by |
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having the clock ID in its "clocks" phandle cell. |
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The following is a list of provided IDs for Armada 3700 North bridge clocks: |
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ID Clock name Description |
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----------------------------------- |
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0 mmc MMC controller |
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1 sata_host Sata Host |
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2 sec_at Security AT |
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3 sac_dap Security DAP |
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4 tsecm Security Engine |
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5 setm_tmx Serial Embedded Trace Module |
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6 avs Adaptive Voltage Scaling |
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7 sqf SPI |
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8 pwm PWM |
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9 i2c_2 I2C 2 |
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10 i2c_1 I2C 1 |
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11 ddr_phy DDR PHY |
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12 ddr_fclk DDR F clock |
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13 trace Trace |
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14 counter Counter |
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15 eip97 EIP 97 |
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16 cpu CPU |
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The following is a list of provided IDs for Armada 3700 South bridge clocks: |
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ID Clock name Description |
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----------------------------------- |
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0 gbe-50 50 MHz parent clock for Gigabit Ethernet |
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1 gbe-core parent clock for Gigabit Ethernet core |
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2 gbe-125 125 MHz parent clock for Gigabit Ethernet |
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3 gbe1-50 50 MHz clock for Gigabit Ethernet port 1 |
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4 gbe0-50 50 MHz clock for Gigabit Ethernet port 0 |
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5 gbe1-125 125 MHz clock for Gigabit Ethernet port 1 |
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6 gbe0-125 125 MHz clock for Gigabit Ethernet port 0 |
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7 gbe1-core Gigabit Ethernet core port 1 |
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8 gbe0-core Gigabit Ethernet core port 0 |
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9 gbe-bm Gigabit Ethernet Buffer Manager |
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10 sdio SDIO |
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11 usb32-sub2-sys USB 2 clock |
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12 usb32-ss-sys USB 3 clock |
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13 pcie PCIe controller |
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Required properties: |
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- compatible : shall be "marvell,armada-3700-periph-clock-nb" for the |
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north bridge block, or |
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"marvell,armada-3700-periph-clock-sb" for the south bridge block |
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- reg : must be the register address of North/South Bridge Clock register |
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- #clock-cells : from common clock binding; shall be set to 1 |
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- clocks : list of the parent clock phandle in the following order: |
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TBG-A P, TBG-B P, TBG-A S, TBG-B S and finally the xtal clock. |
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Example: |
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nb_perih_clk: nb-periph-clk@13000{ |
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compatible = "marvell,armada-3700-periph-clock-nb"; |
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reg = <0x13000 0x1000>; |
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clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, |
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<&tbg 3>, <&xtalclk>; |
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#clock-cells = <1>; |
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};
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