mirror of
https://github.com/Qortal/Brooklyn.git
synced 2025-02-12 10:15:54 +00:00
* NVME, SATA NAND Security added * Qortal Core exception fetcher is now redone. * Update DT overlays for firmware * Fix for bvb clockj settings * Fix for no audio for sissy desktop porn watchers -_- ( thanks crowetic for watching gay porn and reporting me that bug asshat ) * Normalize the fetch() stream while doing a peer to peer handshake for nodes * Fix for RNG token editing error while performing a SHA256 encryption * Now under voltage errors will blink red led constantly for 5 minutes then go solid. * Improve kernel thread scaling for Qortal 2.0 core * HDMI circuit is now enabled at power up instead. * Added KMS * Added line replication instead of interpolation for VC4 GPU resulting in slightly better frame rates * Fix for long and doubles * Backplane clock is now set at standard rate * Capped HVEC clocks * Add support for Creative Cinema webcam for donkers who like sharing dick pics. *looks at crowetic* * More scanline XGA modes for people who have weird ass monitors of all sorts. * TX/RX flow control support is now 100% stable. No lags over 1Gbps ethernet. ( Hello Qortal 3.0 ) * Using flush cache instead of fetch for QC 2.0 resulting in performance gains * VC4 clock is now enforced for desktop oriented images. * Ondemand governor now waits for 2 seconds instead of 0.5ms to scale down to the lowest safest clock freq preventing lags to the core. * Timeout of OC set at 35ms from 90ms resulting in way better clocks and sync for Qortal 2.0 core
192 lines
4.5 KiB
YAML
192 lines
4.5 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
|
|
|
|
maintainers:
|
|
- Mark Brown <broonie@kernel.org>
|
|
|
|
allOf:
|
|
- $ref: "spi-controller.yaml#"
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- mscc,ocelot-spi
|
|
- mscc,jaguar2-spi
|
|
then:
|
|
properties:
|
|
reg:
|
|
minItems: 2
|
|
- if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- baikal,bt1-sys-ssi
|
|
then:
|
|
properties:
|
|
mux-controls:
|
|
maxItems: 1
|
|
required:
|
|
- mux-controls
|
|
else:
|
|
required:
|
|
- interrupts
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- description: Generic DW SPI Controller
|
|
enum:
|
|
- snps,dw-apb-ssi
|
|
- snps,dwc-ssi-1.01a
|
|
- description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
|
|
items:
|
|
- enum:
|
|
- mscc,ocelot-spi
|
|
- mscc,jaguar2-spi
|
|
- const: snps,dw-apb-ssi
|
|
- description: Microchip Sparx5 SoC SPI Controller
|
|
const: microchip,sparx5-spi
|
|
- description: Amazon Alpine SPI Controller
|
|
const: amazon,alpine-dw-apb-ssi
|
|
- description: Renesas RZ/N1 SPI Controller
|
|
items:
|
|
- const: renesas,rzn1-spi
|
|
- const: snps,dw-apb-ssi
|
|
- description: Intel Keem Bay SPI Controller
|
|
const: intel,keembay-ssi
|
|
- description: Baikal-T1 SPI Controller
|
|
const: baikal,bt1-ssi
|
|
- description: Baikal-T1 System Boot SPI Controller
|
|
const: baikal,bt1-sys-ssi
|
|
- description: Canaan Kendryte K210 SoS SPI Controller
|
|
const: canaan,k210-spi
|
|
- description: Renesas RZ/N1 SPI Controller
|
|
items:
|
|
- enum:
|
|
- renesas,r9a06g032-spi # RZ/N1D
|
|
- renesas,r9a06g033-spi # RZ/N1S
|
|
- const: renesas,rzn1-spi # RZ/N1
|
|
|
|
reg:
|
|
minItems: 1
|
|
items:
|
|
- description: DW APB SSI controller memory mapped registers
|
|
- description: SPI MST region map or directly mapped SPI ROM
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
minItems: 1
|
|
items:
|
|
- description: SPI Controller reference clock source
|
|
- description: APB interface clock source
|
|
|
|
clock-names:
|
|
minItems: 1
|
|
items:
|
|
- const: ssi_clk
|
|
- const: pclk
|
|
|
|
resets:
|
|
maxItems: 1
|
|
|
|
reset-names:
|
|
const: spi
|
|
|
|
reg-io-width:
|
|
$ref: /schemas/types.yaml#/definitions/uint32
|
|
description: I/O register width (in bytes) implemented by this device
|
|
default: 4
|
|
enum: [ 2, 4 ]
|
|
|
|
num-cs:
|
|
default: 4
|
|
minimum: 1
|
|
maximum: 4
|
|
|
|
dmas:
|
|
items:
|
|
- description: TX DMA Channel
|
|
- description: RX DMA Channel
|
|
|
|
dma-names:
|
|
items:
|
|
- const: tx
|
|
- const: rx
|
|
|
|
rx-sample-delay-ns:
|
|
default: 0
|
|
description: Default value of the rx-sample-delay-ns property.
|
|
This value will be used if the property is not explicitly defined
|
|
for a SPI slave device. See below.
|
|
|
|
patternProperties:
|
|
"^.*@[0-9a-f]+$":
|
|
type: object
|
|
properties:
|
|
reg:
|
|
minimum: 0
|
|
maximum: 3
|
|
|
|
spi-rx-bus-width:
|
|
const: 1
|
|
|
|
spi-tx-bus-width:
|
|
const: 1
|
|
|
|
rx-sample-delay-ns:
|
|
description: SPI Rx sample delay offset, unit is nanoseconds.
|
|
The delay from the default sample time before the actual
|
|
sample of the rxd input signal occurs. The "rx_sample_delay"
|
|
is an optional feature of the designware controller, and the
|
|
upper limit is also subject to controller configuration.
|
|
|
|
unevaluatedProperties: false
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- "#address-cells"
|
|
- "#size-cells"
|
|
- clocks
|
|
|
|
examples:
|
|
- |
|
|
spi@fff00000 {
|
|
compatible = "snps,dw-apb-ssi";
|
|
reg = <0xfff00000 0x1000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
interrupts = <0 154 4>;
|
|
clocks = <&spi_m_clk>;
|
|
num-cs = <2>;
|
|
cs-gpios = <&gpio0 13 0>,
|
|
<&gpio0 14 0>;
|
|
rx-sample-delay-ns = <3>;
|
|
flash@1 {
|
|
compatible = "spi-nand";
|
|
reg = <1>;
|
|
rx-sample-delay-ns = <7>;
|
|
};
|
|
};
|
|
- |
|
|
spi@1f040100 {
|
|
compatible = "baikal,bt1-sys-ssi";
|
|
reg = <0x1f040100 0x900>,
|
|
<0x1c000000 0x1000000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
mux-controls = <&boot_mux>;
|
|
clocks = <&ccu_sys>;
|
|
clock-names = "ssi_clk";
|
|
};
|
|
...
|