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39 lines
1.3 KiB
39 lines
1.3 KiB
/* |
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* This header provides macros for MAXIM MAX77620 device bindings. |
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* |
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* Copyright (c) 2016, NVIDIA Corporation. |
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* Author: Laxman Dewangan <[email protected]> |
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*/ |
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#ifndef _DT_BINDINGS_MFD_MAX77620_H |
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#define _DT_BINDINGS_MFD_MAX77620_H |
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/* MAX77620 interrupts */ |
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#define MAX77620_IRQ_TOP_GLBL 0 /* Low-Battery */ |
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#define MAX77620_IRQ_TOP_SD 1 /* SD power fail */ |
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#define MAX77620_IRQ_TOP_LDO 2 /* LDO power fail */ |
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#define MAX77620_IRQ_TOP_GPIO 3 /* GPIO internal int to MAX77620 */ |
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#define MAX77620_IRQ_TOP_RTC 4 /* RTC */ |
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#define MAX77620_IRQ_TOP_32K 5 /* 32kHz oscillator */ |
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#define MAX77620_IRQ_TOP_ONOFF 6 /* ON/OFF oscillator */ |
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#define MAX77620_IRQ_LBT_MBATLOW 7 /* Thermal alarm status, > 120C */ |
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#define MAX77620_IRQ_LBT_TJALRM1 8 /* Thermal alarm status, > 120C */ |
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#define MAX77620_IRQ_LBT_TJALRM2 9 /* Thermal alarm status, > 140C */ |
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/* FPS event source */ |
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#define MAX77620_FPS_EVENT_SRC_EN0 0 |
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#define MAX77620_FPS_EVENT_SRC_EN1 1 |
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#define MAX77620_FPS_EVENT_SRC_SW 2 |
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/* Device state when FPS event LOW */ |
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#define MAX77620_FPS_INACTIVE_STATE_SLEEP 0 |
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#define MAX77620_FPS_INACTIVE_STATE_LOW_POWER 1 |
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/* FPS source */ |
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#define MAX77620_FPS_SRC_0 0 |
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#define MAX77620_FPS_SRC_1 1 |
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#define MAX77620_FPS_SRC_2 2 |
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#define MAX77620_FPS_SRC_NONE 3 |
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#define MAX77620_FPS_SRC_DEF 4 |
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#endif
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