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885 lines
22 KiB
885 lines
22 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver |
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* |
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* Copyright (C) 2003, 2006 David S. Miller ([email protected]) |
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* Copyright (C) 1996,1998 Jakub Jelinek ([email protected]) |
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* Copyright (C) 1996 Miguel de Icaza ([email protected]) |
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* Copyright (C) 1996 Eddie C. Dost ([email protected]) |
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* |
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* Driver layout based loosely on tgafb.c, see that file for credits. |
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*/ |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/errno.h> |
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#include <linux/string.h> |
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#include <linux/delay.h> |
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#include <linux/init.h> |
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#include <linux/fb.h> |
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#include <linux/mm.h> |
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#include <linux/of_device.h> |
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#include <asm/io.h> |
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#include <asm/fbio.h> |
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#include "sbuslib.h" |
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/* |
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* Local functions. |
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*/ |
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static int cg6_setcolreg(unsigned, unsigned, unsigned, unsigned, |
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unsigned, struct fb_info *); |
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static int cg6_blank(int, struct fb_info *); |
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static void cg6_imageblit(struct fb_info *, const struct fb_image *); |
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static void cg6_fillrect(struct fb_info *, const struct fb_fillrect *); |
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static void cg6_copyarea(struct fb_info *info, const struct fb_copyarea *area); |
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static int cg6_sync(struct fb_info *); |
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static int cg6_mmap(struct fb_info *, struct vm_area_struct *); |
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static int cg6_ioctl(struct fb_info *, unsigned int, unsigned long); |
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static int cg6_pan_display(struct fb_var_screeninfo *, struct fb_info *); |
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/* |
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* Frame buffer operations |
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*/ |
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static const struct fb_ops cg6_ops = { |
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.owner = THIS_MODULE, |
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.fb_setcolreg = cg6_setcolreg, |
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.fb_blank = cg6_blank, |
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.fb_pan_display = cg6_pan_display, |
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.fb_fillrect = cg6_fillrect, |
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.fb_copyarea = cg6_copyarea, |
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.fb_imageblit = cg6_imageblit, |
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.fb_sync = cg6_sync, |
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.fb_mmap = cg6_mmap, |
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.fb_ioctl = cg6_ioctl, |
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#ifdef CONFIG_COMPAT |
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.fb_compat_ioctl = sbusfb_compat_ioctl, |
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#endif |
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}; |
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/* Offset of interesting structures in the OBIO space */ |
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/* |
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* Brooktree is the video dac and is funny to program on the cg6. |
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* (it's even funnier on the cg3) |
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* The FBC could be the frame buffer control |
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* The FHC could is the frame buffer hardware control. |
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*/ |
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#define CG6_ROM_OFFSET 0x0UL |
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#define CG6_BROOKTREE_OFFSET 0x200000UL |
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#define CG6_DHC_OFFSET 0x240000UL |
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#define CG6_ALT_OFFSET 0x280000UL |
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#define CG6_FHC_OFFSET 0x300000UL |
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#define CG6_THC_OFFSET 0x301000UL |
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#define CG6_FBC_OFFSET 0x700000UL |
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#define CG6_TEC_OFFSET 0x701000UL |
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#define CG6_RAM_OFFSET 0x800000UL |
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/* FHC definitions */ |
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#define CG6_FHC_FBID_SHIFT 24 |
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#define CG6_FHC_FBID_MASK 255 |
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#define CG6_FHC_REV_SHIFT 20 |
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#define CG6_FHC_REV_MASK 15 |
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#define CG6_FHC_FROP_DISABLE (1 << 19) |
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#define CG6_FHC_ROW_DISABLE (1 << 18) |
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#define CG6_FHC_SRC_DISABLE (1 << 17) |
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#define CG6_FHC_DST_DISABLE (1 << 16) |
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#define CG6_FHC_RESET (1 << 15) |
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#define CG6_FHC_LITTLE_ENDIAN (1 << 13) |
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#define CG6_FHC_RES_MASK (3 << 11) |
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#define CG6_FHC_1024 (0 << 11) |
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#define CG6_FHC_1152 (1 << 11) |
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#define CG6_FHC_1280 (2 << 11) |
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#define CG6_FHC_1600 (3 << 11) |
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#define CG6_FHC_CPU_MASK (3 << 9) |
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#define CG6_FHC_CPU_SPARC (0 << 9) |
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#define CG6_FHC_CPU_68020 (1 << 9) |
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#define CG6_FHC_CPU_386 (2 << 9) |
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#define CG6_FHC_TEST (1 << 8) |
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#define CG6_FHC_TEST_X_SHIFT 4 |
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#define CG6_FHC_TEST_X_MASK 15 |
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#define CG6_FHC_TEST_Y_SHIFT 0 |
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#define CG6_FHC_TEST_Y_MASK 15 |
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/* FBC mode definitions */ |
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#define CG6_FBC_BLIT_IGNORE 0x00000000 |
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#define CG6_FBC_BLIT_NOSRC 0x00100000 |
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#define CG6_FBC_BLIT_SRC 0x00200000 |
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#define CG6_FBC_BLIT_ILLEGAL 0x00300000 |
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#define CG6_FBC_BLIT_MASK 0x00300000 |
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#define CG6_FBC_VBLANK 0x00080000 |
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#define CG6_FBC_MODE_IGNORE 0x00000000 |
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#define CG6_FBC_MODE_COLOR8 0x00020000 |
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#define CG6_FBC_MODE_COLOR1 0x00040000 |
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#define CG6_FBC_MODE_HRMONO 0x00060000 |
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#define CG6_FBC_MODE_MASK 0x00060000 |
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#define CG6_FBC_DRAW_IGNORE 0x00000000 |
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#define CG6_FBC_DRAW_RENDER 0x00008000 |
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#define CG6_FBC_DRAW_PICK 0x00010000 |
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#define CG6_FBC_DRAW_ILLEGAL 0x00018000 |
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#define CG6_FBC_DRAW_MASK 0x00018000 |
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#define CG6_FBC_BWRITE0_IGNORE 0x00000000 |
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#define CG6_FBC_BWRITE0_ENABLE 0x00002000 |
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#define CG6_FBC_BWRITE0_DISABLE 0x00004000 |
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#define CG6_FBC_BWRITE0_ILLEGAL 0x00006000 |
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#define CG6_FBC_BWRITE0_MASK 0x00006000 |
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#define CG6_FBC_BWRITE1_IGNORE 0x00000000 |
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#define CG6_FBC_BWRITE1_ENABLE 0x00000800 |
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#define CG6_FBC_BWRITE1_DISABLE 0x00001000 |
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#define CG6_FBC_BWRITE1_ILLEGAL 0x00001800 |
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#define CG6_FBC_BWRITE1_MASK 0x00001800 |
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#define CG6_FBC_BREAD_IGNORE 0x00000000 |
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#define CG6_FBC_BREAD_0 0x00000200 |
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#define CG6_FBC_BREAD_1 0x00000400 |
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#define CG6_FBC_BREAD_ILLEGAL 0x00000600 |
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#define CG6_FBC_BREAD_MASK 0x00000600 |
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#define CG6_FBC_BDISP_IGNORE 0x00000000 |
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#define CG6_FBC_BDISP_0 0x00000080 |
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#define CG6_FBC_BDISP_1 0x00000100 |
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#define CG6_FBC_BDISP_ILLEGAL 0x00000180 |
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#define CG6_FBC_BDISP_MASK 0x00000180 |
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#define CG6_FBC_INDEX_MOD 0x00000040 |
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#define CG6_FBC_INDEX_MASK 0x00000030 |
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/* THC definitions */ |
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#define CG6_THC_MISC_REV_SHIFT 16 |
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#define CG6_THC_MISC_REV_MASK 15 |
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#define CG6_THC_MISC_RESET (1 << 12) |
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#define CG6_THC_MISC_VIDEO (1 << 10) |
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#define CG6_THC_MISC_SYNC (1 << 9) |
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#define CG6_THC_MISC_VSYNC (1 << 8) |
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#define CG6_THC_MISC_SYNC_ENAB (1 << 7) |
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#define CG6_THC_MISC_CURS_RES (1 << 6) |
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#define CG6_THC_MISC_INT_ENAB (1 << 5) |
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#define CG6_THC_MISC_INT (1 << 4) |
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#define CG6_THC_MISC_INIT 0x9f |
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#define CG6_THC_CURSOFF ((65536-32) | ((65536-32) << 16)) |
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/* The contents are unknown */ |
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struct cg6_tec { |
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int tec_matrix; |
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int tec_clip; |
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int tec_vdc; |
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}; |
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struct cg6_thc { |
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u32 thc_pad0[512]; |
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u32 thc_hs; /* hsync timing */ |
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u32 thc_hsdvs; |
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u32 thc_hd; |
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u32 thc_vs; /* vsync timing */ |
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u32 thc_vd; |
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u32 thc_refresh; |
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u32 thc_misc; |
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u32 thc_pad1[56]; |
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u32 thc_cursxy; /* cursor x,y position (16 bits each) */ |
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u32 thc_cursmask[32]; /* cursor mask bits */ |
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u32 thc_cursbits[32]; /* what to show where mask enabled */ |
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}; |
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struct cg6_fbc { |
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u32 xxx0[1]; |
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u32 mode; |
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u32 clip; |
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u32 xxx1[1]; |
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u32 s; |
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u32 draw; |
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u32 blit; |
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u32 font; |
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u32 xxx2[24]; |
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u32 x0, y0, z0, color0; |
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u32 x1, y1, z1, color1; |
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u32 x2, y2, z2, color2; |
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u32 x3, y3, z3, color3; |
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u32 offx, offy; |
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u32 xxx3[2]; |
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u32 incx, incy; |
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u32 xxx4[2]; |
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u32 clipminx, clipminy; |
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u32 xxx5[2]; |
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u32 clipmaxx, clipmaxy; |
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u32 xxx6[2]; |
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u32 fg; |
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u32 bg; |
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u32 alu; |
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u32 pm; |
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u32 pixelm; |
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u32 xxx7[2]; |
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u32 patalign; |
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u32 pattern[8]; |
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u32 xxx8[432]; |
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u32 apointx, apointy, apointz; |
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u32 xxx9[1]; |
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u32 rpointx, rpointy, rpointz; |
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u32 xxx10[5]; |
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u32 pointr, pointg, pointb, pointa; |
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u32 alinex, aliney, alinez; |
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u32 xxx11[1]; |
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u32 rlinex, rliney, rlinez; |
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u32 xxx12[5]; |
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u32 liner, lineg, lineb, linea; |
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u32 atrix, atriy, atriz; |
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u32 xxx13[1]; |
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u32 rtrix, rtriy, rtriz; |
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u32 xxx14[5]; |
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u32 trir, trig, trib, tria; |
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u32 aquadx, aquady, aquadz; |
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u32 xxx15[1]; |
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u32 rquadx, rquady, rquadz; |
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u32 xxx16[5]; |
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u32 quadr, quadg, quadb, quada; |
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u32 arectx, arecty, arectz; |
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u32 xxx17[1]; |
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u32 rrectx, rrecty, rrectz; |
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u32 xxx18[5]; |
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u32 rectr, rectg, rectb, recta; |
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}; |
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struct bt_regs { |
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u32 addr; |
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u32 color_map; |
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u32 control; |
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u32 cursor; |
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}; |
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struct cg6_par { |
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spinlock_t lock; |
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struct bt_regs __iomem *bt; |
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struct cg6_fbc __iomem *fbc; |
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struct cg6_thc __iomem *thc; |
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struct cg6_tec __iomem *tec; |
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u32 __iomem *fhc; |
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u32 flags; |
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#define CG6_FLAG_BLANKED 0x00000001 |
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unsigned long which_io; |
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}; |
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static int cg6_sync(struct fb_info *info) |
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{ |
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struct cg6_par *par = (struct cg6_par *)info->par; |
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struct cg6_fbc __iomem *fbc = par->fbc; |
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int limit = 10000; |
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do { |
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if (!(sbus_readl(&fbc->s) & 0x10000000)) |
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break; |
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udelay(10); |
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} while (--limit > 0); |
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return 0; |
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} |
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static void cg6_switch_from_graph(struct cg6_par *par) |
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{ |
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struct cg6_thc __iomem *thc = par->thc; |
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unsigned long flags; |
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spin_lock_irqsave(&par->lock, flags); |
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/* Hide the cursor. */ |
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sbus_writel(CG6_THC_CURSOFF, &thc->thc_cursxy); |
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spin_unlock_irqrestore(&par->lock, flags); |
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} |
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static int cg6_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
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{ |
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struct cg6_par *par = (struct cg6_par *)info->par; |
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/* We just use this to catch switches out of |
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* graphics mode. |
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*/ |
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cg6_switch_from_graph(par); |
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if (var->xoffset || var->yoffset || var->vmode) |
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return -EINVAL; |
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return 0; |
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} |
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/** |
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* cg6_fillrect - Draws a rectangle on the screen. |
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* |
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* @info: frame buffer structure that represents a single frame buffer |
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* @rect: structure defining the rectagle and operation. |
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*/ |
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static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect) |
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{ |
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struct cg6_par *par = (struct cg6_par *)info->par; |
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struct cg6_fbc __iomem *fbc = par->fbc; |
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unsigned long flags; |
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s32 val; |
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/* CG6 doesn't handle ROP_XOR */ |
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spin_lock_irqsave(&par->lock, flags); |
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cg6_sync(info); |
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sbus_writel(rect->color, &fbc->fg); |
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sbus_writel(~(u32)0, &fbc->pixelm); |
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sbus_writel(0xea80ff00, &fbc->alu); |
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sbus_writel(0, &fbc->s); |
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sbus_writel(0, &fbc->clip); |
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sbus_writel(~(u32)0, &fbc->pm); |
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sbus_writel(rect->dy, &fbc->arecty); |
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sbus_writel(rect->dx, &fbc->arectx); |
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sbus_writel(rect->dy + rect->height, &fbc->arecty); |
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sbus_writel(rect->dx + rect->width, &fbc->arectx); |
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do { |
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val = sbus_readl(&fbc->draw); |
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} while (val < 0 && (val & 0x20000000)); |
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spin_unlock_irqrestore(&par->lock, flags); |
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} |
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/** |
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* cg6_copyarea - Copies one area of the screen to another area. |
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* |
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* @info: frame buffer structure that represents a single frame buffer |
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* @area: Structure providing the data to copy the framebuffer contents |
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* from one region to another. |
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* |
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* This drawing operation copies a rectangular area from one area of the |
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* screen to another area. |
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*/ |
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static void cg6_copyarea(struct fb_info *info, const struct fb_copyarea *area) |
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{ |
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struct cg6_par *par = (struct cg6_par *)info->par; |
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struct cg6_fbc __iomem *fbc = par->fbc; |
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unsigned long flags; |
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int i; |
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spin_lock_irqsave(&par->lock, flags); |
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cg6_sync(info); |
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sbus_writel(0xff, &fbc->fg); |
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sbus_writel(0x00, &fbc->bg); |
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sbus_writel(~0, &fbc->pixelm); |
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sbus_writel(0xe880cccc, &fbc->alu); |
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sbus_writel(0, &fbc->s); |
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sbus_writel(0, &fbc->clip); |
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sbus_writel(area->sy, &fbc->y0); |
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sbus_writel(area->sx, &fbc->x0); |
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sbus_writel(area->sy + area->height - 1, &fbc->y1); |
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sbus_writel(area->sx + area->width - 1, &fbc->x1); |
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sbus_writel(area->dy, &fbc->y2); |
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sbus_writel(area->dx, &fbc->x2); |
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sbus_writel(area->dy + area->height - 1, &fbc->y3); |
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sbus_writel(area->dx + area->width - 1, &fbc->x3); |
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do { |
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i = sbus_readl(&fbc->blit); |
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} while (i < 0 && (i & 0x20000000)); |
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spin_unlock_irqrestore(&par->lock, flags); |
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} |
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/** |
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* cg6_imageblit - Copies a image from system memory to the screen. |
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* |
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* @info: frame buffer structure that represents a single frame buffer |
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* @image: structure defining the image. |
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*/ |
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static void cg6_imageblit(struct fb_info *info, const struct fb_image *image) |
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{ |
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struct cg6_par *par = (struct cg6_par *)info->par; |
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struct cg6_fbc __iomem *fbc = par->fbc; |
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const u8 *data = image->data; |
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unsigned long flags; |
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u32 x, y; |
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int i, width; |
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if (image->depth > 1) { |
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cfb_imageblit(info, image); |
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return; |
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} |
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spin_lock_irqsave(&par->lock, flags); |
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cg6_sync(info); |
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sbus_writel(image->fg_color, &fbc->fg); |
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sbus_writel(image->bg_color, &fbc->bg); |
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sbus_writel(0x140000, &fbc->mode); |
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sbus_writel(0xe880fc30, &fbc->alu); |
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sbus_writel(~(u32)0, &fbc->pixelm); |
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sbus_writel(0, &fbc->s); |
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sbus_writel(0, &fbc->clip); |
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sbus_writel(0xff, &fbc->pm); |
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sbus_writel(32, &fbc->incx); |
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sbus_writel(0, &fbc->incy); |
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x = image->dx; |
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y = image->dy; |
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for (i = 0; i < image->height; i++) { |
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width = image->width; |
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while (width >= 32) { |
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u32 val; |
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sbus_writel(y, &fbc->y0); |
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sbus_writel(x, &fbc->x0); |
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sbus_writel(x + 32 - 1, &fbc->x1); |
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val = ((u32)data[0] << 24) | |
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((u32)data[1] << 16) | |
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((u32)data[2] << 8) | |
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((u32)data[3] << 0); |
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sbus_writel(val, &fbc->font); |
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data += 4; |
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x += 32; |
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width -= 32; |
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} |
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if (width) { |
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u32 val; |
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sbus_writel(y, &fbc->y0); |
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sbus_writel(x, &fbc->x0); |
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sbus_writel(x + width - 1, &fbc->x1); |
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if (width <= 8) { |
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val = (u32) data[0] << 24; |
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data += 1; |
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} else if (width <= 16) { |
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val = ((u32) data[0] << 24) | |
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((u32) data[1] << 16); |
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data += 2; |
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} else { |
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val = ((u32) data[0] << 24) | |
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((u32) data[1] << 16) | |
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((u32) data[2] << 8); |
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data += 3; |
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} |
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sbus_writel(val, &fbc->font); |
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} |
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y += 1; |
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x = image->dx; |
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} |
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spin_unlock_irqrestore(&par->lock, flags); |
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} |
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/** |
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* cg6_setcolreg - Sets a color register. |
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* |
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* @regno: boolean, 0 copy local, 1 get_user() function |
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* @red: frame buffer colormap structure |
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* @green: The green value which can be up to 16 bits wide |
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* @blue: The blue value which can be up to 16 bits wide. |
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* @transp: If supported the alpha value which can be up to 16 bits wide. |
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* @info: frame buffer info structure |
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*/ |
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static int cg6_setcolreg(unsigned regno, |
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unsigned red, unsigned green, unsigned blue, |
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unsigned transp, struct fb_info *info) |
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{ |
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struct cg6_par *par = (struct cg6_par *)info->par; |
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struct bt_regs __iomem *bt = par->bt; |
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unsigned long flags; |
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if (regno >= 256) |
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return 1; |
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red >>= 8; |
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green >>= 8; |
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blue >>= 8; |
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spin_lock_irqsave(&par->lock, flags); |
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sbus_writel((u32)regno << 24, &bt->addr); |
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sbus_writel((u32)red << 24, &bt->color_map); |
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sbus_writel((u32)green << 24, &bt->color_map); |
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sbus_writel((u32)blue << 24, &bt->color_map); |
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spin_unlock_irqrestore(&par->lock, flags); |
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return 0; |
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} |
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/** |
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* cg6_blank - Blanks the display. |
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* |
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* @blank: the blank mode we want. |
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* @info: frame buffer structure that represents a single frame buffer |
|
*/ |
|
static int cg6_blank(int blank, struct fb_info *info) |
|
{ |
|
struct cg6_par *par = (struct cg6_par *)info->par; |
|
struct cg6_thc __iomem *thc = par->thc; |
|
unsigned long flags; |
|
u32 val; |
|
|
|
spin_lock_irqsave(&par->lock, flags); |
|
val = sbus_readl(&thc->thc_misc); |
|
|
|
switch (blank) { |
|
case FB_BLANK_UNBLANK: /* Unblanking */ |
|
val |= CG6_THC_MISC_VIDEO; |
|
par->flags &= ~CG6_FLAG_BLANKED; |
|
break; |
|
|
|
case FB_BLANK_NORMAL: /* Normal blanking */ |
|
case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ |
|
case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ |
|
case FB_BLANK_POWERDOWN: /* Poweroff */ |
|
val &= ~CG6_THC_MISC_VIDEO; |
|
par->flags |= CG6_FLAG_BLANKED; |
|
break; |
|
} |
|
|
|
sbus_writel(val, &thc->thc_misc); |
|
spin_unlock_irqrestore(&par->lock, flags); |
|
|
|
return 0; |
|
} |
|
|
|
static struct sbus_mmap_map cg6_mmap_map[] = { |
|
{ |
|
.voff = CG6_FBC, |
|
.poff = CG6_FBC_OFFSET, |
|
.size = PAGE_SIZE |
|
}, |
|
{ |
|
.voff = CG6_TEC, |
|
.poff = CG6_TEC_OFFSET, |
|
.size = PAGE_SIZE |
|
}, |
|
{ |
|
.voff = CG6_BTREGS, |
|
.poff = CG6_BROOKTREE_OFFSET, |
|
.size = PAGE_SIZE |
|
}, |
|
{ |
|
.voff = CG6_FHC, |
|
.poff = CG6_FHC_OFFSET, |
|
.size = PAGE_SIZE |
|
}, |
|
{ |
|
.voff = CG6_THC, |
|
.poff = CG6_THC_OFFSET, |
|
.size = PAGE_SIZE |
|
}, |
|
{ |
|
.voff = CG6_ROM, |
|
.poff = CG6_ROM_OFFSET, |
|
.size = 0x10000 |
|
}, |
|
{ |
|
.voff = CG6_RAM, |
|
.poff = CG6_RAM_OFFSET, |
|
.size = SBUS_MMAP_FBSIZE(1) |
|
}, |
|
{ |
|
.voff = CG6_DHC, |
|
.poff = CG6_DHC_OFFSET, |
|
.size = 0x40000 |
|
}, |
|
{ .size = 0 } |
|
}; |
|
|
|
static int cg6_mmap(struct fb_info *info, struct vm_area_struct *vma) |
|
{ |
|
struct cg6_par *par = (struct cg6_par *)info->par; |
|
|
|
return sbusfb_mmap_helper(cg6_mmap_map, |
|
info->fix.smem_start, info->fix.smem_len, |
|
par->which_io, vma); |
|
} |
|
|
|
static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) |
|
{ |
|
return sbusfb_ioctl_helper(cmd, arg, info, |
|
FBTYPE_SUNFAST_COLOR, 8, info->fix.smem_len); |
|
} |
|
|
|
/* |
|
* Initialisation |
|
*/ |
|
|
|
static void cg6_init_fix(struct fb_info *info, int linebytes) |
|
{ |
|
struct cg6_par *par = (struct cg6_par *)info->par; |
|
const char *cg6_cpu_name, *cg6_card_name; |
|
u32 conf; |
|
|
|
conf = sbus_readl(par->fhc); |
|
switch (conf & CG6_FHC_CPU_MASK) { |
|
case CG6_FHC_CPU_SPARC: |
|
cg6_cpu_name = "sparc"; |
|
break; |
|
case CG6_FHC_CPU_68020: |
|
cg6_cpu_name = "68020"; |
|
break; |
|
default: |
|
cg6_cpu_name = "i386"; |
|
break; |
|
} |
|
if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) { |
|
if (info->fix.smem_len <= 0x100000) |
|
cg6_card_name = "TGX"; |
|
else |
|
cg6_card_name = "TGX+"; |
|
} else { |
|
if (info->fix.smem_len <= 0x100000) |
|
cg6_card_name = "GX"; |
|
else |
|
cg6_card_name = "GX+"; |
|
} |
|
|
|
sprintf(info->fix.id, "%s %s", cg6_card_name, cg6_cpu_name); |
|
info->fix.id[sizeof(info->fix.id) - 1] = 0; |
|
|
|
info->fix.type = FB_TYPE_PACKED_PIXELS; |
|
info->fix.visual = FB_VISUAL_PSEUDOCOLOR; |
|
|
|
info->fix.line_length = linebytes; |
|
|
|
info->fix.accel = FB_ACCEL_SUN_CGSIX; |
|
} |
|
|
|
/* Initialize Brooktree DAC */ |
|
static void cg6_bt_init(struct cg6_par *par) |
|
{ |
|
struct bt_regs __iomem *bt = par->bt; |
|
|
|
sbus_writel(0x04 << 24, &bt->addr); /* color planes */ |
|
sbus_writel(0xff << 24, &bt->control); |
|
sbus_writel(0x05 << 24, &bt->addr); |
|
sbus_writel(0x00 << 24, &bt->control); |
|
sbus_writel(0x06 << 24, &bt->addr); /* overlay plane */ |
|
sbus_writel(0x73 << 24, &bt->control); |
|
sbus_writel(0x07 << 24, &bt->addr); |
|
sbus_writel(0x00 << 24, &bt->control); |
|
} |
|
|
|
static void cg6_chip_init(struct fb_info *info) |
|
{ |
|
struct cg6_par *par = (struct cg6_par *)info->par; |
|
struct cg6_tec __iomem *tec = par->tec; |
|
struct cg6_fbc __iomem *fbc = par->fbc; |
|
struct cg6_thc __iomem *thc = par->thc; |
|
u32 rev, conf, mode; |
|
int i; |
|
|
|
/* Hide the cursor. */ |
|
sbus_writel(CG6_THC_CURSOFF, &thc->thc_cursxy); |
|
|
|
/* Turn off stuff in the Transform Engine. */ |
|
sbus_writel(0, &tec->tec_matrix); |
|
sbus_writel(0, &tec->tec_clip); |
|
sbus_writel(0, &tec->tec_vdc); |
|
|
|
/* Take care of bugs in old revisions. */ |
|
rev = (sbus_readl(par->fhc) >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK; |
|
if (rev < 5) { |
|
conf = (sbus_readl(par->fhc) & CG6_FHC_RES_MASK) | |
|
CG6_FHC_CPU_68020 | CG6_FHC_TEST | |
|
(11 << CG6_FHC_TEST_X_SHIFT) | |
|
(11 << CG6_FHC_TEST_Y_SHIFT); |
|
if (rev < 2) |
|
conf |= CG6_FHC_DST_DISABLE; |
|
sbus_writel(conf, par->fhc); |
|
} |
|
|
|
/* Set things in the FBC. Bad things appear to happen if we do |
|
* back to back store/loads on the mode register, so copy it |
|
* out instead. */ |
|
mode = sbus_readl(&fbc->mode); |
|
do { |
|
i = sbus_readl(&fbc->s); |
|
} while (i & 0x10000000); |
|
mode &= ~(CG6_FBC_BLIT_MASK | CG6_FBC_MODE_MASK | |
|
CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK | |
|
CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK | |
|
CG6_FBC_BDISP_MASK); |
|
mode |= (CG6_FBC_BLIT_SRC | CG6_FBC_MODE_COLOR8 | |
|
CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE | |
|
CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 | |
|
CG6_FBC_BDISP_0); |
|
sbus_writel(mode, &fbc->mode); |
|
|
|
sbus_writel(0, &fbc->clip); |
|
sbus_writel(0, &fbc->offx); |
|
sbus_writel(0, &fbc->offy); |
|
sbus_writel(0, &fbc->clipminx); |
|
sbus_writel(0, &fbc->clipminy); |
|
sbus_writel(info->var.xres - 1, &fbc->clipmaxx); |
|
sbus_writel(info->var.yres - 1, &fbc->clipmaxy); |
|
} |
|
|
|
static void cg6_unmap_regs(struct platform_device *op, struct fb_info *info, |
|
struct cg6_par *par) |
|
{ |
|
if (par->fbc) |
|
of_iounmap(&op->resource[0], par->fbc, 4096); |
|
if (par->tec) |
|
of_iounmap(&op->resource[0], par->tec, sizeof(struct cg6_tec)); |
|
if (par->thc) |
|
of_iounmap(&op->resource[0], par->thc, sizeof(struct cg6_thc)); |
|
if (par->bt) |
|
of_iounmap(&op->resource[0], par->bt, sizeof(struct bt_regs)); |
|
if (par->fhc) |
|
of_iounmap(&op->resource[0], par->fhc, sizeof(u32)); |
|
|
|
if (info->screen_base) |
|
of_iounmap(&op->resource[0], info->screen_base, |
|
info->fix.smem_len); |
|
} |
|
|
|
static int cg6_probe(struct platform_device *op) |
|
{ |
|
struct device_node *dp = op->dev.of_node; |
|
struct fb_info *info; |
|
struct cg6_par *par; |
|
int linebytes, err; |
|
int dblbuf; |
|
|
|
info = framebuffer_alloc(sizeof(struct cg6_par), &op->dev); |
|
|
|
err = -ENOMEM; |
|
if (!info) |
|
goto out_err; |
|
par = info->par; |
|
|
|
spin_lock_init(&par->lock); |
|
|
|
info->fix.smem_start = op->resource[0].start; |
|
par->which_io = op->resource[0].flags & IORESOURCE_BITS; |
|
|
|
sbusfb_fill_var(&info->var, dp, 8); |
|
info->var.red.length = 8; |
|
info->var.green.length = 8; |
|
info->var.blue.length = 8; |
|
|
|
linebytes = of_getintprop_default(dp, "linebytes", |
|
info->var.xres); |
|
info->fix.smem_len = PAGE_ALIGN(linebytes * info->var.yres); |
|
|
|
dblbuf = of_getintprop_default(dp, "dblbuf", 0); |
|
if (dblbuf) |
|
info->fix.smem_len *= 4; |
|
|
|
par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET, |
|
4096, "cgsix fbc"); |
|
par->tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET, |
|
sizeof(struct cg6_tec), "cgsix tec"); |
|
par->thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET, |
|
sizeof(struct cg6_thc), "cgsix thc"); |
|
par->bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET, |
|
sizeof(struct bt_regs), "cgsix dac"); |
|
par->fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET, |
|
sizeof(u32), "cgsix fhc"); |
|
|
|
info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT | |
|
FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT | |
|
FBINFO_READS_FAST; |
|
info->fbops = &cg6_ops; |
|
|
|
info->screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET, |
|
info->fix.smem_len, "cgsix ram"); |
|
if (!par->fbc || !par->tec || !par->thc || |
|
!par->bt || !par->fhc || !info->screen_base) |
|
goto out_unmap_regs; |
|
|
|
info->var.accel_flags = FB_ACCELF_TEXT; |
|
|
|
cg6_bt_init(par); |
|
cg6_chip_init(info); |
|
cg6_blank(FB_BLANK_UNBLANK, info); |
|
|
|
if (fb_alloc_cmap(&info->cmap, 256, 0)) |
|
goto out_unmap_regs; |
|
|
|
fb_set_cmap(&info->cmap, info); |
|
cg6_init_fix(info, linebytes); |
|
|
|
err = register_framebuffer(info); |
|
if (err < 0) |
|
goto out_dealloc_cmap; |
|
|
|
dev_set_drvdata(&op->dev, info); |
|
|
|
printk(KERN_INFO "%pOF: CGsix [%s] at %lx:%lx\n", |
|
dp, info->fix.id, |
|
par->which_io, info->fix.smem_start); |
|
|
|
return 0; |
|
|
|
out_dealloc_cmap: |
|
fb_dealloc_cmap(&info->cmap); |
|
|
|
out_unmap_regs: |
|
cg6_unmap_regs(op, info, par); |
|
framebuffer_release(info); |
|
|
|
out_err: |
|
return err; |
|
} |
|
|
|
static int cg6_remove(struct platform_device *op) |
|
{ |
|
struct fb_info *info = dev_get_drvdata(&op->dev); |
|
struct cg6_par *par = info->par; |
|
|
|
unregister_framebuffer(info); |
|
fb_dealloc_cmap(&info->cmap); |
|
|
|
cg6_unmap_regs(op, info, par); |
|
|
|
framebuffer_release(info); |
|
|
|
return 0; |
|
} |
|
|
|
static const struct of_device_id cg6_match[] = { |
|
{ |
|
.name = "cgsix", |
|
}, |
|
{ |
|
.name = "cgthree+", |
|
}, |
|
{}, |
|
}; |
|
MODULE_DEVICE_TABLE(of, cg6_match); |
|
|
|
static struct platform_driver cg6_driver = { |
|
.driver = { |
|
.name = "cg6", |
|
.of_match_table = cg6_match, |
|
}, |
|
.probe = cg6_probe, |
|
.remove = cg6_remove, |
|
}; |
|
|
|
static int __init cg6_init(void) |
|
{ |
|
if (fb_get_options("cg6fb", NULL)) |
|
return -ENODEV; |
|
|
|
return platform_driver_register(&cg6_driver); |
|
} |
|
|
|
static void __exit cg6_exit(void) |
|
{ |
|
platform_driver_unregister(&cg6_driver); |
|
} |
|
|
|
module_init(cg6_init); |
|
module_exit(cg6_exit); |
|
|
|
MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets"); |
|
MODULE_AUTHOR("David S. Miller <[email protected]>"); |
|
MODULE_VERSION("2.0"); |
|
MODULE_LICENSE("GPL");
|
|
|