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1031 lines
25 KiB
1031 lines
25 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* jmb38x_ms.c - JMicron jmb38x MemoryStick card reader |
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* |
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* Copyright (C) 2008 Alex Dubov <[email protected]> |
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*/ |
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|
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#include <linux/spinlock.h> |
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#include <linux/interrupt.h> |
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#include <linux/pci.h> |
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#include <linux/dma-mapping.h> |
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#include <linux/delay.h> |
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#include <linux/highmem.h> |
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#include <linux/memstick.h> |
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#include <linux/slab.h> |
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#include <linux/module.h> |
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|
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#define DRIVER_NAME "jmb38x_ms" |
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|
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static bool no_dma; |
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module_param(no_dma, bool, 0644); |
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|
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enum { |
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DMA_ADDRESS = 0x00, |
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BLOCK = 0x04, |
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DMA_CONTROL = 0x08, |
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TPC_P0 = 0x0c, |
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TPC_P1 = 0x10, |
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TPC = 0x14, |
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HOST_CONTROL = 0x18, |
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DATA = 0x1c, |
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STATUS = 0x20, |
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INT_STATUS = 0x24, |
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INT_STATUS_ENABLE = 0x28, |
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INT_SIGNAL_ENABLE = 0x2c, |
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TIMER = 0x30, |
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TIMER_CONTROL = 0x34, |
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PAD_OUTPUT_ENABLE = 0x38, |
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PAD_PU_PD = 0x3c, |
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CLOCK_DELAY = 0x40, |
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ADMA_ADDRESS = 0x44, |
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CLOCK_CONTROL = 0x48, |
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LED_CONTROL = 0x4c, |
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VERSION = 0x50 |
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}; |
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struct jmb38x_ms_host { |
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struct jmb38x_ms *chip; |
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void __iomem *addr; |
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spinlock_t lock; |
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struct tasklet_struct notify; |
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int id; |
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char host_id[32]; |
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int irq; |
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unsigned int block_pos; |
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unsigned long timeout_jiffies; |
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struct timer_list timer; |
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struct memstick_host *msh; |
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struct memstick_request *req; |
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unsigned char cmd_flags; |
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unsigned char io_pos; |
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unsigned char ifmode; |
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unsigned int io_word[2]; |
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}; |
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|
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struct jmb38x_ms { |
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struct pci_dev *pdev; |
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int host_cnt; |
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struct memstick_host *hosts[]; |
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}; |
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#define BLOCK_COUNT_MASK 0xffff0000 |
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#define BLOCK_SIZE_MASK 0x00000fff |
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#define DMA_CONTROL_ENABLE 0x00000001 |
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|
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#define TPC_DATA_SEL 0x00008000 |
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#define TPC_DIR 0x00004000 |
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#define TPC_WAIT_INT 0x00002000 |
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#define TPC_GET_INT 0x00000800 |
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#define TPC_CODE_SZ_MASK 0x00000700 |
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#define TPC_DATA_SZ_MASK 0x00000007 |
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#define HOST_CONTROL_TDELAY_EN 0x00040000 |
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#define HOST_CONTROL_HW_OC_P 0x00010000 |
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#define HOST_CONTROL_RESET_REQ 0x00008000 |
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#define HOST_CONTROL_REI 0x00004000 |
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#define HOST_CONTROL_LED 0x00000400 |
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#define HOST_CONTROL_FAST_CLK 0x00000200 |
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#define HOST_CONTROL_RESET 0x00000100 |
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#define HOST_CONTROL_POWER_EN 0x00000080 |
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#define HOST_CONTROL_CLOCK_EN 0x00000040 |
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#define HOST_CONTROL_REO 0x00000008 |
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#define HOST_CONTROL_IF_SHIFT 4 |
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#define HOST_CONTROL_IF_SERIAL 0x0 |
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#define HOST_CONTROL_IF_PAR4 0x1 |
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#define HOST_CONTROL_IF_PAR8 0x3 |
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|
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#define STATUS_BUSY 0x00080000 |
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#define STATUS_MS_DAT7 0x00040000 |
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#define STATUS_MS_DAT6 0x00020000 |
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#define STATUS_MS_DAT5 0x00010000 |
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#define STATUS_MS_DAT4 0x00008000 |
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#define STATUS_MS_DAT3 0x00004000 |
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#define STATUS_MS_DAT2 0x00002000 |
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#define STATUS_MS_DAT1 0x00001000 |
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#define STATUS_MS_DAT0 0x00000800 |
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#define STATUS_HAS_MEDIA 0x00000400 |
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#define STATUS_FIFO_EMPTY 0x00000200 |
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#define STATUS_FIFO_FULL 0x00000100 |
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#define STATUS_MS_CED 0x00000080 |
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#define STATUS_MS_ERR 0x00000040 |
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#define STATUS_MS_BRQ 0x00000020 |
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#define STATUS_MS_CNK 0x00000001 |
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#define INT_STATUS_TPC_ERR 0x00080000 |
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#define INT_STATUS_CRC_ERR 0x00040000 |
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#define INT_STATUS_TIMER_TO 0x00020000 |
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#define INT_STATUS_HSK_TO 0x00010000 |
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#define INT_STATUS_ANY_ERR 0x00008000 |
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#define INT_STATUS_FIFO_WRDY 0x00000080 |
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#define INT_STATUS_FIFO_RRDY 0x00000040 |
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#define INT_STATUS_MEDIA_OUT 0x00000010 |
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#define INT_STATUS_MEDIA_IN 0x00000008 |
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#define INT_STATUS_DMA_BOUNDARY 0x00000004 |
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#define INT_STATUS_EOTRAN 0x00000002 |
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#define INT_STATUS_EOTPC 0x00000001 |
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#define INT_STATUS_ALL 0x000f801f |
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#define PAD_OUTPUT_ENABLE_MS 0x0F3F |
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#define PAD_PU_PD_OFF 0x7FFF0000 |
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#define PAD_PU_PD_ON_MS_SOCK0 0x5f8f0000 |
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#define PAD_PU_PD_ON_MS_SOCK1 0x0f0f0000 |
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#define CLOCK_CONTROL_BY_MMIO 0x00000008 |
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#define CLOCK_CONTROL_40MHZ 0x00000001 |
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#define CLOCK_CONTROL_50MHZ 0x00000002 |
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#define CLOCK_CONTROL_60MHZ 0x00000010 |
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#define CLOCK_CONTROL_62_5MHZ 0x00000004 |
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#define CLOCK_CONTROL_OFF 0x00000000 |
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#define PCI_CTL_CLOCK_DLY_ADDR 0x000000b0 |
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enum { |
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CMD_READY = 0x01, |
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FIFO_READY = 0x02, |
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REG_DATA = 0x04, |
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DMA_DATA = 0x08 |
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}; |
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static unsigned int jmb38x_ms_read_data(struct jmb38x_ms_host *host, |
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unsigned char *buf, unsigned int length) |
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{ |
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unsigned int off = 0; |
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|
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while (host->io_pos && length) { |
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buf[off++] = host->io_word[0] & 0xff; |
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host->io_word[0] >>= 8; |
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length--; |
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host->io_pos--; |
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} |
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if (!length) |
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return off; |
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while (!(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) { |
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if (length < 4) |
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break; |
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*(unsigned int *)(buf + off) = __raw_readl(host->addr + DATA); |
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length -= 4; |
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off += 4; |
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} |
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if (length |
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&& !(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) { |
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host->io_word[0] = readl(host->addr + DATA); |
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for (host->io_pos = 4; host->io_pos; --host->io_pos) { |
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buf[off++] = host->io_word[0] & 0xff; |
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host->io_word[0] >>= 8; |
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length--; |
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if (!length) |
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break; |
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} |
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} |
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return off; |
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} |
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static unsigned int jmb38x_ms_read_reg_data(struct jmb38x_ms_host *host, |
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unsigned char *buf, |
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unsigned int length) |
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{ |
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unsigned int off = 0; |
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while (host->io_pos > 4 && length) { |
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buf[off++] = host->io_word[0] & 0xff; |
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host->io_word[0] >>= 8; |
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length--; |
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host->io_pos--; |
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} |
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if (!length) |
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return off; |
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while (host->io_pos && length) { |
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buf[off++] = host->io_word[1] & 0xff; |
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host->io_word[1] >>= 8; |
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length--; |
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host->io_pos--; |
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} |
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return off; |
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} |
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static unsigned int jmb38x_ms_write_data(struct jmb38x_ms_host *host, |
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unsigned char *buf, |
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unsigned int length) |
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{ |
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unsigned int off = 0; |
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if (host->io_pos) { |
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while (host->io_pos < 4 && length) { |
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host->io_word[0] |= buf[off++] << (host->io_pos * 8); |
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host->io_pos++; |
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length--; |
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} |
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} |
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if (host->io_pos == 4 |
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&& !(STATUS_FIFO_FULL & readl(host->addr + STATUS))) { |
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writel(host->io_word[0], host->addr + DATA); |
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host->io_pos = 0; |
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host->io_word[0] = 0; |
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} else if (host->io_pos) { |
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return off; |
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} |
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if (!length) |
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return off; |
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while (!(STATUS_FIFO_FULL & readl(host->addr + STATUS))) { |
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if (length < 4) |
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break; |
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__raw_writel(*(unsigned int *)(buf + off), |
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host->addr + DATA); |
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length -= 4; |
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off += 4; |
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} |
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switch (length) { |
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case 3: |
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host->io_word[0] |= buf[off + 2] << 16; |
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host->io_pos++; |
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fallthrough; |
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case 2: |
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host->io_word[0] |= buf[off + 1] << 8; |
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host->io_pos++; |
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fallthrough; |
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case 1: |
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host->io_word[0] |= buf[off]; |
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host->io_pos++; |
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} |
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off += host->io_pos; |
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return off; |
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} |
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static unsigned int jmb38x_ms_write_reg_data(struct jmb38x_ms_host *host, |
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unsigned char *buf, |
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unsigned int length) |
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{ |
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unsigned int off = 0; |
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while (host->io_pos < 4 && length) { |
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host->io_word[0] &= ~(0xff << (host->io_pos * 8)); |
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host->io_word[0] |= buf[off++] << (host->io_pos * 8); |
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host->io_pos++; |
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length--; |
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} |
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if (!length) |
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return off; |
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while (host->io_pos < 8 && length) { |
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host->io_word[1] &= ~(0xff << (host->io_pos * 8)); |
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host->io_word[1] |= buf[off++] << (host->io_pos * 8); |
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host->io_pos++; |
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length--; |
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} |
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return off; |
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} |
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static int jmb38x_ms_transfer_data(struct jmb38x_ms_host *host) |
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{ |
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unsigned int length; |
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unsigned int off; |
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unsigned int t_size, p_cnt; |
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unsigned char *buf; |
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struct page *pg; |
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unsigned long flags = 0; |
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if (host->req->long_data) { |
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length = host->req->sg.length - host->block_pos; |
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off = host->req->sg.offset + host->block_pos; |
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} else { |
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length = host->req->data_len - host->block_pos; |
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off = 0; |
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} |
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while (length) { |
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unsigned int p_off; |
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if (host->req->long_data) { |
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pg = nth_page(sg_page(&host->req->sg), |
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off >> PAGE_SHIFT); |
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p_off = offset_in_page(off); |
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p_cnt = PAGE_SIZE - p_off; |
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p_cnt = min(p_cnt, length); |
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local_irq_save(flags); |
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buf = kmap_atomic(pg) + p_off; |
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} else { |
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buf = host->req->data + host->block_pos; |
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p_cnt = host->req->data_len - host->block_pos; |
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} |
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if (host->req->data_dir == WRITE) |
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t_size = !(host->cmd_flags & REG_DATA) |
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? jmb38x_ms_write_data(host, buf, p_cnt) |
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: jmb38x_ms_write_reg_data(host, buf, p_cnt); |
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else |
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t_size = !(host->cmd_flags & REG_DATA) |
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? jmb38x_ms_read_data(host, buf, p_cnt) |
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: jmb38x_ms_read_reg_data(host, buf, p_cnt); |
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if (host->req->long_data) { |
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kunmap_atomic(buf - p_off); |
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local_irq_restore(flags); |
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} |
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if (!t_size) |
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break; |
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host->block_pos += t_size; |
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length -= t_size; |
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off += t_size; |
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} |
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if (!length && host->req->data_dir == WRITE) { |
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if (host->cmd_flags & REG_DATA) { |
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writel(host->io_word[0], host->addr + TPC_P0); |
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writel(host->io_word[1], host->addr + TPC_P1); |
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} else if (host->io_pos) { |
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writel(host->io_word[0], host->addr + DATA); |
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} |
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} |
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return length; |
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} |
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static int jmb38x_ms_issue_cmd(struct memstick_host *msh) |
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{ |
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struct jmb38x_ms_host *host = memstick_priv(msh); |
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unsigned int data_len, cmd, t_val; |
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if (!(STATUS_HAS_MEDIA & readl(host->addr + STATUS))) { |
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dev_dbg(&msh->dev, "no media status\n"); |
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host->req->error = -ETIME; |
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return host->req->error; |
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} |
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dev_dbg(&msh->dev, "control %08x\n", readl(host->addr + HOST_CONTROL)); |
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dev_dbg(&msh->dev, "status %08x\n", readl(host->addr + INT_STATUS)); |
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dev_dbg(&msh->dev, "hstatus %08x\n", readl(host->addr + STATUS)); |
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host->cmd_flags = 0; |
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host->block_pos = 0; |
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host->io_pos = 0; |
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host->io_word[0] = 0; |
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host->io_word[1] = 0; |
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cmd = host->req->tpc << 16; |
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cmd |= TPC_DATA_SEL; |
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if (host->req->data_dir == READ) |
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cmd |= TPC_DIR; |
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if (host->req->need_card_int) { |
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if (host->ifmode == MEMSTICK_SERIAL) |
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cmd |= TPC_GET_INT; |
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else |
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cmd |= TPC_WAIT_INT; |
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} |
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if (!no_dma) |
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host->cmd_flags |= DMA_DATA; |
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if (host->req->long_data) { |
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data_len = host->req->sg.length; |
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} else { |
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data_len = host->req->data_len; |
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host->cmd_flags &= ~DMA_DATA; |
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} |
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if (data_len <= 8) { |
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cmd &= ~(TPC_DATA_SEL | 0xf); |
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host->cmd_flags |= REG_DATA; |
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cmd |= data_len & 0xf; |
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host->cmd_flags &= ~DMA_DATA; |
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} |
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if (host->cmd_flags & DMA_DATA) { |
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if (1 != dma_map_sg(&host->chip->pdev->dev, &host->req->sg, 1, |
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host->req->data_dir == READ |
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? DMA_FROM_DEVICE |
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: DMA_TO_DEVICE)) { |
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host->req->error = -ENOMEM; |
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return host->req->error; |
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} |
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data_len = sg_dma_len(&host->req->sg); |
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writel(sg_dma_address(&host->req->sg), |
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host->addr + DMA_ADDRESS); |
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writel(((1 << 16) & BLOCK_COUNT_MASK) |
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| (data_len & BLOCK_SIZE_MASK), |
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host->addr + BLOCK); |
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writel(DMA_CONTROL_ENABLE, host->addr + DMA_CONTROL); |
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} else if (!(host->cmd_flags & REG_DATA)) { |
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writel(((1 << 16) & BLOCK_COUNT_MASK) |
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| (data_len & BLOCK_SIZE_MASK), |
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host->addr + BLOCK); |
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t_val = readl(host->addr + INT_STATUS_ENABLE); |
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t_val |= host->req->data_dir == READ |
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? INT_STATUS_FIFO_RRDY |
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: INT_STATUS_FIFO_WRDY; |
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writel(t_val, host->addr + INT_STATUS_ENABLE); |
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writel(t_val, host->addr + INT_SIGNAL_ENABLE); |
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} else { |
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cmd &= ~(TPC_DATA_SEL | 0xf); |
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host->cmd_flags |= REG_DATA; |
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cmd |= data_len & 0xf; |
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|
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if (host->req->data_dir == WRITE) { |
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jmb38x_ms_transfer_data(host); |
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writel(host->io_word[0], host->addr + TPC_P0); |
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writel(host->io_word[1], host->addr + TPC_P1); |
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} |
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} |
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|
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mod_timer(&host->timer, jiffies + host->timeout_jiffies); |
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writel(HOST_CONTROL_LED | readl(host->addr + HOST_CONTROL), |
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host->addr + HOST_CONTROL); |
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host->req->error = 0; |
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|
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writel(cmd, host->addr + TPC); |
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dev_dbg(&msh->dev, "executing TPC %08x, len %x\n", cmd, data_len); |
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|
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return 0; |
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} |
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static void jmb38x_ms_complete_cmd(struct memstick_host *msh, int last) |
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{ |
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struct jmb38x_ms_host *host = memstick_priv(msh); |
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unsigned int t_val = 0; |
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int rc; |
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|
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del_timer(&host->timer); |
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|
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dev_dbg(&msh->dev, "c control %08x\n", |
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readl(host->addr + HOST_CONTROL)); |
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dev_dbg(&msh->dev, "c status %08x\n", |
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readl(host->addr + INT_STATUS)); |
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dev_dbg(&msh->dev, "c hstatus %08x\n", readl(host->addr + STATUS)); |
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|
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host->req->int_reg = readl(host->addr + STATUS) & 0xff; |
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|
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writel(0, host->addr + BLOCK); |
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writel(0, host->addr + DMA_CONTROL); |
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|
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if (host->cmd_flags & DMA_DATA) { |
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dma_unmap_sg(&host->chip->pdev->dev, &host->req->sg, 1, |
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host->req->data_dir == READ |
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? DMA_FROM_DEVICE : DMA_TO_DEVICE); |
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} else { |
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t_val = readl(host->addr + INT_STATUS_ENABLE); |
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if (host->req->data_dir == READ) |
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t_val &= ~INT_STATUS_FIFO_RRDY; |
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else |
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t_val &= ~INT_STATUS_FIFO_WRDY; |
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|
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writel(t_val, host->addr + INT_STATUS_ENABLE); |
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writel(t_val, host->addr + INT_SIGNAL_ENABLE); |
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} |
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|
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writel((~HOST_CONTROL_LED) & readl(host->addr + HOST_CONTROL), |
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host->addr + HOST_CONTROL); |
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|
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if (!last) { |
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do { |
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rc = memstick_next_req(msh, &host->req); |
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} while (!rc && jmb38x_ms_issue_cmd(msh)); |
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} else { |
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do { |
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rc = memstick_next_req(msh, &host->req); |
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if (!rc) |
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host->req->error = -ETIME; |
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} while (!rc); |
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} |
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} |
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|
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static irqreturn_t jmb38x_ms_isr(int irq, void *dev_id) |
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{ |
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struct memstick_host *msh = dev_id; |
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struct jmb38x_ms_host *host = memstick_priv(msh); |
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unsigned int irq_status; |
|
|
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spin_lock(&host->lock); |
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irq_status = readl(host->addr + INT_STATUS); |
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dev_dbg(&host->chip->pdev->dev, "irq_status = %08x\n", irq_status); |
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if (irq_status == 0 || irq_status == (~0)) { |
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spin_unlock(&host->lock); |
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return IRQ_NONE; |
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} |
|
|
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if (host->req) { |
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if (irq_status & INT_STATUS_ANY_ERR) { |
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if (irq_status & INT_STATUS_CRC_ERR) |
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host->req->error = -EILSEQ; |
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else if (irq_status & INT_STATUS_TPC_ERR) { |
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dev_dbg(&host->chip->pdev->dev, "TPC_ERR\n"); |
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jmb38x_ms_complete_cmd(msh, 0); |
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} else |
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host->req->error = -ETIME; |
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} else { |
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if (host->cmd_flags & DMA_DATA) { |
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if (irq_status & INT_STATUS_EOTRAN) |
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host->cmd_flags |= FIFO_READY; |
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} else { |
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if (irq_status & (INT_STATUS_FIFO_RRDY |
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| INT_STATUS_FIFO_WRDY)) |
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jmb38x_ms_transfer_data(host); |
|
|
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if (irq_status & INT_STATUS_EOTRAN) { |
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jmb38x_ms_transfer_data(host); |
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host->cmd_flags |= FIFO_READY; |
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} |
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} |
|
|
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if (irq_status & INT_STATUS_EOTPC) { |
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host->cmd_flags |= CMD_READY; |
|
if (host->cmd_flags & REG_DATA) { |
|
if (host->req->data_dir == READ) { |
|
host->io_word[0] |
|
= readl(host->addr |
|
+ TPC_P0); |
|
host->io_word[1] |
|
= readl(host->addr |
|
+ TPC_P1); |
|
host->io_pos = 8; |
|
|
|
jmb38x_ms_transfer_data(host); |
|
} |
|
host->cmd_flags |= FIFO_READY; |
|
} |
|
} |
|
} |
|
} |
|
|
|
if (irq_status & (INT_STATUS_MEDIA_IN | INT_STATUS_MEDIA_OUT)) { |
|
dev_dbg(&host->chip->pdev->dev, "media changed\n"); |
|
memstick_detect_change(msh); |
|
} |
|
|
|
writel(irq_status, host->addr + INT_STATUS); |
|
|
|
if (host->req |
|
&& (((host->cmd_flags & CMD_READY) |
|
&& (host->cmd_flags & FIFO_READY)) |
|
|| host->req->error)) |
|
jmb38x_ms_complete_cmd(msh, 0); |
|
|
|
spin_unlock(&host->lock); |
|
return IRQ_HANDLED; |
|
} |
|
|
|
static void jmb38x_ms_abort(struct timer_list *t) |
|
{ |
|
struct jmb38x_ms_host *host = from_timer(host, t, timer); |
|
struct memstick_host *msh = host->msh; |
|
unsigned long flags; |
|
|
|
dev_dbg(&host->chip->pdev->dev, "abort\n"); |
|
spin_lock_irqsave(&host->lock, flags); |
|
if (host->req) { |
|
host->req->error = -ETIME; |
|
jmb38x_ms_complete_cmd(msh, 0); |
|
} |
|
spin_unlock_irqrestore(&host->lock, flags); |
|
} |
|
|
|
static void jmb38x_ms_req_tasklet(unsigned long data) |
|
{ |
|
struct memstick_host *msh = (struct memstick_host *)data; |
|
struct jmb38x_ms_host *host = memstick_priv(msh); |
|
unsigned long flags; |
|
int rc; |
|
|
|
spin_lock_irqsave(&host->lock, flags); |
|
if (!host->req) { |
|
do { |
|
rc = memstick_next_req(msh, &host->req); |
|
dev_dbg(&host->chip->pdev->dev, "tasklet req %d\n", rc); |
|
} while (!rc && jmb38x_ms_issue_cmd(msh)); |
|
} |
|
spin_unlock_irqrestore(&host->lock, flags); |
|
} |
|
|
|
static void jmb38x_ms_dummy_submit(struct memstick_host *msh) |
|
{ |
|
return; |
|
} |
|
|
|
static void jmb38x_ms_submit_req(struct memstick_host *msh) |
|
{ |
|
struct jmb38x_ms_host *host = memstick_priv(msh); |
|
|
|
tasklet_schedule(&host->notify); |
|
} |
|
|
|
static int jmb38x_ms_reset(struct jmb38x_ms_host *host) |
|
{ |
|
int cnt; |
|
|
|
writel(HOST_CONTROL_RESET_REQ | HOST_CONTROL_CLOCK_EN |
|
| readl(host->addr + HOST_CONTROL), |
|
host->addr + HOST_CONTROL); |
|
|
|
for (cnt = 0; cnt < 20; ++cnt) { |
|
if (!(HOST_CONTROL_RESET_REQ |
|
& readl(host->addr + HOST_CONTROL))) |
|
goto reset_next; |
|
|
|
ndelay(20); |
|
} |
|
dev_dbg(&host->chip->pdev->dev, "reset_req timeout\n"); |
|
|
|
reset_next: |
|
writel(HOST_CONTROL_RESET | HOST_CONTROL_CLOCK_EN |
|
| readl(host->addr + HOST_CONTROL), |
|
host->addr + HOST_CONTROL); |
|
|
|
for (cnt = 0; cnt < 20; ++cnt) { |
|
if (!(HOST_CONTROL_RESET |
|
& readl(host->addr + HOST_CONTROL))) |
|
goto reset_ok; |
|
|
|
ndelay(20); |
|
} |
|
dev_dbg(&host->chip->pdev->dev, "reset timeout\n"); |
|
return -EIO; |
|
|
|
reset_ok: |
|
writel(INT_STATUS_ALL, host->addr + INT_SIGNAL_ENABLE); |
|
writel(INT_STATUS_ALL, host->addr + INT_STATUS_ENABLE); |
|
return 0; |
|
} |
|
|
|
static int jmb38x_ms_set_param(struct memstick_host *msh, |
|
enum memstick_param param, |
|
int value) |
|
{ |
|
struct jmb38x_ms_host *host = memstick_priv(msh); |
|
unsigned int host_ctl = readl(host->addr + HOST_CONTROL); |
|
unsigned int clock_ctl = CLOCK_CONTROL_BY_MMIO, clock_delay = 0; |
|
int rc = 0; |
|
|
|
switch (param) { |
|
case MEMSTICK_POWER: |
|
if (value == MEMSTICK_POWER_ON) { |
|
rc = jmb38x_ms_reset(host); |
|
if (rc) |
|
return rc; |
|
|
|
host_ctl = 7; |
|
host_ctl |= HOST_CONTROL_POWER_EN |
|
| HOST_CONTROL_CLOCK_EN; |
|
writel(host_ctl, host->addr + HOST_CONTROL); |
|
|
|
writel(host->id ? PAD_PU_PD_ON_MS_SOCK1 |
|
: PAD_PU_PD_ON_MS_SOCK0, |
|
host->addr + PAD_PU_PD); |
|
|
|
writel(PAD_OUTPUT_ENABLE_MS, |
|
host->addr + PAD_OUTPUT_ENABLE); |
|
|
|
msleep(10); |
|
dev_dbg(&host->chip->pdev->dev, "power on\n"); |
|
} else if (value == MEMSTICK_POWER_OFF) { |
|
host_ctl &= ~(HOST_CONTROL_POWER_EN |
|
| HOST_CONTROL_CLOCK_EN); |
|
writel(host_ctl, host->addr + HOST_CONTROL); |
|
writel(0, host->addr + PAD_OUTPUT_ENABLE); |
|
writel(PAD_PU_PD_OFF, host->addr + PAD_PU_PD); |
|
dev_dbg(&host->chip->pdev->dev, "power off\n"); |
|
} else |
|
return -EINVAL; |
|
break; |
|
case MEMSTICK_INTERFACE: |
|
dev_dbg(&host->chip->pdev->dev, |
|
"Set Host Interface Mode to %d\n", value); |
|
host_ctl &= ~(HOST_CONTROL_FAST_CLK | HOST_CONTROL_REI | |
|
HOST_CONTROL_REO); |
|
host_ctl |= HOST_CONTROL_TDELAY_EN | HOST_CONTROL_HW_OC_P; |
|
host_ctl &= ~(3 << HOST_CONTROL_IF_SHIFT); |
|
|
|
if (value == MEMSTICK_SERIAL) { |
|
host_ctl |= HOST_CONTROL_IF_SERIAL |
|
<< HOST_CONTROL_IF_SHIFT; |
|
host_ctl |= HOST_CONTROL_REI; |
|
clock_ctl |= CLOCK_CONTROL_40MHZ; |
|
clock_delay = 0; |
|
} else if (value == MEMSTICK_PAR4) { |
|
host_ctl |= HOST_CONTROL_FAST_CLK; |
|
host_ctl |= HOST_CONTROL_IF_PAR4 |
|
<< HOST_CONTROL_IF_SHIFT; |
|
host_ctl |= HOST_CONTROL_REO; |
|
clock_ctl |= CLOCK_CONTROL_40MHZ; |
|
clock_delay = 4; |
|
} else if (value == MEMSTICK_PAR8) { |
|
host_ctl |= HOST_CONTROL_FAST_CLK; |
|
host_ctl |= HOST_CONTROL_IF_PAR8 |
|
<< HOST_CONTROL_IF_SHIFT; |
|
clock_ctl |= CLOCK_CONTROL_50MHZ; |
|
clock_delay = 0; |
|
} else |
|
return -EINVAL; |
|
|
|
writel(host_ctl, host->addr + HOST_CONTROL); |
|
writel(CLOCK_CONTROL_OFF, host->addr + CLOCK_CONTROL); |
|
writel(clock_ctl, host->addr + CLOCK_CONTROL); |
|
pci_write_config_byte(host->chip->pdev, |
|
PCI_CTL_CLOCK_DLY_ADDR + 1, |
|
clock_delay); |
|
host->ifmode = value; |
|
break; |
|
} |
|
return 0; |
|
} |
|
|
|
#define PCI_PMOS0_CONTROL 0xae |
|
#define PMOS0_ENABLE 0x01 |
|
#define PMOS0_OVERCURRENT_LEVEL_2_4V 0x06 |
|
#define PMOS0_EN_OVERCURRENT_DEBOUNCE 0x40 |
|
#define PMOS0_SW_LED_POLARITY_ENABLE 0x80 |
|
#define PMOS0_ACTIVE_BITS (PMOS0_ENABLE | PMOS0_EN_OVERCURRENT_DEBOUNCE | \ |
|
PMOS0_OVERCURRENT_LEVEL_2_4V) |
|
#define PCI_PMOS1_CONTROL 0xbd |
|
#define PMOS1_ACTIVE_BITS 0x4a |
|
#define PCI_CLOCK_CTL 0xb9 |
|
|
|
static int jmb38x_ms_pmos(struct pci_dev *pdev, int flag) |
|
{ |
|
unsigned char val; |
|
|
|
pci_read_config_byte(pdev, PCI_PMOS0_CONTROL, &val); |
|
if (flag) |
|
val |= PMOS0_ACTIVE_BITS; |
|
else |
|
val &= ~PMOS0_ACTIVE_BITS; |
|
pci_write_config_byte(pdev, PCI_PMOS0_CONTROL, val); |
|
dev_dbg(&pdev->dev, "JMB38x: set PMOS0 val 0x%x\n", val); |
|
|
|
if (pci_resource_flags(pdev, 1)) { |
|
pci_read_config_byte(pdev, PCI_PMOS1_CONTROL, &val); |
|
if (flag) |
|
val |= PMOS1_ACTIVE_BITS; |
|
else |
|
val &= ~PMOS1_ACTIVE_BITS; |
|
pci_write_config_byte(pdev, PCI_PMOS1_CONTROL, val); |
|
dev_dbg(&pdev->dev, "JMB38x: set PMOS1 val 0x%x\n", val); |
|
} |
|
|
|
pci_read_config_byte(pdev, PCI_CLOCK_CTL, &val); |
|
pci_write_config_byte(pdev, PCI_CLOCK_CTL, val & ~0x0f); |
|
pci_write_config_byte(pdev, PCI_CLOCK_CTL, val | 0x01); |
|
dev_dbg(&pdev->dev, "Clock Control by PCI config is disabled!\n"); |
|
|
|
return 0; |
|
} |
|
|
|
static int __maybe_unused jmb38x_ms_suspend(struct device *dev) |
|
{ |
|
struct jmb38x_ms *jm = dev_get_drvdata(dev); |
|
|
|
int cnt; |
|
|
|
for (cnt = 0; cnt < jm->host_cnt; ++cnt) { |
|
if (!jm->hosts[cnt]) |
|
break; |
|
memstick_suspend_host(jm->hosts[cnt]); |
|
} |
|
|
|
device_wakeup_disable(dev); |
|
|
|
return 0; |
|
} |
|
|
|
static int __maybe_unused jmb38x_ms_resume(struct device *dev) |
|
{ |
|
struct jmb38x_ms *jm = dev_get_drvdata(dev); |
|
int rc; |
|
|
|
jmb38x_ms_pmos(to_pci_dev(dev), 1); |
|
|
|
for (rc = 0; rc < jm->host_cnt; ++rc) { |
|
if (!jm->hosts[rc]) |
|
break; |
|
memstick_resume_host(jm->hosts[rc]); |
|
memstick_detect_change(jm->hosts[rc]); |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int jmb38x_ms_count_slots(struct pci_dev *pdev) |
|
{ |
|
int cnt, rc = 0; |
|
|
|
for (cnt = 0; cnt < PCI_STD_NUM_BARS; ++cnt) { |
|
if (!(IORESOURCE_MEM & pci_resource_flags(pdev, cnt))) |
|
break; |
|
|
|
if (256 != pci_resource_len(pdev, cnt)) |
|
break; |
|
|
|
++rc; |
|
} |
|
return rc; |
|
} |
|
|
|
static struct memstick_host *jmb38x_ms_alloc_host(struct jmb38x_ms *jm, int cnt) |
|
{ |
|
struct memstick_host *msh; |
|
struct jmb38x_ms_host *host; |
|
|
|
msh = memstick_alloc_host(sizeof(struct jmb38x_ms_host), |
|
&jm->pdev->dev); |
|
if (!msh) |
|
return NULL; |
|
|
|
host = memstick_priv(msh); |
|
host->msh = msh; |
|
host->chip = jm; |
|
host->addr = ioremap(pci_resource_start(jm->pdev, cnt), |
|
pci_resource_len(jm->pdev, cnt)); |
|
if (!host->addr) |
|
goto err_out_free; |
|
|
|
spin_lock_init(&host->lock); |
|
host->id = cnt; |
|
snprintf(host->host_id, sizeof(host->host_id), DRIVER_NAME ":slot%d", |
|
host->id); |
|
host->irq = jm->pdev->irq; |
|
host->timeout_jiffies = msecs_to_jiffies(1000); |
|
|
|
tasklet_init(&host->notify, jmb38x_ms_req_tasklet, (unsigned long)msh); |
|
msh->request = jmb38x_ms_submit_req; |
|
msh->set_param = jmb38x_ms_set_param; |
|
|
|
msh->caps = MEMSTICK_CAP_PAR4 | MEMSTICK_CAP_PAR8; |
|
|
|
timer_setup(&host->timer, jmb38x_ms_abort, 0); |
|
|
|
if (!request_irq(host->irq, jmb38x_ms_isr, IRQF_SHARED, host->host_id, |
|
msh)) |
|
return msh; |
|
|
|
iounmap(host->addr); |
|
err_out_free: |
|
kfree(msh); |
|
return NULL; |
|
} |
|
|
|
static void jmb38x_ms_free_host(struct memstick_host *msh) |
|
{ |
|
struct jmb38x_ms_host *host = memstick_priv(msh); |
|
|
|
free_irq(host->irq, msh); |
|
iounmap(host->addr); |
|
memstick_free_host(msh); |
|
} |
|
|
|
static int jmb38x_ms_probe(struct pci_dev *pdev, |
|
const struct pci_device_id *dev_id) |
|
{ |
|
struct jmb38x_ms *jm; |
|
int pci_dev_busy = 0; |
|
int rc, cnt; |
|
|
|
rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); |
|
if (rc) |
|
return rc; |
|
|
|
rc = pci_enable_device(pdev); |
|
if (rc) |
|
return rc; |
|
|
|
pci_set_master(pdev); |
|
|
|
rc = pci_request_regions(pdev, DRIVER_NAME); |
|
if (rc) { |
|
pci_dev_busy = 1; |
|
goto err_out; |
|
} |
|
|
|
jmb38x_ms_pmos(pdev, 1); |
|
|
|
cnt = jmb38x_ms_count_slots(pdev); |
|
if (!cnt) { |
|
rc = -ENODEV; |
|
pci_dev_busy = 1; |
|
goto err_out_int; |
|
} |
|
|
|
jm = kzalloc(sizeof(struct jmb38x_ms) |
|
+ cnt * sizeof(struct memstick_host *), GFP_KERNEL); |
|
if (!jm) { |
|
rc = -ENOMEM; |
|
goto err_out_int; |
|
} |
|
|
|
jm->pdev = pdev; |
|
jm->host_cnt = cnt; |
|
pci_set_drvdata(pdev, jm); |
|
|
|
for (cnt = 0; cnt < jm->host_cnt; ++cnt) { |
|
jm->hosts[cnt] = jmb38x_ms_alloc_host(jm, cnt); |
|
if (!jm->hosts[cnt]) |
|
break; |
|
|
|
rc = memstick_add_host(jm->hosts[cnt]); |
|
|
|
if (rc) { |
|
jmb38x_ms_free_host(jm->hosts[cnt]); |
|
jm->hosts[cnt] = NULL; |
|
break; |
|
} |
|
} |
|
|
|
if (cnt) |
|
return 0; |
|
|
|
rc = -ENODEV; |
|
|
|
pci_set_drvdata(pdev, NULL); |
|
kfree(jm); |
|
err_out_int: |
|
pci_release_regions(pdev); |
|
err_out: |
|
if (!pci_dev_busy) |
|
pci_disable_device(pdev); |
|
return rc; |
|
} |
|
|
|
static void jmb38x_ms_remove(struct pci_dev *dev) |
|
{ |
|
struct jmb38x_ms *jm = pci_get_drvdata(dev); |
|
struct jmb38x_ms_host *host; |
|
int cnt; |
|
unsigned long flags; |
|
|
|
for (cnt = 0; cnt < jm->host_cnt; ++cnt) { |
|
if (!jm->hosts[cnt]) |
|
break; |
|
|
|
host = memstick_priv(jm->hosts[cnt]); |
|
|
|
jm->hosts[cnt]->request = jmb38x_ms_dummy_submit; |
|
tasklet_kill(&host->notify); |
|
writel(0, host->addr + INT_SIGNAL_ENABLE); |
|
writel(0, host->addr + INT_STATUS_ENABLE); |
|
dev_dbg(&jm->pdev->dev, "interrupts off\n"); |
|
spin_lock_irqsave(&host->lock, flags); |
|
if (host->req) { |
|
host->req->error = -ETIME; |
|
jmb38x_ms_complete_cmd(jm->hosts[cnt], 1); |
|
} |
|
spin_unlock_irqrestore(&host->lock, flags); |
|
|
|
memstick_remove_host(jm->hosts[cnt]); |
|
dev_dbg(&jm->pdev->dev, "host removed\n"); |
|
|
|
jmb38x_ms_free_host(jm->hosts[cnt]); |
|
} |
|
|
|
jmb38x_ms_pmos(dev, 0); |
|
|
|
pci_set_drvdata(dev, NULL); |
|
pci_release_regions(dev); |
|
pci_disable_device(dev); |
|
kfree(jm); |
|
} |
|
|
|
static struct pci_device_id jmb38x_ms_id_tbl [] = { |
|
{ PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB38X_MS) }, |
|
{ PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB385_MS) }, |
|
{ PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB390_MS) }, |
|
{ } |
|
}; |
|
|
|
static SIMPLE_DEV_PM_OPS(jmb38x_ms_pm_ops, jmb38x_ms_suspend, jmb38x_ms_resume); |
|
|
|
static struct pci_driver jmb38x_ms_driver = { |
|
.name = DRIVER_NAME, |
|
.id_table = jmb38x_ms_id_tbl, |
|
.probe = jmb38x_ms_probe, |
|
.remove = jmb38x_ms_remove, |
|
.driver.pm = &jmb38x_ms_pm_ops, |
|
}; |
|
|
|
module_pci_driver(jmb38x_ms_driver); |
|
|
|
MODULE_AUTHOR("Alex Dubov"); |
|
MODULE_DESCRIPTION("JMicron jmb38x MemoryStick driver"); |
|
MODULE_LICENSE("GPL"); |
|
MODULE_DEVICE_TABLE(pci, jmb38x_ms_id_tbl);
|
|
|