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73 lines
1.9 KiB
73 lines
1.9 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* Copyright (C) 2020 Linaro Ltd |
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*/ |
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#ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H |
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#define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H |
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#define RPM_BUS_MASTER_REQ 0x73616d62 |
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#define RPM_BUS_SLAVE_REQ 0x766c7362 |
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#define QCOM_MAX_LINKS 12 |
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#define to_qcom_provider(_provider) \ |
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container_of(_provider, struct qcom_icc_provider, provider) |
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/** |
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* struct qcom_icc_provider - Qualcomm specific interconnect provider |
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* @provider: generic interconnect provider |
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* @bus_clks: the clk_bulk_data table of bus clocks |
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* @num_clks: the total number of clk_bulk_data entries |
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*/ |
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struct qcom_icc_provider { |
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struct icc_provider provider; |
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struct clk_bulk_data *bus_clks; |
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int num_clks; |
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}; |
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/** |
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* struct qcom_icc_node - Qualcomm specific interconnect nodes |
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* @name: the node name used in debugfs |
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* @id: a unique node identifier |
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* @links: an array of nodes where we can go next while traversing |
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* @num_links: the total number of @links |
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* @buswidth: width of the interconnect between a node and the bus (bytes) |
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* @mas_rpm_id: RPM id for devices that are bus masters |
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* @slv_rpm_id: RPM id for devices that are bus slaves |
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* @rate: current bus clock rate in Hz |
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*/ |
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struct qcom_icc_node { |
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unsigned char *name; |
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u16 id; |
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u16 links[QCOM_MAX_LINKS]; |
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u16 num_links; |
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u16 buswidth; |
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int mas_rpm_id; |
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int slv_rpm_id; |
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u64 rate; |
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}; |
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struct qcom_icc_desc { |
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struct qcom_icc_node **nodes; |
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size_t num_nodes; |
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}; |
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#define DEFINE_QNODE(_name, _id, _buswidth, _mas_rpm_id, _slv_rpm_id, \ |
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...) \ |
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static struct qcom_icc_node _name = { \ |
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.name = #_name, \ |
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.id = _id, \ |
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.buswidth = _buswidth, \ |
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.mas_rpm_id = _mas_rpm_id, \ |
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.slv_rpm_id = _slv_rpm_id, \ |
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.num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })), \ |
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.links = { __VA_ARGS__ }, \ |
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} |
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int qnoc_probe(struct platform_device *pdev, size_t cd_size, int cd_num, |
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const struct clk_bulk_data *cd); |
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int qnoc_remove(struct platform_device *pdev); |
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#endif
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