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1389 lines
33 KiB
1389 lines
33 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (c) 2016, Zodiac Inflight Innovations |
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* Copyright (c) 2007-2016, Synaptics Incorporated |
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* Copyright (C) 2012 Alexandra Chin <[email protected]> |
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* Copyright (C) 2012 Scott Lin <[email protected]> |
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*/ |
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|
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#include <linux/bitops.h> |
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#include <linux/kernel.h> |
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#include <linux/rmi.h> |
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#include <linux/firmware.h> |
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#include <linux/delay.h> |
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#include <linux/slab.h> |
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#include <linux/jiffies.h> |
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#include <asm/unaligned.h> |
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|
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#include "rmi_driver.h" |
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#include "rmi_f34.h" |
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|
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static int rmi_f34v7_read_flash_status(struct f34_data *f34) |
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{ |
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u8 status; |
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u8 command; |
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int ret; |
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|
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ret = rmi_read_block(f34->fn->rmi_dev, |
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f34->fn->fd.data_base_addr + f34->v7.off.flash_status, |
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&status, |
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sizeof(status)); |
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if (ret < 0) { |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: Error %d reading flash status\n", __func__, ret); |
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return ret; |
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} |
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|
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f34->v7.in_bl_mode = status >> 7; |
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f34->v7.flash_status = status & 0x1f; |
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|
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if (f34->v7.flash_status != 0x00) { |
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dev_err(&f34->fn->dev, "%s: status=%d, command=0x%02x\n", |
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__func__, f34->v7.flash_status, f34->v7.command); |
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} |
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ret = rmi_read_block(f34->fn->rmi_dev, |
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f34->fn->fd.data_base_addr + f34->v7.off.flash_cmd, |
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&command, |
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sizeof(command)); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, "%s: Failed to read flash command\n", |
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__func__); |
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return ret; |
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} |
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f34->v7.command = command; |
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return 0; |
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} |
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static int rmi_f34v7_wait_for_idle(struct f34_data *f34, int timeout_ms) |
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{ |
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unsigned long timeout; |
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timeout = msecs_to_jiffies(timeout_ms); |
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if (!wait_for_completion_timeout(&f34->v7.cmd_done, timeout)) { |
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dev_warn(&f34->fn->dev, "%s: Timed out waiting for idle status\n", |
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__func__); |
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return -ETIMEDOUT; |
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} |
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return 0; |
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} |
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static int rmi_f34v7_write_command_single_transaction(struct f34_data *f34, |
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u8 cmd) |
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{ |
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int ret; |
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u8 base; |
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struct f34v7_data_1_5 data_1_5; |
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base = f34->fn->fd.data_base_addr; |
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|
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memset(&data_1_5, 0, sizeof(data_1_5)); |
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switch (cmd) { |
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case v7_CMD_ERASE_ALL: |
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data_1_5.partition_id = CORE_CODE_PARTITION; |
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data_1_5.command = CMD_V7_ERASE_AP; |
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break; |
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case v7_CMD_ERASE_UI_FIRMWARE: |
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data_1_5.partition_id = CORE_CODE_PARTITION; |
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data_1_5.command = CMD_V7_ERASE; |
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break; |
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case v7_CMD_ERASE_BL_CONFIG: |
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data_1_5.partition_id = GLOBAL_PARAMETERS_PARTITION; |
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data_1_5.command = CMD_V7_ERASE; |
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break; |
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case v7_CMD_ERASE_UI_CONFIG: |
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data_1_5.partition_id = CORE_CONFIG_PARTITION; |
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data_1_5.command = CMD_V7_ERASE; |
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break; |
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case v7_CMD_ERASE_DISP_CONFIG: |
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data_1_5.partition_id = DISPLAY_CONFIG_PARTITION; |
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data_1_5.command = CMD_V7_ERASE; |
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break; |
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case v7_CMD_ERASE_FLASH_CONFIG: |
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data_1_5.partition_id = FLASH_CONFIG_PARTITION; |
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data_1_5.command = CMD_V7_ERASE; |
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break; |
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case v7_CMD_ERASE_GUEST_CODE: |
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data_1_5.partition_id = GUEST_CODE_PARTITION; |
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data_1_5.command = CMD_V7_ERASE; |
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break; |
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case v7_CMD_ENABLE_FLASH_PROG: |
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data_1_5.partition_id = BOOTLOADER_PARTITION; |
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data_1_5.command = CMD_V7_ENTER_BL; |
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break; |
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} |
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data_1_5.payload[0] = f34->bootloader_id[0]; |
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data_1_5.payload[1] = f34->bootloader_id[1]; |
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ret = rmi_write_block(f34->fn->rmi_dev, |
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base + f34->v7.off.partition_id, |
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&data_1_5, sizeof(data_1_5)); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, |
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"%s: Failed to write single transaction command\n", |
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__func__); |
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return ret; |
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} |
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return 0; |
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} |
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static int rmi_f34v7_write_command(struct f34_data *f34, u8 cmd) |
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{ |
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int ret; |
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u8 base; |
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u8 command; |
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base = f34->fn->fd.data_base_addr; |
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switch (cmd) { |
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case v7_CMD_WRITE_FW: |
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case v7_CMD_WRITE_CONFIG: |
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case v7_CMD_WRITE_GUEST_CODE: |
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command = CMD_V7_WRITE; |
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break; |
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case v7_CMD_READ_CONFIG: |
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command = CMD_V7_READ; |
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break; |
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case v7_CMD_ERASE_ALL: |
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command = CMD_V7_ERASE_AP; |
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break; |
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case v7_CMD_ERASE_UI_FIRMWARE: |
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case v7_CMD_ERASE_BL_CONFIG: |
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case v7_CMD_ERASE_UI_CONFIG: |
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case v7_CMD_ERASE_DISP_CONFIG: |
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case v7_CMD_ERASE_FLASH_CONFIG: |
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case v7_CMD_ERASE_GUEST_CODE: |
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command = CMD_V7_ERASE; |
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break; |
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case v7_CMD_ENABLE_FLASH_PROG: |
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command = CMD_V7_ENTER_BL; |
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break; |
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default: |
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dev_err(&f34->fn->dev, "%s: Invalid command 0x%02x\n", |
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__func__, cmd); |
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return -EINVAL; |
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} |
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f34->v7.command = command; |
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switch (cmd) { |
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case v7_CMD_ERASE_ALL: |
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case v7_CMD_ERASE_UI_FIRMWARE: |
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case v7_CMD_ERASE_BL_CONFIG: |
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case v7_CMD_ERASE_UI_CONFIG: |
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case v7_CMD_ERASE_DISP_CONFIG: |
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case v7_CMD_ERASE_FLASH_CONFIG: |
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case v7_CMD_ERASE_GUEST_CODE: |
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case v7_CMD_ENABLE_FLASH_PROG: |
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ret = rmi_f34v7_write_command_single_transaction(f34, cmd); |
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if (ret < 0) |
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return ret; |
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else |
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return 0; |
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default: |
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break; |
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} |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: writing cmd %02X\n", |
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__func__, command); |
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ret = rmi_write_block(f34->fn->rmi_dev, |
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base + f34->v7.off.flash_cmd, |
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&command, sizeof(command)); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, "%s: Failed to write flash command\n", |
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__func__); |
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return ret; |
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} |
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return 0; |
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} |
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static int rmi_f34v7_write_partition_id(struct f34_data *f34, u8 cmd) |
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{ |
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int ret; |
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u8 base; |
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u8 partition; |
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base = f34->fn->fd.data_base_addr; |
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switch (cmd) { |
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case v7_CMD_WRITE_FW: |
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partition = CORE_CODE_PARTITION; |
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break; |
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case v7_CMD_WRITE_CONFIG: |
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case v7_CMD_READ_CONFIG: |
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if (f34->v7.config_area == v7_UI_CONFIG_AREA) |
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partition = CORE_CONFIG_PARTITION; |
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else if (f34->v7.config_area == v7_DP_CONFIG_AREA) |
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partition = DISPLAY_CONFIG_PARTITION; |
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else if (f34->v7.config_area == v7_PM_CONFIG_AREA) |
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partition = GUEST_SERIALIZATION_PARTITION; |
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else if (f34->v7.config_area == v7_BL_CONFIG_AREA) |
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partition = GLOBAL_PARAMETERS_PARTITION; |
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else if (f34->v7.config_area == v7_FLASH_CONFIG_AREA) |
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partition = FLASH_CONFIG_PARTITION; |
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break; |
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case v7_CMD_WRITE_GUEST_CODE: |
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partition = GUEST_CODE_PARTITION; |
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break; |
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case v7_CMD_ERASE_ALL: |
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partition = CORE_CODE_PARTITION; |
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break; |
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case v7_CMD_ERASE_BL_CONFIG: |
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partition = GLOBAL_PARAMETERS_PARTITION; |
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break; |
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case v7_CMD_ERASE_UI_CONFIG: |
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partition = CORE_CONFIG_PARTITION; |
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break; |
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case v7_CMD_ERASE_DISP_CONFIG: |
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partition = DISPLAY_CONFIG_PARTITION; |
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break; |
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case v7_CMD_ERASE_FLASH_CONFIG: |
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partition = FLASH_CONFIG_PARTITION; |
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break; |
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case v7_CMD_ERASE_GUEST_CODE: |
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partition = GUEST_CODE_PARTITION; |
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break; |
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case v7_CMD_ENABLE_FLASH_PROG: |
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partition = BOOTLOADER_PARTITION; |
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break; |
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default: |
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dev_err(&f34->fn->dev, "%s: Invalid command 0x%02x\n", |
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__func__, cmd); |
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return -EINVAL; |
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} |
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ret = rmi_write_block(f34->fn->rmi_dev, |
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base + f34->v7.off.partition_id, |
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&partition, sizeof(partition)); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, "%s: Failed to write partition ID\n", |
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__func__); |
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return ret; |
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} |
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return 0; |
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} |
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static int rmi_f34v7_read_partition_table(struct f34_data *f34) |
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{ |
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int ret; |
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unsigned long timeout; |
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u8 base; |
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__le16 length; |
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u16 block_number = 0; |
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base = f34->fn->fd.data_base_addr; |
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f34->v7.config_area = v7_FLASH_CONFIG_AREA; |
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ret = rmi_f34v7_write_partition_id(f34, v7_CMD_READ_CONFIG); |
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if (ret < 0) |
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return ret; |
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ret = rmi_write_block(f34->fn->rmi_dev, |
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base + f34->v7.off.block_number, |
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&block_number, sizeof(block_number)); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, "%s: Failed to write block number\n", |
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__func__); |
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return ret; |
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} |
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put_unaligned_le16(f34->v7.flash_config_length, &length); |
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ret = rmi_write_block(f34->fn->rmi_dev, |
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base + f34->v7.off.transfer_length, |
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&length, sizeof(length)); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, "%s: Failed to write transfer length\n", |
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__func__); |
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return ret; |
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} |
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init_completion(&f34->v7.cmd_done); |
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ret = rmi_f34v7_write_command(f34, v7_CMD_READ_CONFIG); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, "%s: Failed to write command\n", |
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__func__); |
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return ret; |
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} |
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timeout = msecs_to_jiffies(F34_WRITE_WAIT_MS); |
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while (time_before(jiffies, timeout)) { |
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usleep_range(5000, 6000); |
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rmi_f34v7_read_flash_status(f34); |
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if (f34->v7.command == v7_CMD_IDLE && |
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f34->v7.flash_status == 0x00) { |
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break; |
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} |
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} |
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ret = rmi_read_block(f34->fn->rmi_dev, |
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base + f34->v7.off.payload, |
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f34->v7.read_config_buf, |
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f34->v7.partition_table_bytes); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, "%s: Failed to read block data\n", |
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__func__); |
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return ret; |
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} |
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return 0; |
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} |
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static void rmi_f34v7_parse_partition_table(struct f34_data *f34, |
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const void *partition_table, |
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struct block_count *blkcount, |
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struct physical_address *phyaddr) |
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{ |
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int i; |
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int index; |
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u16 partition_length; |
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u16 physical_address; |
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const struct partition_table *ptable; |
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for (i = 0; i < f34->v7.partitions; i++) { |
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index = i * 8 + 2; |
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ptable = partition_table + index; |
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partition_length = le16_to_cpu(ptable->partition_length); |
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physical_address = le16_to_cpu(ptable->start_physical_address); |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: Partition entry %d: %*ph\n", |
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__func__, i, sizeof(struct partition_table), ptable); |
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switch (ptable->partition_id & 0x1f) { |
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case CORE_CODE_PARTITION: |
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blkcount->ui_firmware = partition_length; |
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phyaddr->ui_firmware = physical_address; |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: Core code block count: %d\n", |
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__func__, blkcount->ui_firmware); |
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break; |
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case CORE_CONFIG_PARTITION: |
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blkcount->ui_config = partition_length; |
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phyaddr->ui_config = physical_address; |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: Core config block count: %d\n", |
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__func__, blkcount->ui_config); |
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break; |
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case DISPLAY_CONFIG_PARTITION: |
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blkcount->dp_config = partition_length; |
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phyaddr->dp_config = physical_address; |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: Display config block count: %d\n", |
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__func__, blkcount->dp_config); |
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break; |
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case FLASH_CONFIG_PARTITION: |
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blkcount->fl_config = partition_length; |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: Flash config block count: %d\n", |
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__func__, blkcount->fl_config); |
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break; |
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case GUEST_CODE_PARTITION: |
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blkcount->guest_code = partition_length; |
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phyaddr->guest_code = physical_address; |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: Guest code block count: %d\n", |
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__func__, blkcount->guest_code); |
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break; |
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case GUEST_SERIALIZATION_PARTITION: |
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blkcount->pm_config = partition_length; |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: Guest serialization block count: %d\n", |
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__func__, blkcount->pm_config); |
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break; |
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case GLOBAL_PARAMETERS_PARTITION: |
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blkcount->bl_config = partition_length; |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: Global parameters block count: %d\n", |
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__func__, blkcount->bl_config); |
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break; |
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case DEVICE_CONFIG_PARTITION: |
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blkcount->lockdown = partition_length; |
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: Device config block count: %d\n", |
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__func__, blkcount->lockdown); |
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break; |
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} |
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} |
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} |
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|
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static int rmi_f34v7_read_queries_bl_version(struct f34_data *f34) |
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{ |
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int ret; |
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u8 base; |
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int offset; |
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u8 query_0; |
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struct f34v7_query_1_7 query_1_7; |
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|
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base = f34->fn->fd.query_base_addr; |
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ret = rmi_read_block(f34->fn->rmi_dev, |
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base, |
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&query_0, |
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sizeof(query_0)); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, |
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"%s: Failed to read query 0\n", __func__); |
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return ret; |
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} |
|
|
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offset = (query_0 & 0x7) + 1; |
|
|
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ret = rmi_read_block(f34->fn->rmi_dev, |
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base + offset, |
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&query_1_7, |
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sizeof(query_1_7)); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, "%s: Failed to read queries 1 to 7\n", |
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__func__); |
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return ret; |
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} |
|
|
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f34->bootloader_id[0] = query_1_7.bl_minor_revision; |
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f34->bootloader_id[1] = query_1_7.bl_major_revision; |
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|
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "Bootloader V%d.%d\n", |
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f34->bootloader_id[1], f34->bootloader_id[0]); |
|
|
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return 0; |
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} |
|
|
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static int rmi_f34v7_read_queries(struct f34_data *f34) |
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{ |
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int ret; |
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int i; |
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u8 base; |
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int offset; |
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u8 *ptable; |
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u8 query_0; |
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struct f34v7_query_1_7 query_1_7; |
|
|
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base = f34->fn->fd.query_base_addr; |
|
|
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ret = rmi_read_block(f34->fn->rmi_dev, |
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base, |
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&query_0, |
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sizeof(query_0)); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, |
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"%s: Failed to read query 0\n", __func__); |
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return ret; |
|
} |
|
|
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offset = (query_0 & 0x07) + 1; |
|
|
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ret = rmi_read_block(f34->fn->rmi_dev, |
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base + offset, |
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&query_1_7, |
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sizeof(query_1_7)); |
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if (ret < 0) { |
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dev_err(&f34->fn->dev, "%s: Failed to read queries 1 to 7\n", |
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__func__); |
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return ret; |
|
} |
|
|
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f34->bootloader_id[0] = query_1_7.bl_minor_revision; |
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f34->bootloader_id[1] = query_1_7.bl_major_revision; |
|
|
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f34->v7.block_size = le16_to_cpu(query_1_7.block_size); |
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f34->v7.flash_config_length = |
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le16_to_cpu(query_1_7.flash_config_length); |
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f34->v7.payload_length = le16_to_cpu(query_1_7.payload_length); |
|
|
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: f34->v7.block_size = %d\n", |
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__func__, f34->v7.block_size); |
|
|
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f34->v7.off.flash_status = V7_FLASH_STATUS_OFFSET; |
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f34->v7.off.partition_id = V7_PARTITION_ID_OFFSET; |
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f34->v7.off.block_number = V7_BLOCK_NUMBER_OFFSET; |
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f34->v7.off.transfer_length = V7_TRANSFER_LENGTH_OFFSET; |
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f34->v7.off.flash_cmd = V7_COMMAND_OFFSET; |
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f34->v7.off.payload = V7_PAYLOAD_OFFSET; |
|
|
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f34->v7.has_display_cfg = query_1_7.partition_support[1] & HAS_DISP_CFG; |
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f34->v7.has_guest_code = |
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query_1_7.partition_support[1] & HAS_GUEST_CODE; |
|
|
|
if (query_0 & HAS_CONFIG_ID) { |
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u8 f34_ctrl[CONFIG_ID_SIZE]; |
|
|
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ret = rmi_read_block(f34->fn->rmi_dev, |
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f34->fn->fd.control_base_addr, |
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f34_ctrl, |
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sizeof(f34_ctrl)); |
|
if (ret) |
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return ret; |
|
|
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/* Eat leading zeros */ |
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for (i = 0; i < sizeof(f34_ctrl) - 1 && !f34_ctrl[i]; i++) |
|
/* Empty */; |
|
|
|
snprintf(f34->configuration_id, sizeof(f34->configuration_id), |
|
"%*phN", (int)sizeof(f34_ctrl) - i, f34_ctrl + i); |
|
|
|
rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "Configuration ID: %s\n", |
|
f34->configuration_id); |
|
} |
|
|
|
f34->v7.partitions = 0; |
|
for (i = 0; i < sizeof(query_1_7.partition_support); i++) |
|
f34->v7.partitions += hweight8(query_1_7.partition_support[i]); |
|
|
|
rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Supported partitions: %*ph\n", |
|
__func__, sizeof(query_1_7.partition_support), |
|
query_1_7.partition_support); |
|
|
|
|
|
f34->v7.partition_table_bytes = f34->v7.partitions * 8 + 2; |
|
|
|
f34->v7.read_config_buf = devm_kzalloc(&f34->fn->dev, |
|
f34->v7.partition_table_bytes, |
|
GFP_KERNEL); |
|
if (!f34->v7.read_config_buf) { |
|
f34->v7.read_config_buf_size = 0; |
|
return -ENOMEM; |
|
} |
|
|
|
f34->v7.read_config_buf_size = f34->v7.partition_table_bytes; |
|
ptable = f34->v7.read_config_buf; |
|
|
|
ret = rmi_f34v7_read_partition_table(f34); |
|
if (ret < 0) { |
|
dev_err(&f34->fn->dev, "%s: Failed to read partition table\n", |
|
__func__); |
|
return ret; |
|
} |
|
|
|
rmi_f34v7_parse_partition_table(f34, ptable, |
|
&f34->v7.blkcount, &f34->v7.phyaddr); |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_check_ui_firmware_size(struct f34_data *f34) |
|
{ |
|
u16 block_count; |
|
|
|
block_count = f34->v7.img.ui_firmware.size / f34->v7.block_size; |
|
f34->update_size += block_count; |
|
|
|
if (block_count != f34->v7.blkcount.ui_firmware) { |
|
dev_err(&f34->fn->dev, |
|
"UI firmware size mismatch: %d != %d\n", |
|
block_count, f34->v7.blkcount.ui_firmware); |
|
return -EINVAL; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_check_ui_config_size(struct f34_data *f34) |
|
{ |
|
u16 block_count; |
|
|
|
block_count = f34->v7.img.ui_config.size / f34->v7.block_size; |
|
f34->update_size += block_count; |
|
|
|
if (block_count != f34->v7.blkcount.ui_config) { |
|
dev_err(&f34->fn->dev, "UI config size mismatch\n"); |
|
return -EINVAL; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_check_dp_config_size(struct f34_data *f34) |
|
{ |
|
u16 block_count; |
|
|
|
block_count = f34->v7.img.dp_config.size / f34->v7.block_size; |
|
f34->update_size += block_count; |
|
|
|
if (block_count != f34->v7.blkcount.dp_config) { |
|
dev_err(&f34->fn->dev, "Display config size mismatch\n"); |
|
return -EINVAL; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_check_guest_code_size(struct f34_data *f34) |
|
{ |
|
u16 block_count; |
|
|
|
block_count = f34->v7.img.guest_code.size / f34->v7.block_size; |
|
f34->update_size += block_count; |
|
|
|
if (block_count != f34->v7.blkcount.guest_code) { |
|
dev_err(&f34->fn->dev, "Guest code size mismatch\n"); |
|
return -EINVAL; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_check_bl_config_size(struct f34_data *f34) |
|
{ |
|
u16 block_count; |
|
|
|
block_count = f34->v7.img.bl_config.size / f34->v7.block_size; |
|
f34->update_size += block_count; |
|
|
|
if (block_count != f34->v7.blkcount.bl_config) { |
|
dev_err(&f34->fn->dev, "Bootloader config size mismatch\n"); |
|
return -EINVAL; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_erase_config(struct f34_data *f34) |
|
{ |
|
int ret; |
|
|
|
dev_info(&f34->fn->dev, "Erasing config...\n"); |
|
|
|
init_completion(&f34->v7.cmd_done); |
|
|
|
switch (f34->v7.config_area) { |
|
case v7_UI_CONFIG_AREA: |
|
ret = rmi_f34v7_write_command(f34, v7_CMD_ERASE_UI_CONFIG); |
|
if (ret < 0) |
|
return ret; |
|
break; |
|
case v7_DP_CONFIG_AREA: |
|
ret = rmi_f34v7_write_command(f34, v7_CMD_ERASE_DISP_CONFIG); |
|
if (ret < 0) |
|
return ret; |
|
break; |
|
case v7_BL_CONFIG_AREA: |
|
ret = rmi_f34v7_write_command(f34, v7_CMD_ERASE_BL_CONFIG); |
|
if (ret < 0) |
|
return ret; |
|
break; |
|
} |
|
|
|
ret = rmi_f34v7_wait_for_idle(f34, F34_ERASE_WAIT_MS); |
|
if (ret < 0) |
|
return ret; |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_erase_guest_code(struct f34_data *f34) |
|
{ |
|
int ret; |
|
|
|
dev_info(&f34->fn->dev, "Erasing guest code...\n"); |
|
|
|
init_completion(&f34->v7.cmd_done); |
|
|
|
ret = rmi_f34v7_write_command(f34, v7_CMD_ERASE_GUEST_CODE); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_f34v7_wait_for_idle(f34, F34_ERASE_WAIT_MS); |
|
if (ret < 0) |
|
return ret; |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_erase_all(struct f34_data *f34) |
|
{ |
|
int ret; |
|
|
|
dev_info(&f34->fn->dev, "Erasing firmware...\n"); |
|
|
|
init_completion(&f34->v7.cmd_done); |
|
|
|
ret = rmi_f34v7_write_command(f34, v7_CMD_ERASE_UI_FIRMWARE); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_f34v7_wait_for_idle(f34, F34_ERASE_WAIT_MS); |
|
if (ret < 0) |
|
return ret; |
|
|
|
f34->v7.config_area = v7_UI_CONFIG_AREA; |
|
ret = rmi_f34v7_erase_config(f34); |
|
if (ret < 0) |
|
return ret; |
|
|
|
if (f34->v7.has_display_cfg) { |
|
f34->v7.config_area = v7_DP_CONFIG_AREA; |
|
ret = rmi_f34v7_erase_config(f34); |
|
if (ret < 0) |
|
return ret; |
|
} |
|
|
|
if (f34->v7.new_partition_table && f34->v7.has_guest_code) { |
|
ret = rmi_f34v7_erase_guest_code(f34); |
|
if (ret < 0) |
|
return ret; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_read_blocks(struct f34_data *f34, |
|
u16 block_cnt, u8 command) |
|
{ |
|
int ret; |
|
u8 base; |
|
__le16 length; |
|
u16 transfer; |
|
u16 max_transfer; |
|
u16 remaining = block_cnt; |
|
u16 block_number = 0; |
|
u16 index = 0; |
|
|
|
base = f34->fn->fd.data_base_addr; |
|
|
|
ret = rmi_f34v7_write_partition_id(f34, command); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_write_block(f34->fn->rmi_dev, |
|
base + f34->v7.off.block_number, |
|
&block_number, sizeof(block_number)); |
|
if (ret < 0) { |
|
dev_err(&f34->fn->dev, "%s: Failed to write block number\n", |
|
__func__); |
|
return ret; |
|
} |
|
|
|
max_transfer = min(f34->v7.payload_length, |
|
(u16)(PAGE_SIZE / f34->v7.block_size)); |
|
|
|
do { |
|
transfer = min(remaining, max_transfer); |
|
put_unaligned_le16(transfer, &length); |
|
|
|
ret = rmi_write_block(f34->fn->rmi_dev, |
|
base + f34->v7.off.transfer_length, |
|
&length, sizeof(length)); |
|
if (ret < 0) { |
|
dev_err(&f34->fn->dev, |
|
"%s: Write transfer length fail (%d remaining)\n", |
|
__func__, remaining); |
|
return ret; |
|
} |
|
|
|
init_completion(&f34->v7.cmd_done); |
|
|
|
ret = rmi_f34v7_write_command(f34, command); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_f34v7_wait_for_idle(f34, F34_ENABLE_WAIT_MS); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_read_block(f34->fn->rmi_dev, |
|
base + f34->v7.off.payload, |
|
&f34->v7.read_config_buf[index], |
|
transfer * f34->v7.block_size); |
|
if (ret < 0) { |
|
dev_err(&f34->fn->dev, |
|
"%s: Read block failed (%d blks remaining)\n", |
|
__func__, remaining); |
|
return ret; |
|
} |
|
|
|
index += (transfer * f34->v7.block_size); |
|
remaining -= transfer; |
|
} while (remaining); |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_write_f34v7_blocks(struct f34_data *f34, |
|
const void *block_ptr, u16 block_cnt, |
|
u8 command) |
|
{ |
|
int ret; |
|
u8 base; |
|
__le16 length; |
|
u16 transfer; |
|
u16 max_transfer; |
|
u16 remaining = block_cnt; |
|
u16 block_number = 0; |
|
|
|
base = f34->fn->fd.data_base_addr; |
|
|
|
ret = rmi_f34v7_write_partition_id(f34, command); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_write_block(f34->fn->rmi_dev, |
|
base + f34->v7.off.block_number, |
|
&block_number, sizeof(block_number)); |
|
if (ret < 0) { |
|
dev_err(&f34->fn->dev, "%s: Failed to write block number\n", |
|
__func__); |
|
return ret; |
|
} |
|
|
|
if (f34->v7.payload_length > (PAGE_SIZE / f34->v7.block_size)) |
|
max_transfer = PAGE_SIZE / f34->v7.block_size; |
|
else |
|
max_transfer = f34->v7.payload_length; |
|
|
|
do { |
|
transfer = min(remaining, max_transfer); |
|
put_unaligned_le16(transfer, &length); |
|
|
|
init_completion(&f34->v7.cmd_done); |
|
|
|
ret = rmi_write_block(f34->fn->rmi_dev, |
|
base + f34->v7.off.transfer_length, |
|
&length, sizeof(length)); |
|
if (ret < 0) { |
|
dev_err(&f34->fn->dev, |
|
"%s: Write transfer length fail (%d remaining)\n", |
|
__func__, remaining); |
|
return ret; |
|
} |
|
|
|
ret = rmi_f34v7_write_command(f34, command); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_write_block(f34->fn->rmi_dev, |
|
base + f34->v7.off.payload, |
|
block_ptr, transfer * f34->v7.block_size); |
|
if (ret < 0) { |
|
dev_err(&f34->fn->dev, |
|
"%s: Failed writing data (%d blks remaining)\n", |
|
__func__, remaining); |
|
return ret; |
|
} |
|
|
|
ret = rmi_f34v7_wait_for_idle(f34, F34_ENABLE_WAIT_MS); |
|
if (ret < 0) |
|
return ret; |
|
|
|
block_ptr += (transfer * f34->v7.block_size); |
|
remaining -= transfer; |
|
f34->update_progress += transfer; |
|
f34->update_status = (f34->update_progress * 100) / |
|
f34->update_size; |
|
} while (remaining); |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_write_config(struct f34_data *f34) |
|
{ |
|
return rmi_f34v7_write_f34v7_blocks(f34, f34->v7.config_data, |
|
f34->v7.config_block_count, |
|
v7_CMD_WRITE_CONFIG); |
|
} |
|
|
|
static int rmi_f34v7_write_ui_config(struct f34_data *f34) |
|
{ |
|
f34->v7.config_area = v7_UI_CONFIG_AREA; |
|
f34->v7.config_data = f34->v7.img.ui_config.data; |
|
f34->v7.config_size = f34->v7.img.ui_config.size; |
|
f34->v7.config_block_count = f34->v7.config_size / f34->v7.block_size; |
|
|
|
return rmi_f34v7_write_config(f34); |
|
} |
|
|
|
static int rmi_f34v7_write_dp_config(struct f34_data *f34) |
|
{ |
|
f34->v7.config_area = v7_DP_CONFIG_AREA; |
|
f34->v7.config_data = f34->v7.img.dp_config.data; |
|
f34->v7.config_size = f34->v7.img.dp_config.size; |
|
f34->v7.config_block_count = f34->v7.config_size / f34->v7.block_size; |
|
|
|
return rmi_f34v7_write_config(f34); |
|
} |
|
|
|
static int rmi_f34v7_write_guest_code(struct f34_data *f34) |
|
{ |
|
return rmi_f34v7_write_f34v7_blocks(f34, f34->v7.img.guest_code.data, |
|
f34->v7.img.guest_code.size / |
|
f34->v7.block_size, |
|
v7_CMD_WRITE_GUEST_CODE); |
|
} |
|
|
|
static int rmi_f34v7_write_flash_config(struct f34_data *f34) |
|
{ |
|
int ret; |
|
|
|
f34->v7.config_area = v7_FLASH_CONFIG_AREA; |
|
f34->v7.config_data = f34->v7.img.fl_config.data; |
|
f34->v7.config_size = f34->v7.img.fl_config.size; |
|
f34->v7.config_block_count = f34->v7.config_size / f34->v7.block_size; |
|
|
|
if (f34->v7.config_block_count != f34->v7.blkcount.fl_config) { |
|
dev_err(&f34->fn->dev, "%s: Flash config size mismatch\n", |
|
__func__); |
|
return -EINVAL; |
|
} |
|
|
|
init_completion(&f34->v7.cmd_done); |
|
|
|
ret = rmi_f34v7_write_command(f34, v7_CMD_ERASE_FLASH_CONFIG); |
|
if (ret < 0) |
|
return ret; |
|
|
|
rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
|
"%s: Erase flash config command written\n", __func__); |
|
|
|
ret = rmi_f34v7_wait_for_idle(f34, F34_WRITE_WAIT_MS); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_f34v7_write_config(f34); |
|
if (ret < 0) |
|
return ret; |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_write_partition_table(struct f34_data *f34) |
|
{ |
|
u16 block_count; |
|
int ret; |
|
|
|
block_count = f34->v7.blkcount.bl_config; |
|
f34->v7.config_area = v7_BL_CONFIG_AREA; |
|
f34->v7.config_size = f34->v7.block_size * block_count; |
|
devm_kfree(&f34->fn->dev, f34->v7.read_config_buf); |
|
f34->v7.read_config_buf = devm_kzalloc(&f34->fn->dev, |
|
f34->v7.config_size, GFP_KERNEL); |
|
if (!f34->v7.read_config_buf) { |
|
f34->v7.read_config_buf_size = 0; |
|
return -ENOMEM; |
|
} |
|
|
|
f34->v7.read_config_buf_size = f34->v7.config_size; |
|
|
|
ret = rmi_f34v7_read_blocks(f34, block_count, v7_CMD_READ_CONFIG); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_f34v7_erase_config(f34); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_f34v7_write_flash_config(f34); |
|
if (ret < 0) |
|
return ret; |
|
|
|
f34->v7.config_area = v7_BL_CONFIG_AREA; |
|
f34->v7.config_data = f34->v7.read_config_buf; |
|
f34->v7.config_size = f34->v7.img.bl_config.size; |
|
f34->v7.config_block_count = f34->v7.config_size / f34->v7.block_size; |
|
|
|
ret = rmi_f34v7_write_config(f34); |
|
if (ret < 0) |
|
return ret; |
|
|
|
return 0; |
|
} |
|
|
|
static int rmi_f34v7_write_firmware(struct f34_data *f34) |
|
{ |
|
u16 blk_count; |
|
|
|
blk_count = f34->v7.img.ui_firmware.size / f34->v7.block_size; |
|
|
|
return rmi_f34v7_write_f34v7_blocks(f34, f34->v7.img.ui_firmware.data, |
|
blk_count, v7_CMD_WRITE_FW); |
|
} |
|
|
|
static void rmi_f34v7_compare_partition_tables(struct f34_data *f34) |
|
{ |
|
if (f34->v7.phyaddr.ui_firmware != f34->v7.img.phyaddr.ui_firmware) { |
|
f34->v7.new_partition_table = true; |
|
return; |
|
} |
|
|
|
if (f34->v7.phyaddr.ui_config != f34->v7.img.phyaddr.ui_config) { |
|
f34->v7.new_partition_table = true; |
|
return; |
|
} |
|
|
|
if (f34->v7.has_display_cfg && |
|
f34->v7.phyaddr.dp_config != f34->v7.img.phyaddr.dp_config) { |
|
f34->v7.new_partition_table = true; |
|
return; |
|
} |
|
|
|
if (f34->v7.has_guest_code && |
|
f34->v7.phyaddr.guest_code != f34->v7.img.phyaddr.guest_code) { |
|
f34->v7.new_partition_table = true; |
|
return; |
|
} |
|
|
|
f34->v7.new_partition_table = false; |
|
} |
|
|
|
static void rmi_f34v7_parse_img_header_10_bl_container(struct f34_data *f34, |
|
const void *image) |
|
{ |
|
int i; |
|
int num_of_containers; |
|
unsigned int addr; |
|
unsigned int container_id; |
|
unsigned int length; |
|
const void *content; |
|
const struct container_descriptor *descriptor; |
|
|
|
num_of_containers = f34->v7.img.bootloader.size / 4 - 1; |
|
|
|
for (i = 1; i <= num_of_containers; i++) { |
|
addr = get_unaligned_le32(f34->v7.img.bootloader.data + i * 4); |
|
descriptor = image + addr; |
|
container_id = le16_to_cpu(descriptor->container_id); |
|
content = image + le32_to_cpu(descriptor->content_address); |
|
length = le32_to_cpu(descriptor->content_length); |
|
switch (container_id) { |
|
case BL_CONFIG_CONTAINER: |
|
case GLOBAL_PARAMETERS_CONTAINER: |
|
f34->v7.img.bl_config.data = content; |
|
f34->v7.img.bl_config.size = length; |
|
break; |
|
case BL_LOCKDOWN_INFO_CONTAINER: |
|
case DEVICE_CONFIG_CONTAINER: |
|
f34->v7.img.lockdown.data = content; |
|
f34->v7.img.lockdown.size = length; |
|
break; |
|
default: |
|
break; |
|
} |
|
} |
|
} |
|
|
|
static void rmi_f34v7_parse_image_header_10(struct f34_data *f34) |
|
{ |
|
unsigned int i; |
|
unsigned int num_of_containers; |
|
unsigned int addr; |
|
unsigned int offset; |
|
unsigned int container_id; |
|
unsigned int length; |
|
const void *image = f34->v7.image; |
|
const u8 *content; |
|
const struct container_descriptor *descriptor; |
|
const struct image_header_10 *header = image; |
|
|
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f34->v7.img.checksum = le32_to_cpu(header->checksum); |
|
|
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: f34->v7.img.checksum=%X\n", |
|
__func__, f34->v7.img.checksum); |
|
|
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/* address of top level container */ |
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offset = le32_to_cpu(header->top_level_container_start_addr); |
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descriptor = image + offset; |
|
|
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/* address of top level container content */ |
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offset = le32_to_cpu(descriptor->content_address); |
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num_of_containers = le32_to_cpu(descriptor->content_length) / 4; |
|
|
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for (i = 0; i < num_of_containers; i++) { |
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addr = get_unaligned_le32(image + offset); |
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offset += 4; |
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descriptor = image + addr; |
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container_id = le16_to_cpu(descriptor->container_id); |
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content = image + le32_to_cpu(descriptor->content_address); |
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length = le32_to_cpu(descriptor->content_length); |
|
|
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rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
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"%s: container_id=%d, length=%d\n", __func__, |
|
container_id, length); |
|
|
|
switch (container_id) { |
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case UI_CONTAINER: |
|
case CORE_CODE_CONTAINER: |
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f34->v7.img.ui_firmware.data = content; |
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f34->v7.img.ui_firmware.size = length; |
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break; |
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case UI_CONFIG_CONTAINER: |
|
case CORE_CONFIG_CONTAINER: |
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f34->v7.img.ui_config.data = content; |
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f34->v7.img.ui_config.size = length; |
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break; |
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case BL_CONTAINER: |
|
f34->v7.img.bl_version = *content; |
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f34->v7.img.bootloader.data = content; |
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f34->v7.img.bootloader.size = length; |
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rmi_f34v7_parse_img_header_10_bl_container(f34, image); |
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break; |
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case GUEST_CODE_CONTAINER: |
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f34->v7.img.contains_guest_code = true; |
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f34->v7.img.guest_code.data = content; |
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f34->v7.img.guest_code.size = length; |
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break; |
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case DISPLAY_CONFIG_CONTAINER: |
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f34->v7.img.contains_display_cfg = true; |
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f34->v7.img.dp_config.data = content; |
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f34->v7.img.dp_config.size = length; |
|
break; |
|
case FLASH_CONFIG_CONTAINER: |
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f34->v7.img.contains_flash_config = true; |
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f34->v7.img.fl_config.data = content; |
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f34->v7.img.fl_config.size = length; |
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break; |
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case GENERAL_INFORMATION_CONTAINER: |
|
f34->v7.img.contains_firmware_id = true; |
|
f34->v7.img.firmware_id = |
|
get_unaligned_le32(content + 4); |
|
break; |
|
default: |
|
break; |
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} |
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} |
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} |
|
|
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static int rmi_f34v7_parse_image_info(struct f34_data *f34) |
|
{ |
|
const struct image_header_10 *header = f34->v7.image; |
|
|
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memset(&f34->v7.img, 0x00, sizeof(f34->v7.img)); |
|
|
|
rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, |
|
"%s: header->major_header_version = %d\n", |
|
__func__, header->major_header_version); |
|
|
|
switch (header->major_header_version) { |
|
case IMAGE_HEADER_VERSION_10: |
|
rmi_f34v7_parse_image_header_10(f34); |
|
break; |
|
default: |
|
dev_err(&f34->fn->dev, "Unsupported image file format %02X\n", |
|
header->major_header_version); |
|
return -EINVAL; |
|
} |
|
|
|
if (!f34->v7.img.contains_flash_config) { |
|
dev_err(&f34->fn->dev, "%s: No flash config in fw image\n", |
|
__func__); |
|
return -EINVAL; |
|
} |
|
|
|
rmi_f34v7_parse_partition_table(f34, f34->v7.img.fl_config.data, |
|
&f34->v7.img.blkcount, &f34->v7.img.phyaddr); |
|
|
|
rmi_f34v7_compare_partition_tables(f34); |
|
|
|
return 0; |
|
} |
|
|
|
int rmi_f34v7_do_reflash(struct f34_data *f34, const struct firmware *fw) |
|
{ |
|
int ret; |
|
|
|
f34->fn->rmi_dev->driver->set_irq_bits(f34->fn->rmi_dev, |
|
f34->fn->irq_mask); |
|
|
|
rmi_f34v7_read_queries_bl_version(f34); |
|
|
|
f34->v7.image = fw->data; |
|
f34->update_progress = 0; |
|
f34->update_size = 0; |
|
|
|
ret = rmi_f34v7_parse_image_info(f34); |
|
if (ret < 0) |
|
goto fail; |
|
|
|
if (!f34->v7.new_partition_table) { |
|
ret = rmi_f34v7_check_ui_firmware_size(f34); |
|
if (ret < 0) |
|
goto fail; |
|
|
|
ret = rmi_f34v7_check_ui_config_size(f34); |
|
if (ret < 0) |
|
goto fail; |
|
|
|
if (f34->v7.has_display_cfg && |
|
f34->v7.img.contains_display_cfg) { |
|
ret = rmi_f34v7_check_dp_config_size(f34); |
|
if (ret < 0) |
|
goto fail; |
|
} |
|
|
|
if (f34->v7.has_guest_code && f34->v7.img.contains_guest_code) { |
|
ret = rmi_f34v7_check_guest_code_size(f34); |
|
if (ret < 0) |
|
goto fail; |
|
} |
|
} else { |
|
ret = rmi_f34v7_check_bl_config_size(f34); |
|
if (ret < 0) |
|
goto fail; |
|
} |
|
|
|
ret = rmi_f34v7_erase_all(f34); |
|
if (ret < 0) |
|
goto fail; |
|
|
|
if (f34->v7.new_partition_table) { |
|
ret = rmi_f34v7_write_partition_table(f34); |
|
if (ret < 0) |
|
goto fail; |
|
dev_info(&f34->fn->dev, "%s: Partition table programmed\n", |
|
__func__); |
|
} |
|
|
|
dev_info(&f34->fn->dev, "Writing firmware (%d bytes)...\n", |
|
f34->v7.img.ui_firmware.size); |
|
|
|
ret = rmi_f34v7_write_firmware(f34); |
|
if (ret < 0) |
|
goto fail; |
|
|
|
dev_info(&f34->fn->dev, "Writing config (%d bytes)...\n", |
|
f34->v7.img.ui_config.size); |
|
|
|
f34->v7.config_area = v7_UI_CONFIG_AREA; |
|
ret = rmi_f34v7_write_ui_config(f34); |
|
if (ret < 0) |
|
goto fail; |
|
|
|
if (f34->v7.has_display_cfg && f34->v7.img.contains_display_cfg) { |
|
dev_info(&f34->fn->dev, "Writing display config...\n"); |
|
|
|
ret = rmi_f34v7_write_dp_config(f34); |
|
if (ret < 0) |
|
goto fail; |
|
} |
|
|
|
if (f34->v7.new_partition_table) { |
|
if (f34->v7.has_guest_code && f34->v7.img.contains_guest_code) { |
|
dev_info(&f34->fn->dev, "Writing guest code...\n"); |
|
|
|
ret = rmi_f34v7_write_guest_code(f34); |
|
if (ret < 0) |
|
goto fail; |
|
} |
|
} |
|
|
|
fail: |
|
return ret; |
|
} |
|
|
|
static int rmi_f34v7_enter_flash_prog(struct f34_data *f34) |
|
{ |
|
int ret; |
|
|
|
f34->fn->rmi_dev->driver->set_irq_bits(f34->fn->rmi_dev, f34->fn->irq_mask); |
|
|
|
ret = rmi_f34v7_read_flash_status(f34); |
|
if (ret < 0) |
|
return ret; |
|
|
|
if (f34->v7.in_bl_mode) |
|
return 0; |
|
|
|
init_completion(&f34->v7.cmd_done); |
|
|
|
ret = rmi_f34v7_write_command(f34, v7_CMD_ENABLE_FLASH_PROG); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = rmi_f34v7_wait_for_idle(f34, F34_ENABLE_WAIT_MS); |
|
if (ret < 0) |
|
return ret; |
|
|
|
return 0; |
|
} |
|
|
|
int rmi_f34v7_start_reflash(struct f34_data *f34, const struct firmware *fw) |
|
{ |
|
int ret = 0; |
|
|
|
f34->fn->rmi_dev->driver->set_irq_bits(f34->fn->rmi_dev, f34->fn->irq_mask); |
|
|
|
f34->v7.config_area = v7_UI_CONFIG_AREA; |
|
f34->v7.image = fw->data; |
|
|
|
ret = rmi_f34v7_parse_image_info(f34); |
|
if (ret < 0) |
|
goto exit; |
|
|
|
if (!f34->v7.force_update && f34->v7.new_partition_table) { |
|
dev_err(&f34->fn->dev, "%s: Partition table mismatch\n", |
|
__func__); |
|
ret = -EINVAL; |
|
goto exit; |
|
} |
|
|
|
dev_info(&f34->fn->dev, "Firmware image OK\n"); |
|
|
|
ret = rmi_f34v7_read_flash_status(f34); |
|
if (ret < 0) |
|
goto exit; |
|
|
|
if (f34->v7.in_bl_mode) { |
|
dev_info(&f34->fn->dev, "%s: Device in bootloader mode\n", |
|
__func__); |
|
} |
|
|
|
rmi_f34v7_enter_flash_prog(f34); |
|
|
|
return 0; |
|
|
|
exit: |
|
return ret; |
|
} |
|
|
|
int rmi_f34v7_probe(struct f34_data *f34) |
|
{ |
|
int ret; |
|
|
|
/* Read bootloader version */ |
|
ret = rmi_read_block(f34->fn->rmi_dev, |
|
f34->fn->fd.query_base_addr + V7_BOOTLOADER_ID_OFFSET, |
|
f34->bootloader_id, |
|
sizeof(f34->bootloader_id)); |
|
if (ret < 0) { |
|
dev_err(&f34->fn->dev, "%s: Failed to read bootloader ID\n", |
|
__func__); |
|
return ret; |
|
} |
|
|
|
if (f34->bootloader_id[1] == '5') { |
|
f34->bl_version = 5; |
|
} else if (f34->bootloader_id[1] == '6') { |
|
f34->bl_version = 6; |
|
} else if (f34->bootloader_id[1] == 7) { |
|
f34->bl_version = 7; |
|
} else if (f34->bootloader_id[1] == 8) { |
|
f34->bl_version = 8; |
|
} else { |
|
dev_err(&f34->fn->dev, |
|
"%s: Unrecognized bootloader version: %d (%c) %d (%c)\n", |
|
__func__, |
|
f34->bootloader_id[0], f34->bootloader_id[0], |
|
f34->bootloader_id[1], f34->bootloader_id[1]); |
|
return -EINVAL; |
|
} |
|
|
|
memset(&f34->v7.blkcount, 0x00, sizeof(f34->v7.blkcount)); |
|
memset(&f34->v7.phyaddr, 0x00, sizeof(f34->v7.phyaddr)); |
|
|
|
init_completion(&f34->v7.cmd_done); |
|
|
|
ret = rmi_f34v7_read_queries(f34); |
|
if (ret < 0) |
|
return ret; |
|
|
|
f34->v7.force_update = true; |
|
return 0; |
|
}
|
|
|