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524 lines
13 KiB
524 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (C) 2015 Prevas A/S |
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*/ |
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#include <linux/device.h> |
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#include <linux/kernel.h> |
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#include <linux/slab.h> |
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#include <linux/sysfs.h> |
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#include <linux/spi/spi.h> |
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#include <linux/regulator/consumer.h> |
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#include <linux/err.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/iio/iio.h> |
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#include <linux/iio/buffer.h> |
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#include <linux/iio/trigger_consumer.h> |
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#include <linux/iio/triggered_buffer.h> |
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#include <linux/iio/sysfs.h> |
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#define ADS8688_CMD_REG(x) (x << 8) |
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#define ADS8688_CMD_REG_NOOP 0x00 |
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#define ADS8688_CMD_REG_RST 0x85 |
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#define ADS8688_CMD_REG_MAN_CH(chan) (0xC0 | (4 * chan)) |
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#define ADS8688_CMD_DONT_CARE_BITS 16 |
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#define ADS8688_PROG_REG(x) (x << 9) |
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#define ADS8688_PROG_REG_RANGE_CH(chan) (0x05 + chan) |
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#define ADS8688_PROG_WR_BIT BIT(8) |
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#define ADS8688_PROG_DONT_CARE_BITS 8 |
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#define ADS8688_REG_PLUSMINUS25VREF 0 |
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#define ADS8688_REG_PLUSMINUS125VREF 1 |
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#define ADS8688_REG_PLUSMINUS0625VREF 2 |
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#define ADS8688_REG_PLUS25VREF 5 |
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#define ADS8688_REG_PLUS125VREF 6 |
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#define ADS8688_VREF_MV 4096 |
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#define ADS8688_REALBITS 16 |
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#define ADS8688_MAX_CHANNELS 8 |
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/* |
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* enum ads8688_range - ADS8688 reference voltage range |
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* @ADS8688_PLUSMINUS25VREF: Device is configured for input range ±2.5 * VREF |
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* @ADS8688_PLUSMINUS125VREF: Device is configured for input range ±1.25 * VREF |
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* @ADS8688_PLUSMINUS0625VREF: Device is configured for input range ±0.625 * VREF |
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* @ADS8688_PLUS25VREF: Device is configured for input range 0 - 2.5 * VREF |
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* @ADS8688_PLUS125VREF: Device is configured for input range 0 - 1.25 * VREF |
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*/ |
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enum ads8688_range { |
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ADS8688_PLUSMINUS25VREF, |
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ADS8688_PLUSMINUS125VREF, |
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ADS8688_PLUSMINUS0625VREF, |
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ADS8688_PLUS25VREF, |
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ADS8688_PLUS125VREF, |
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}; |
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struct ads8688_chip_info { |
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const struct iio_chan_spec *channels; |
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unsigned int num_channels; |
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}; |
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struct ads8688_state { |
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struct mutex lock; |
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const struct ads8688_chip_info *chip_info; |
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struct spi_device *spi; |
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struct regulator *reg; |
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unsigned int vref_mv; |
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enum ads8688_range range[8]; |
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union { |
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__be32 d32; |
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u8 d8[4]; |
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} data[2] ____cacheline_aligned; |
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}; |
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enum ads8688_id { |
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ID_ADS8684, |
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ID_ADS8688, |
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}; |
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struct ads8688_ranges { |
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enum ads8688_range range; |
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unsigned int scale; |
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int offset; |
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u8 reg; |
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}; |
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static const struct ads8688_ranges ads8688_range_def[5] = { |
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{ |
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.range = ADS8688_PLUSMINUS25VREF, |
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.scale = 76295, |
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.offset = -(1 << (ADS8688_REALBITS - 1)), |
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.reg = ADS8688_REG_PLUSMINUS25VREF, |
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}, { |
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.range = ADS8688_PLUSMINUS125VREF, |
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.scale = 38148, |
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.offset = -(1 << (ADS8688_REALBITS - 1)), |
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.reg = ADS8688_REG_PLUSMINUS125VREF, |
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}, { |
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.range = ADS8688_PLUSMINUS0625VREF, |
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.scale = 19074, |
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.offset = -(1 << (ADS8688_REALBITS - 1)), |
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.reg = ADS8688_REG_PLUSMINUS0625VREF, |
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}, { |
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.range = ADS8688_PLUS25VREF, |
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.scale = 38148, |
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.offset = 0, |
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.reg = ADS8688_REG_PLUS25VREF, |
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}, { |
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.range = ADS8688_PLUS125VREF, |
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.scale = 19074, |
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.offset = 0, |
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.reg = ADS8688_REG_PLUS125VREF, |
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} |
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}; |
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static ssize_t ads8688_show_scales(struct device *dev, |
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struct device_attribute *attr, char *buf) |
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{ |
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struct ads8688_state *st = iio_priv(dev_to_iio_dev(dev)); |
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return sprintf(buf, "0.%09u 0.%09u 0.%09u\n", |
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ads8688_range_def[0].scale * st->vref_mv, |
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ads8688_range_def[1].scale * st->vref_mv, |
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ads8688_range_def[2].scale * st->vref_mv); |
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} |
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static ssize_t ads8688_show_offsets(struct device *dev, |
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struct device_attribute *attr, char *buf) |
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{ |
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return sprintf(buf, "%d %d\n", ads8688_range_def[0].offset, |
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ads8688_range_def[3].offset); |
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} |
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static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO, |
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ads8688_show_scales, NULL, 0); |
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static IIO_DEVICE_ATTR(in_voltage_offset_available, S_IRUGO, |
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ads8688_show_offsets, NULL, 0); |
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static struct attribute *ads8688_attributes[] = { |
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&iio_dev_attr_in_voltage_scale_available.dev_attr.attr, |
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&iio_dev_attr_in_voltage_offset_available.dev_attr.attr, |
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NULL, |
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}; |
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static const struct attribute_group ads8688_attribute_group = { |
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.attrs = ads8688_attributes, |
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}; |
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#define ADS8688_CHAN(index) \ |
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{ \ |
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.type = IIO_VOLTAGE, \ |
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.indexed = 1, \ |
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.channel = index, \ |
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \ |
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| BIT(IIO_CHAN_INFO_SCALE) \ |
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| BIT(IIO_CHAN_INFO_OFFSET), \ |
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.scan_index = index, \ |
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.scan_type = { \ |
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.sign = 'u', \ |
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.realbits = 16, \ |
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.storagebits = 16, \ |
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.endianness = IIO_BE, \ |
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}, \ |
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} |
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static const struct iio_chan_spec ads8684_channels[] = { |
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ADS8688_CHAN(0), |
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ADS8688_CHAN(1), |
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ADS8688_CHAN(2), |
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ADS8688_CHAN(3), |
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}; |
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static const struct iio_chan_spec ads8688_channels[] = { |
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ADS8688_CHAN(0), |
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ADS8688_CHAN(1), |
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ADS8688_CHAN(2), |
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ADS8688_CHAN(3), |
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ADS8688_CHAN(4), |
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ADS8688_CHAN(5), |
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ADS8688_CHAN(6), |
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ADS8688_CHAN(7), |
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}; |
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static int ads8688_prog_write(struct iio_dev *indio_dev, unsigned int addr, |
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unsigned int val) |
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{ |
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struct ads8688_state *st = iio_priv(indio_dev); |
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u32 tmp; |
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tmp = ADS8688_PROG_REG(addr) | ADS8688_PROG_WR_BIT | val; |
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tmp <<= ADS8688_PROG_DONT_CARE_BITS; |
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st->data[0].d32 = cpu_to_be32(tmp); |
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return spi_write(st->spi, &st->data[0].d8[1], 3); |
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} |
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static int ads8688_reset(struct iio_dev *indio_dev) |
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{ |
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struct ads8688_state *st = iio_priv(indio_dev); |
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u32 tmp; |
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tmp = ADS8688_CMD_REG(ADS8688_CMD_REG_RST); |
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tmp <<= ADS8688_CMD_DONT_CARE_BITS; |
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st->data[0].d32 = cpu_to_be32(tmp); |
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return spi_write(st->spi, &st->data[0].d8[0], 4); |
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} |
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static int ads8688_read(struct iio_dev *indio_dev, unsigned int chan) |
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{ |
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struct ads8688_state *st = iio_priv(indio_dev); |
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int ret; |
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u32 tmp; |
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struct spi_transfer t[] = { |
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{ |
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.tx_buf = &st->data[0].d8[0], |
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.len = 4, |
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.cs_change = 1, |
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}, { |
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.tx_buf = &st->data[1].d8[0], |
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.rx_buf = &st->data[1].d8[0], |
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.len = 4, |
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}, |
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}; |
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tmp = ADS8688_CMD_REG(ADS8688_CMD_REG_MAN_CH(chan)); |
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tmp <<= ADS8688_CMD_DONT_CARE_BITS; |
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st->data[0].d32 = cpu_to_be32(tmp); |
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tmp = ADS8688_CMD_REG(ADS8688_CMD_REG_NOOP); |
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tmp <<= ADS8688_CMD_DONT_CARE_BITS; |
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st->data[1].d32 = cpu_to_be32(tmp); |
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ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); |
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if (ret < 0) |
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return ret; |
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return be32_to_cpu(st->data[1].d32) & 0xffff; |
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} |
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static int ads8688_read_raw(struct iio_dev *indio_dev, |
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struct iio_chan_spec const *chan, |
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int *val, int *val2, long m) |
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{ |
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int ret, offset; |
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unsigned long scale_mv; |
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struct ads8688_state *st = iio_priv(indio_dev); |
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mutex_lock(&st->lock); |
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switch (m) { |
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case IIO_CHAN_INFO_RAW: |
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ret = ads8688_read(indio_dev, chan->channel); |
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mutex_unlock(&st->lock); |
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if (ret < 0) |
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return ret; |
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*val = ret; |
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return IIO_VAL_INT; |
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case IIO_CHAN_INFO_SCALE: |
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scale_mv = st->vref_mv; |
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scale_mv *= ads8688_range_def[st->range[chan->channel]].scale; |
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*val = 0; |
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*val2 = scale_mv; |
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mutex_unlock(&st->lock); |
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return IIO_VAL_INT_PLUS_NANO; |
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case IIO_CHAN_INFO_OFFSET: |
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offset = ads8688_range_def[st->range[chan->channel]].offset; |
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*val = offset; |
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mutex_unlock(&st->lock); |
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return IIO_VAL_INT; |
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} |
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mutex_unlock(&st->lock); |
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return -EINVAL; |
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} |
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static int ads8688_write_reg_range(struct iio_dev *indio_dev, |
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struct iio_chan_spec const *chan, |
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enum ads8688_range range) |
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{ |
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unsigned int tmp; |
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int ret; |
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tmp = ADS8688_PROG_REG_RANGE_CH(chan->channel); |
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ret = ads8688_prog_write(indio_dev, tmp, range); |
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return ret; |
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} |
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static int ads8688_write_raw(struct iio_dev *indio_dev, |
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struct iio_chan_spec const *chan, |
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int val, int val2, long mask) |
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{ |
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struct ads8688_state *st = iio_priv(indio_dev); |
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unsigned int scale = 0; |
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int ret = -EINVAL, i, offset = 0; |
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mutex_lock(&st->lock); |
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switch (mask) { |
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case IIO_CHAN_INFO_SCALE: |
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/* If the offset is 0 the ±2.5 * VREF mode is not available */ |
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offset = ads8688_range_def[st->range[chan->channel]].offset; |
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if (offset == 0 && val2 == ads8688_range_def[0].scale * st->vref_mv) { |
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mutex_unlock(&st->lock); |
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return -EINVAL; |
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} |
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/* Lookup new mode */ |
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for (i = 0; i < ARRAY_SIZE(ads8688_range_def); i++) |
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if (val2 == ads8688_range_def[i].scale * st->vref_mv && |
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offset == ads8688_range_def[i].offset) { |
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ret = ads8688_write_reg_range(indio_dev, chan, |
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ads8688_range_def[i].reg); |
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break; |
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} |
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break; |
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case IIO_CHAN_INFO_OFFSET: |
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/* |
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* There are only two available offsets: |
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* 0 and -(1 << (ADS8688_REALBITS - 1)) |
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*/ |
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if (!(ads8688_range_def[0].offset == val || |
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ads8688_range_def[3].offset == val)) { |
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mutex_unlock(&st->lock); |
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return -EINVAL; |
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} |
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/* |
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* If the device are in ±2.5 * VREF mode, it's not allowed to |
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* switch to a mode where the offset is 0 |
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*/ |
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if (val == 0 && |
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st->range[chan->channel] == ADS8688_PLUSMINUS25VREF) { |
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mutex_unlock(&st->lock); |
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return -EINVAL; |
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} |
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scale = ads8688_range_def[st->range[chan->channel]].scale; |
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/* Lookup new mode */ |
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for (i = 0; i < ARRAY_SIZE(ads8688_range_def); i++) |
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if (val == ads8688_range_def[i].offset && |
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scale == ads8688_range_def[i].scale) { |
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ret = ads8688_write_reg_range(indio_dev, chan, |
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ads8688_range_def[i].reg); |
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break; |
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} |
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break; |
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} |
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if (!ret) |
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st->range[chan->channel] = ads8688_range_def[i].range; |
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mutex_unlock(&st->lock); |
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return ret; |
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} |
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static int ads8688_write_raw_get_fmt(struct iio_dev *indio_dev, |
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struct iio_chan_spec const *chan, |
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long mask) |
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{ |
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switch (mask) { |
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case IIO_CHAN_INFO_SCALE: |
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return IIO_VAL_INT_PLUS_NANO; |
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case IIO_CHAN_INFO_OFFSET: |
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return IIO_VAL_INT; |
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} |
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return -EINVAL; |
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} |
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static const struct iio_info ads8688_info = { |
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.read_raw = &ads8688_read_raw, |
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.write_raw = &ads8688_write_raw, |
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.write_raw_get_fmt = &ads8688_write_raw_get_fmt, |
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.attrs = &ads8688_attribute_group, |
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}; |
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static irqreturn_t ads8688_trigger_handler(int irq, void *p) |
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{ |
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struct iio_poll_func *pf = p; |
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struct iio_dev *indio_dev = pf->indio_dev; |
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/* Ensure naturally aligned timestamp */ |
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u16 buffer[ADS8688_MAX_CHANNELS + sizeof(s64)/sizeof(u16)] __aligned(8); |
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int i, j = 0; |
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for (i = 0; i < indio_dev->masklength; i++) { |
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if (!test_bit(i, indio_dev->active_scan_mask)) |
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continue; |
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buffer[j] = ads8688_read(indio_dev, i); |
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j++; |
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} |
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iio_push_to_buffers_with_timestamp(indio_dev, buffer, |
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iio_get_time_ns(indio_dev)); |
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iio_trigger_notify_done(indio_dev->trig); |
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return IRQ_HANDLED; |
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} |
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static const struct ads8688_chip_info ads8688_chip_info_tbl[] = { |
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[ID_ADS8684] = { |
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.channels = ads8684_channels, |
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.num_channels = ARRAY_SIZE(ads8684_channels), |
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}, |
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[ID_ADS8688] = { |
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.channels = ads8688_channels, |
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.num_channels = ARRAY_SIZE(ads8688_channels), |
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}, |
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}; |
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static int ads8688_probe(struct spi_device *spi) |
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{ |
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struct ads8688_state *st; |
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struct iio_dev *indio_dev; |
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int ret; |
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); |
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if (indio_dev == NULL) |
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return -ENOMEM; |
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st = iio_priv(indio_dev); |
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st->reg = devm_regulator_get_optional(&spi->dev, "vref"); |
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if (!IS_ERR(st->reg)) { |
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ret = regulator_enable(st->reg); |
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if (ret) |
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return ret; |
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ret = regulator_get_voltage(st->reg); |
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if (ret < 0) |
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goto err_regulator_disable; |
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st->vref_mv = ret / 1000; |
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} else { |
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/* Use internal reference */ |
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st->vref_mv = ADS8688_VREF_MV; |
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} |
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st->chip_info = &ads8688_chip_info_tbl[spi_get_device_id(spi)->driver_data]; |
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spi->mode = SPI_MODE_1; |
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spi_set_drvdata(spi, indio_dev); |
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st->spi = spi; |
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indio_dev->name = spi_get_device_id(spi)->name; |
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indio_dev->modes = INDIO_DIRECT_MODE; |
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indio_dev->channels = st->chip_info->channels; |
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indio_dev->num_channels = st->chip_info->num_channels; |
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indio_dev->info = &ads8688_info; |
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ads8688_reset(indio_dev); |
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mutex_init(&st->lock); |
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ret = iio_triggered_buffer_setup(indio_dev, NULL, ads8688_trigger_handler, NULL); |
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if (ret < 0) { |
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dev_err(&spi->dev, "iio triggered buffer setup failed\n"); |
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goto err_regulator_disable; |
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} |
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ret = iio_device_register(indio_dev); |
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if (ret) |
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goto err_buffer_cleanup; |
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return 0; |
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err_buffer_cleanup: |
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iio_triggered_buffer_cleanup(indio_dev); |
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err_regulator_disable: |
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if (!IS_ERR(st->reg)) |
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regulator_disable(st->reg); |
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return ret; |
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} |
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static int ads8688_remove(struct spi_device *spi) |
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{ |
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struct iio_dev *indio_dev = spi_get_drvdata(spi); |
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struct ads8688_state *st = iio_priv(indio_dev); |
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iio_device_unregister(indio_dev); |
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iio_triggered_buffer_cleanup(indio_dev); |
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if (!IS_ERR(st->reg)) |
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regulator_disable(st->reg); |
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return 0; |
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} |
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static const struct spi_device_id ads8688_id[] = { |
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{"ads8684", ID_ADS8684}, |
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{"ads8688", ID_ADS8688}, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(spi, ads8688_id); |
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static const struct of_device_id ads8688_of_match[] = { |
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{ .compatible = "ti,ads8684" }, |
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{ .compatible = "ti,ads8688" }, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(of, ads8688_of_match); |
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static struct spi_driver ads8688_driver = { |
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.driver = { |
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.name = "ads8688", |
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}, |
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.probe = ads8688_probe, |
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.remove = ads8688_remove, |
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.id_table = ads8688_id, |
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}; |
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module_spi_driver(ads8688_driver); |
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MODULE_AUTHOR("Sean Nyekjaer <[email protected]>"); |
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MODULE_DESCRIPTION("Texas Instruments ADS8688 driver"); |
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MODULE_LICENSE("GPL v2");
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