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533 lines
14 KiB
533 lines
14 KiB
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) |
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// |
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// This file is provided under a dual BSD/GPLv2 license. When using or |
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// redistributing this file, you may do so under either license. |
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// |
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// Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved. |
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// |
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// Authors: Vijendar Mukunda <[email protected]> |
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// Ajit Kumar Pandey <[email protected]> |
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/* |
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* Hardware interface for generic AMD ACP processor |
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*/ |
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#include <linux/io.h> |
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#include <linux/module.h> |
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#include <linux/pci.h> |
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#include "../ops.h" |
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#include "acp.h" |
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#include "acp-dsp-offset.h" |
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static int smn_write(struct pci_dev *dev, u32 smn_addr, u32 data) |
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{ |
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pci_write_config_dword(dev, 0x60, smn_addr); |
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pci_write_config_dword(dev, 0x64, data); |
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return 0; |
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} |
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static int smn_read(struct pci_dev *dev, u32 smn_addr, u32 *data) |
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{ |
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pci_write_config_dword(dev, 0x60, smn_addr); |
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pci_read_config_dword(dev, 0x64, data); |
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return 0; |
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} |
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static void init_dma_descriptor(struct acp_dev_data *adata) |
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{ |
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struct snd_sof_dev *sdev = adata->dev; |
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unsigned int addr; |
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addr = ACP_SRAM_PTE_OFFSET + offsetof(struct scratch_reg_conf, dma_desc); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_DESC_BASE_ADDR, addr); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_DESC_MAX_NUM_DSCR, ACP_MAX_DESC_CNT); |
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} |
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static void configure_dma_descriptor(struct acp_dev_data *adata, unsigned short idx, |
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struct dma_descriptor *dscr_info) |
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{ |
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struct snd_sof_dev *sdev = adata->dev; |
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unsigned int offset; |
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offset = ACP_SCRATCH_REG_0 + offsetof(struct scratch_reg_conf, dma_desc) + |
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idx * sizeof(struct dma_descriptor); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, offset, dscr_info->src_addr); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, offset + 0x4, dscr_info->dest_addr); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, offset + 0x8, dscr_info->tx_cnt.u32_all); |
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} |
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static int config_dma_channel(struct acp_dev_data *adata, unsigned int ch, |
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unsigned int idx, unsigned int dscr_count) |
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{ |
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struct snd_sof_dev *sdev = adata->dev; |
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unsigned int val, status; |
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int ret; |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_CNTL_0 + ch * sizeof(u32), |
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ACP_DMA_CH_RST | ACP_DMA_CH_GRACEFUL_RST_EN); |
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ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_DMA_CH_RST_STS, val, |
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val & (1 << ch), ACP_REG_POLL_INTERVAL, |
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ACP_REG_POLL_TIMEOUT_US); |
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if (ret < 0) { |
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status = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_ERROR_STATUS); |
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val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_DMA_ERR_STS_0 + ch * sizeof(u32)); |
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dev_err(sdev->dev, "ACP_DMA_ERR_STS :0x%x ACP_ERROR_STATUS :0x%x\n", val, status); |
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return ret; |
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} |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, (ACP_DMA_CNTL_0 + ch * sizeof(u32)), 0); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_DSCR_CNT_0 + ch * sizeof(u32), dscr_count); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_DSCR_STRT_IDX_0 + ch * sizeof(u32), idx); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_PRIO_0 + ch * sizeof(u32), 0); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_CNTL_0 + ch * sizeof(u32), ACP_DMA_CH_RUN); |
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return ret; |
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} |
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static int acpbus_dma_start(struct acp_dev_data *adata, unsigned int ch, |
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unsigned int dscr_count, struct dma_descriptor *dscr_info) |
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{ |
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struct snd_sof_dev *sdev = adata->dev; |
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int ret; |
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u16 dscr; |
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if (!dscr_info || !dscr_count) |
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return -EINVAL; |
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for (dscr = 0; dscr < dscr_count; dscr++) |
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configure_dma_descriptor(adata, dscr, dscr_info++); |
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ret = config_dma_channel(adata, ch, 0, dscr_count); |
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if (ret < 0) |
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dev_err(sdev->dev, "config dma ch failed:%d\n", ret); |
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return ret; |
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} |
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int configure_and_run_dma(struct acp_dev_data *adata, unsigned int src_addr, |
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unsigned int dest_addr, int dsp_data_size) |
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{ |
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struct snd_sof_dev *sdev = adata->dev; |
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unsigned int desc_count, index; |
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int ret; |
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for (desc_count = 0; desc_count < ACP_MAX_DESC && dsp_data_size >= 0; |
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desc_count++, dsp_data_size -= ACP_PAGE_SIZE) { |
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adata->dscr_info[desc_count].src_addr = src_addr + desc_count * ACP_PAGE_SIZE; |
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adata->dscr_info[desc_count].dest_addr = dest_addr + desc_count * ACP_PAGE_SIZE; |
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adata->dscr_info[desc_count].tx_cnt.bits.count = ACP_PAGE_SIZE; |
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if (dsp_data_size < ACP_PAGE_SIZE) |
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adata->dscr_info[desc_count].tx_cnt.bits.count = dsp_data_size; |
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} |
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ret = acpbus_dma_start(adata, 0, desc_count, adata->dscr_info); |
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if (ret) |
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dev_err(sdev->dev, "acpbus_dma_start failed\n"); |
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/* Clear descriptor array */ |
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for (index = 0; index < desc_count; index++) |
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memset(&adata->dscr_info[index], 0x00, sizeof(struct dma_descriptor)); |
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return ret; |
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} |
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/* |
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* psp_mbox_ready- function to poll ready bit of psp mbox |
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* @adata: acp device data |
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* @ack: bool variable to check ready bit status or psp ack |
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*/ |
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static int psp_mbox_ready(struct acp_dev_data *adata, bool ack) |
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{ |
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struct snd_sof_dev *sdev = adata->dev; |
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int timeout; |
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u32 data; |
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for (timeout = ACP_PSP_TIMEOUT_COUNTER; timeout > 0; timeout--) { |
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msleep(20); |
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smn_read(adata->smn_dev, MP0_C2PMSG_114_REG, &data); |
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if (data & MBOX_READY_MASK) |
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return 0; |
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} |
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dev_err(sdev->dev, "PSP error status %x\n", data & MBOX_STATUS_MASK); |
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if (ack) |
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return -ETIMEDOUT; |
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return -EBUSY; |
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} |
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/* |
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* psp_send_cmd - function to send psp command over mbox |
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* @adata: acp device data |
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* @cmd: non zero integer value for command type |
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*/ |
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static int psp_send_cmd(struct acp_dev_data *adata, int cmd) |
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{ |
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struct snd_sof_dev *sdev = adata->dev; |
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int ret, timeout; |
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u32 data; |
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if (!cmd) |
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return -EINVAL; |
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/* Get a non-zero Doorbell value from PSP */ |
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for (timeout = ACP_PSP_TIMEOUT_COUNTER; timeout > 0; timeout--) { |
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msleep(MBOX_DELAY); |
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smn_read(adata->smn_dev, MP0_C2PMSG_73_REG, &data); |
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if (data) |
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break; |
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} |
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if (!timeout) { |
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dev_err(sdev->dev, "Failed to get Doorbell from MBOX %x\n", MP0_C2PMSG_73_REG); |
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return -EINVAL; |
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} |
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/* Check if PSP is ready for new command */ |
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ret = psp_mbox_ready(adata, 0); |
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if (ret) |
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return ret; |
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smn_write(adata->smn_dev, MP0_C2PMSG_114_REG, cmd); |
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/* Ring the Doorbell for PSP */ |
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smn_write(adata->smn_dev, MP0_C2PMSG_73_REG, data); |
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/* Check MBOX ready as PSP ack */ |
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ret = psp_mbox_ready(adata, 1); |
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return ret; |
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} |
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int configure_and_run_sha_dma(struct acp_dev_data *adata, void *image_addr, |
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unsigned int start_addr, unsigned int dest_addr, |
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unsigned int image_length) |
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{ |
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struct snd_sof_dev *sdev = adata->dev; |
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unsigned int tx_count, fw_qualifier, val; |
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int ret; |
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if (!image_addr) { |
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dev_err(sdev->dev, "SHA DMA image address is NULL\n"); |
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return -EINVAL; |
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} |
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val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SHA_DMA_CMD); |
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if (val & ACP_SHA_RUN) { |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_CMD, ACP_SHA_RESET); |
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ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_DMA_CMD_STS, |
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val, val & ACP_SHA_RESET, |
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ACP_REG_POLL_INTERVAL, |
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ACP_REG_POLL_TIMEOUT_US); |
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if (ret < 0) { |
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dev_err(sdev->dev, "SHA DMA Failed to Reset\n"); |
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return ret; |
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} |
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} |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_STRT_ADDR, start_addr); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_DESTINATION_ADDR, dest_addr); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_MSG_LENGTH, image_length); |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_CMD, ACP_SHA_RUN); |
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ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_TRANSFER_BYTE_CNT, |
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tx_count, tx_count == image_length, |
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ACP_REG_POLL_INTERVAL, ACP_DMA_COMPLETE_TIMEOUT_US); |
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if (ret < 0) { |
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dev_err(sdev->dev, "SHA DMA Failed to Transfer Length %x\n", tx_count); |
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return ret; |
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} |
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ret = psp_send_cmd(adata, MBOX_ACP_SHA_DMA_COMMAND); |
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if (ret) |
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return ret; |
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fw_qualifier = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SHA_DSP_FW_QUALIFIER); |
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if (!(fw_qualifier & DSP_FW_RUN_ENABLE)) { |
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dev_err(sdev->dev, "PSP validation failed\n"); |
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return -EINVAL; |
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} |
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return 0; |
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} |
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int acp_dma_status(struct acp_dev_data *adata, unsigned char ch) |
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{ |
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struct snd_sof_dev *sdev = adata->dev; |
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unsigned int val; |
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int ret = 0; |
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val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_DMA_CNTL_0 + ch * sizeof(u32)); |
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if (val & ACP_DMA_CH_RUN) { |
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ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_DMA_CH_STS, val, !val, |
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ACP_REG_POLL_INTERVAL, |
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ACP_DMA_COMPLETE_TIMEOUT_US); |
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if (ret < 0) |
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dev_err(sdev->dev, "DMA_CHANNEL %d status timeout\n", ch); |
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} |
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return ret; |
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} |
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void memcpy_from_scratch(struct snd_sof_dev *sdev, u32 offset, unsigned int *dst, size_t bytes) |
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{ |
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unsigned int reg_offset = offset + ACP_SCRATCH_REG_0; |
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int i, j; |
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for (i = 0, j = 0; i < bytes; i = i + 4, j++) |
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dst[j] = snd_sof_dsp_read(sdev, ACP_DSP_BAR, reg_offset + i); |
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} |
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void memcpy_to_scratch(struct snd_sof_dev *sdev, u32 offset, unsigned int *src, size_t bytes) |
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{ |
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unsigned int reg_offset = offset + ACP_SCRATCH_REG_0; |
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int i, j; |
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for (i = 0, j = 0; i < bytes; i = i + 4, j++) |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, reg_offset + i, src[j]); |
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} |
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static int acp_memory_init(struct snd_sof_dev *sdev) |
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{ |
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struct acp_dev_data *adata = sdev->pdata->hw_pdata; |
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snd_sof_dsp_update_bits(sdev, ACP_DSP_BAR, ACP_DSP_SW_INTR_CNTL, |
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ACP_DSP_INTR_EN_MASK, ACP_DSP_INTR_EN_MASK); |
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init_dma_descriptor(adata); |
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return 0; |
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} |
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static irqreturn_t acp_irq_thread(int irq, void *context) |
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{ |
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struct snd_sof_dev *sdev = context; |
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unsigned int val, count = ACP_HW_SEM_RETRY_COUNT; |
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val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_EXTERNAL_INTR_STAT); |
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if (val & ACP_SHA_STAT) { |
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/* Clear SHA interrupt raised by PSP */ |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_EXTERNAL_INTR_STAT, val); |
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return IRQ_HANDLED; |
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} |
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val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_DSP_SW_INTR_STAT); |
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if (val & ACP_DSP_TO_HOST_IRQ) { |
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while (snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_AXI2DAGB_SEM_0)) { |
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/* Wait until acquired HW Semaphore lock or timeout */ |
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count--; |
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if (!count) { |
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dev_err(sdev->dev, "%s: Failed to acquire HW lock\n", __func__); |
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return IRQ_NONE; |
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} |
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} |
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sof_ops(sdev)->irq_thread(irq, sdev); |
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val |= ACP_DSP_TO_HOST_IRQ; |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DSP_SW_INTR_STAT, val); |
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/* Unlock or Release HW Semaphore */ |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_AXI2DAGB_SEM_0, 0x0); |
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return IRQ_HANDLED; |
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} |
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return IRQ_NONE; |
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}; |
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static irqreturn_t acp_irq_handler(int irq, void *dev_id) |
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{ |
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struct snd_sof_dev *sdev = dev_id; |
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unsigned int val; |
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val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_DSP_SW_INTR_STAT); |
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if (val) |
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return IRQ_WAKE_THREAD; |
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return IRQ_NONE; |
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} |
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static int acp_power_on(struct snd_sof_dev *sdev) |
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{ |
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unsigned int val; |
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int ret; |
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val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_PGFSM_STATUS); |
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if (val == ACP_POWERED_ON) |
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return 0; |
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if (val & ACP_PGFSM_STATUS_MASK) |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_PGFSM_CONTROL, |
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ACP_PGFSM_CNTL_POWER_ON_MASK); |
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ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_PGFSM_STATUS, val, !val, |
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ACP_REG_POLL_INTERVAL, ACP_REG_POLL_TIMEOUT_US); |
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if (ret < 0) |
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dev_err(sdev->dev, "timeout in ACP_PGFSM_STATUS read\n"); |
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return ret; |
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} |
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static int acp_reset(struct snd_sof_dev *sdev) |
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{ |
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unsigned int val; |
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int ret; |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, ACP_ASSERT_RESET); |
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ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, val, |
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val & ACP_SOFT_RESET_DONE_MASK, |
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ACP_REG_POLL_INTERVAL, ACP_REG_POLL_TIMEOUT_US); |
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if (ret < 0) { |
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dev_err(sdev->dev, "timeout asserting reset\n"); |
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return ret; |
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} |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, ACP_RELEASE_RESET); |
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ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, val, !val, |
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ACP_REG_POLL_INTERVAL, ACP_REG_POLL_TIMEOUT_US); |
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if (ret < 0) |
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dev_err(sdev->dev, "timeout in releasing reset\n"); |
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return ret; |
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} |
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static int acp_init(struct snd_sof_dev *sdev) |
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{ |
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int ret; |
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/* power on */ |
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ret = acp_power_on(sdev); |
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if (ret) { |
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dev_err(sdev->dev, "ACP power on failed\n"); |
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return ret; |
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} |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CONTROL, 0x01); |
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/* Reset */ |
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return acp_reset(sdev); |
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} |
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int amd_sof_acp_suspend(struct snd_sof_dev *sdev, u32 target_state) |
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{ |
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int ret; |
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ret = acp_reset(sdev); |
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if (ret) { |
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dev_err(sdev->dev, "ACP Reset failed\n"); |
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return ret; |
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} |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CONTROL, 0x00); |
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return 0; |
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} |
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EXPORT_SYMBOL_NS(amd_sof_acp_suspend, SND_SOC_SOF_AMD_COMMON); |
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int amd_sof_acp_resume(struct snd_sof_dev *sdev) |
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{ |
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int ret; |
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ret = acp_init(sdev); |
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if (ret) { |
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dev_err(sdev->dev, "ACP Init failed\n"); |
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return ret; |
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} |
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snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CLKMUX_SEL, 0x03); |
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ret = acp_memory_init(sdev); |
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return ret; |
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} |
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EXPORT_SYMBOL_NS(amd_sof_acp_resume, SND_SOC_SOF_AMD_COMMON); |
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int amd_sof_acp_probe(struct snd_sof_dev *sdev) |
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{ |
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struct pci_dev *pci = to_pci_dev(sdev->dev); |
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struct acp_dev_data *adata; |
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const struct sof_amd_acp_desc *chip; |
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unsigned int addr; |
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int ret; |
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adata = devm_kzalloc(sdev->dev, sizeof(struct acp_dev_data), |
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GFP_KERNEL); |
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if (!adata) |
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return -ENOMEM; |
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adata->dev = sdev; |
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addr = pci_resource_start(pci, ACP_DSP_BAR); |
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sdev->bar[ACP_DSP_BAR] = devm_ioremap(sdev->dev, addr, pci_resource_len(pci, ACP_DSP_BAR)); |
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if (!sdev->bar[ACP_DSP_BAR]) { |
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dev_err(sdev->dev, "ioremap error\n"); |
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return -ENXIO; |
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} |
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pci_set_master(pci); |
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sdev->pdata->hw_pdata = adata; |
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chip = get_chip_info(sdev->pdata); |
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if (!chip) { |
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dev_err(sdev->dev, "no such device supported, chip id:%x\n", pci->device); |
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return -EIO; |
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} |
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adata->smn_dev = pci_get_device(PCI_VENDOR_ID_AMD, chip->host_bridge_id, NULL); |
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if (!adata->smn_dev) { |
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dev_err(sdev->dev, "Failed to get host bridge device\n"); |
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return -ENODEV; |
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} |
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sdev->ipc_irq = pci->irq; |
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ret = request_threaded_irq(sdev->ipc_irq, acp_irq_handler, acp_irq_thread, |
|
IRQF_SHARED, "AudioDSP", sdev); |
|
if (ret < 0) { |
|
dev_err(sdev->dev, "failed to register IRQ %d\n", |
|
sdev->ipc_irq); |
|
pci_dev_put(adata->smn_dev); |
|
return ret; |
|
} |
|
|
|
ret = acp_init(sdev); |
|
if (ret < 0) { |
|
free_irq(sdev->ipc_irq, sdev); |
|
pci_dev_put(adata->smn_dev); |
|
return ret; |
|
} |
|
|
|
acp_memory_init(sdev); |
|
|
|
acp_dsp_stream_init(sdev); |
|
|
|
return 0; |
|
} |
|
EXPORT_SYMBOL_NS(amd_sof_acp_probe, SND_SOC_SOF_AMD_COMMON); |
|
|
|
int amd_sof_acp_remove(struct snd_sof_dev *sdev) |
|
{ |
|
struct acp_dev_data *adata = sdev->pdata->hw_pdata; |
|
|
|
if (adata->smn_dev) |
|
pci_dev_put(adata->smn_dev); |
|
|
|
if (sdev->ipc_irq) |
|
free_irq(sdev->ipc_irq, sdev); |
|
|
|
return acp_reset(sdev); |
|
} |
|
EXPORT_SYMBOL_NS(amd_sof_acp_remove, SND_SOC_SOF_AMD_COMMON); |
|
|
|
MODULE_DESCRIPTION("AMD ACP sof driver"); |
|
MODULE_LICENSE("Dual BSD/GPL");
|
|
|