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930 lines
26 KiB
930 lines
26 KiB
/* |
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* linux/drivers/video/vt8623fb.c - fbdev driver for |
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* integrated graphic core in VIA VT8623 [CLE266] chipset |
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* |
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* Copyright (c) 2006-2007 Ondrej Zajicek <[email protected]> |
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* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file COPYING in the main directory of this archive for |
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* more details. |
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* |
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* Code is based on s3fb, some parts are from David Boucher's viafb |
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* (http://davesdomain.org.uk/viafb/) |
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*/ |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/errno.h> |
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#include <linux/string.h> |
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#include <linux/mm.h> |
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#include <linux/tty.h> |
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#include <linux/delay.h> |
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#include <linux/fb.h> |
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#include <linux/svga.h> |
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#include <linux/init.h> |
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#include <linux/pci.h> |
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#include <linux/console.h> /* Why should fb driver call console functions? because console_lock() */ |
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#include <video/vga.h> |
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struct vt8623fb_info { |
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char __iomem *mmio_base; |
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int wc_cookie; |
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struct vgastate state; |
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struct mutex open_lock; |
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unsigned int ref_count; |
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u32 pseudo_palette[16]; |
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}; |
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/* ------------------------------------------------------------------------- */ |
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|
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static const struct svga_fb_format vt8623fb_formats[] = { |
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{ 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, |
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FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP8, FB_VISUAL_PSEUDOCOLOR, 16, 16}, |
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{ 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, |
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FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 16, 16}, |
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{ 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1, |
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FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 16, 16}, |
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{ 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, |
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FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 8}, |
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/* {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, |
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FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, */ |
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{16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0, |
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FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, |
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{32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, |
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FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 2}, |
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SVGA_FORMAT_END |
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}; |
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static const struct svga_pll vt8623_pll = {2, 127, 2, 7, 0, 3, |
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60000, 300000, 14318}; |
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|
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/* CRT timing register sets */ |
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static const struct vga_regset vt8623_h_total_regs[] = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_h_display_regs[] = {{0x01, 0, 7}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_h_sync_start_regs[] = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END}; |
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static const struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END}; |
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static const struct svga_timing_regs vt8623_timing_regs = { |
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vt8623_h_total_regs, vt8623_h_display_regs, vt8623_h_blank_start_regs, |
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vt8623_h_blank_end_regs, vt8623_h_sync_start_regs, vt8623_h_sync_end_regs, |
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vt8623_v_total_regs, vt8623_v_display_regs, vt8623_v_blank_start_regs, |
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vt8623_v_blank_end_regs, vt8623_v_sync_start_regs, vt8623_v_sync_end_regs, |
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}; |
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/* ------------------------------------------------------------------------- */ |
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/* Module parameters */ |
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static char *mode_option = "640x480-8@60"; |
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static int mtrr = 1; |
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MODULE_AUTHOR("(c) 2006 Ondrej Zajicek <[email protected]>"); |
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MODULE_LICENSE("GPL"); |
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MODULE_DESCRIPTION("fbdev driver for integrated graphics core in VIA VT8623 [CLE266]"); |
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module_param(mode_option, charp, 0644); |
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MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)"); |
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module_param_named(mode, mode_option, charp, 0); |
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MODULE_PARM_DESC(mode, "Default video mode e.g. '648x480-8@60' (deprecated)"); |
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module_param(mtrr, int, 0444); |
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MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)"); |
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/* ------------------------------------------------------------------------- */ |
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static void vt8623fb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) |
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{ |
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struct vt8623fb_info *par = info->par; |
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svga_tilecursor(par->state.vgabase, info, cursor); |
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} |
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static struct fb_tile_ops vt8623fb_tile_ops = { |
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.fb_settile = svga_settile, |
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.fb_tilecopy = svga_tilecopy, |
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.fb_tilefill = svga_tilefill, |
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.fb_tileblit = svga_tileblit, |
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.fb_tilecursor = vt8623fb_tilecursor, |
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.fb_get_tilemax = svga_get_tilemax, |
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}; |
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/* ------------------------------------------------------------------------- */ |
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/* image data is MSB-first, fb structure is MSB-first too */ |
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static inline u32 expand_color(u32 c) |
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{ |
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return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF; |
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} |
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/* vt8623fb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */ |
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static void vt8623fb_iplan_imageblit(struct fb_info *info, const struct fb_image *image) |
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{ |
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u32 fg = expand_color(image->fg_color); |
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u32 bg = expand_color(image->bg_color); |
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const u8 *src1, *src; |
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u8 __iomem *dst1; |
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u32 __iomem *dst; |
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u32 val; |
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int x, y; |
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src1 = image->data; |
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dst1 = info->screen_base + (image->dy * info->fix.line_length) |
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+ ((image->dx / 8) * 4); |
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for (y = 0; y < image->height; y++) { |
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src = src1; |
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dst = (u32 __iomem *) dst1; |
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for (x = 0; x < image->width; x += 8) { |
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val = *(src++) * 0x01010101; |
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val = (val & fg) | (~val & bg); |
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fb_writel(val, dst++); |
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} |
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src1 += image->width / 8; |
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dst1 += info->fix.line_length; |
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} |
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} |
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/* vt8623fb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */ |
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static void vt8623fb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect) |
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{ |
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u32 fg = expand_color(rect->color); |
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u8 __iomem *dst1; |
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u32 __iomem *dst; |
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int x, y; |
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dst1 = info->screen_base + (rect->dy * info->fix.line_length) |
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+ ((rect->dx / 8) * 4); |
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for (y = 0; y < rect->height; y++) { |
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dst = (u32 __iomem *) dst1; |
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for (x = 0; x < rect->width; x += 8) { |
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fb_writel(fg, dst++); |
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} |
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dst1 += info->fix.line_length; |
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} |
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} |
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/* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */ |
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static inline u32 expand_pixel(u32 c) |
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{ |
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return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) | |
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((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF; |
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} |
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/* vt8623fb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */ |
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static void vt8623fb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image) |
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{ |
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u32 fg = image->fg_color * 0x11111111; |
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u32 bg = image->bg_color * 0x11111111; |
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const u8 *src1, *src; |
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u8 __iomem *dst1; |
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u32 __iomem *dst; |
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u32 val; |
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int x, y; |
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src1 = image->data; |
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dst1 = info->screen_base + (image->dy * info->fix.line_length) |
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+ ((image->dx / 8) * 4); |
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for (y = 0; y < image->height; y++) { |
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src = src1; |
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dst = (u32 __iomem *) dst1; |
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for (x = 0; x < image->width; x += 8) { |
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val = expand_pixel(*(src++)); |
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val = (val & fg) | (~val & bg); |
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fb_writel(val, dst++); |
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} |
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src1 += image->width / 8; |
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dst1 += info->fix.line_length; |
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} |
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} |
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static void vt8623fb_imageblit(struct fb_info *info, const struct fb_image *image) |
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{ |
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if ((info->var.bits_per_pixel == 4) && (image->depth == 1) |
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&& ((image->width % 8) == 0) && ((image->dx % 8) == 0)) { |
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if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES) |
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vt8623fb_iplan_imageblit(info, image); |
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else |
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vt8623fb_cfb4_imageblit(info, image); |
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} else |
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cfb_imageblit(info, image); |
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} |
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static void vt8623fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) |
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{ |
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if ((info->var.bits_per_pixel == 4) |
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&& ((rect->width % 8) == 0) && ((rect->dx % 8) == 0) |
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&& (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)) |
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vt8623fb_iplan_fillrect(info, rect); |
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else |
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cfb_fillrect(info, rect); |
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} |
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/* ------------------------------------------------------------------------- */ |
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static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) |
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{ |
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struct vt8623fb_info *par = info->par; |
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u16 m, n, r; |
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u8 regval; |
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int rv; |
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rv = svga_compute_pll(&vt8623_pll, 1000000000 / pixclock, &m, &n, &r, info->node); |
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if (rv < 0) { |
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fb_err(info, "cannot set requested pixclock, keeping old value\n"); |
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return; |
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} |
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/* Set VGA misc register */ |
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regval = vga_r(par->state.vgabase, VGA_MIS_R); |
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vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); |
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/* Set clock registers */ |
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vga_wseq(par->state.vgabase, 0x46, (n | (r << 6))); |
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vga_wseq(par->state.vgabase, 0x47, m); |
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udelay(1000); |
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/* PLL reset */ |
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svga_wseq_mask(par->state.vgabase, 0x40, 0x02, 0x02); |
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svga_wseq_mask(par->state.vgabase, 0x40, 0x00, 0x02); |
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} |
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static int vt8623fb_open(struct fb_info *info, int user) |
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{ |
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struct vt8623fb_info *par = info->par; |
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mutex_lock(&(par->open_lock)); |
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if (par->ref_count == 0) { |
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void __iomem *vgabase = par->state.vgabase; |
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memset(&(par->state), 0, sizeof(struct vgastate)); |
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par->state.vgabase = vgabase; |
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par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP; |
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par->state.num_crtc = 0xA2; |
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par->state.num_seq = 0x50; |
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save_vga(&(par->state)); |
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} |
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par->ref_count++; |
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mutex_unlock(&(par->open_lock)); |
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return 0; |
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} |
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static int vt8623fb_release(struct fb_info *info, int user) |
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{ |
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struct vt8623fb_info *par = info->par; |
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mutex_lock(&(par->open_lock)); |
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if (par->ref_count == 0) { |
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mutex_unlock(&(par->open_lock)); |
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return -EINVAL; |
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} |
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if (par->ref_count == 1) |
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restore_vga(&(par->state)); |
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par->ref_count--; |
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mutex_unlock(&(par->open_lock)); |
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return 0; |
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} |
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static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
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{ |
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int rv, mem, step; |
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/* Find appropriate format */ |
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rv = svga_match_format (vt8623fb_formats, var, NULL); |
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if (rv < 0) |
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{ |
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fb_err(info, "unsupported mode requested\n"); |
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return rv; |
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} |
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/* Do not allow to have real resoulution larger than virtual */ |
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if (var->xres > var->xres_virtual) |
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var->xres_virtual = var->xres; |
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if (var->yres > var->yres_virtual) |
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var->yres_virtual = var->yres; |
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/* Round up xres_virtual to have proper alignment of lines */ |
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step = vt8623fb_formats[rv].xresstep - 1; |
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var->xres_virtual = (var->xres_virtual+step) & ~step; |
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/* Check whether have enough memory */ |
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mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; |
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if (mem > info->screen_size) |
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{ |
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fb_err(info, "not enough framebuffer memory (%d kB requested, %d kB available)\n", |
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mem >> 10, (unsigned int) (info->screen_size >> 10)); |
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return -EINVAL; |
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} |
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/* Text mode is limited to 256 kB of memory */ |
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if ((var->bits_per_pixel == 0) && (mem > (256*1024))) |
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{ |
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fb_err(info, "text framebuffer size too large (%d kB requested, 256 kB possible)\n", |
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mem >> 10); |
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return -EINVAL; |
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} |
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rv = svga_check_timings (&vt8623_timing_regs, var, info->node); |
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if (rv < 0) |
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{ |
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fb_err(info, "invalid timings requested\n"); |
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return rv; |
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} |
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/* Interlaced mode not supported */ |
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if (var->vmode & FB_VMODE_INTERLACED) |
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return -EINVAL; |
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return 0; |
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} |
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static int vt8623fb_set_par(struct fb_info *info) |
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{ |
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u32 mode, offset_value, fetch_value, screen_size; |
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struct vt8623fb_info *par = info->par; |
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u32 bpp = info->var.bits_per_pixel; |
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if (bpp != 0) { |
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info->fix.ypanstep = 1; |
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info->fix.line_length = (info->var.xres_virtual * bpp) / 8; |
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info->flags &= ~FBINFO_MISC_TILEBLITTING; |
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info->tileops = NULL; |
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/* in 4bpp supports 8p wide tiles only, any tiles otherwise */ |
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info->pixmap.blit_x = (bpp == 4) ? (1 << (8 - 1)) : (~(u32)0); |
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info->pixmap.blit_y = ~(u32)0; |
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offset_value = (info->var.xres_virtual * bpp) / 64; |
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fetch_value = ((info->var.xres * bpp) / 128) + 4; |
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if (bpp == 4) |
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fetch_value = (info->var.xres / 8) + 8; /* + 0 is OK */ |
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screen_size = info->var.yres_virtual * info->fix.line_length; |
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} else { |
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info->fix.ypanstep = 16; |
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info->fix.line_length = 0; |
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info->flags |= FBINFO_MISC_TILEBLITTING; |
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info->tileops = &vt8623fb_tile_ops; |
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/* supports 8x16 tiles only */ |
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info->pixmap.blit_x = 1 << (8 - 1); |
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info->pixmap.blit_y = 1 << (16 - 1); |
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offset_value = info->var.xres_virtual / 16; |
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fetch_value = (info->var.xres / 8) + 8; |
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screen_size = (info->var.xres_virtual * info->var.yres_virtual) / 64; |
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} |
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info->var.xoffset = 0; |
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info->var.yoffset = 0; |
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info->var.activate = FB_ACTIVATE_NOW; |
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/* Unlock registers */ |
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svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01); |
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svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); |
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svga_wcrt_mask(par->state.vgabase, 0x47, 0x00, 0x01); |
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/* Device, screen and sync off */ |
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svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
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svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); |
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svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); |
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/* Set default values */ |
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svga_set_default_gfx_regs(par->state.vgabase); |
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svga_set_default_atc_regs(par->state.vgabase); |
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svga_set_default_seq_regs(par->state.vgabase); |
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svga_set_default_crt_regs(par->state.vgabase); |
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svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF); |
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svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, 0); |
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svga_wcrt_multi(par->state.vgabase, vt8623_offset_regs, offset_value); |
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svga_wseq_multi(par->state.vgabase, vt8623_fetch_count_regs, fetch_value); |
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|
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/* Clear H/V Skew */ |
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svga_wcrt_mask(par->state.vgabase, 0x03, 0x00, 0x60); |
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svga_wcrt_mask(par->state.vgabase, 0x05, 0x00, 0x60); |
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|
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if (info->var.vmode & FB_VMODE_DOUBLE) |
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svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80); |
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else |
|
svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80); |
|
|
|
svga_wseq_mask(par->state.vgabase, 0x1E, 0xF0, 0xF0); // DI/DVP bus |
|
svga_wseq_mask(par->state.vgabase, 0x2A, 0x0F, 0x0F); // DI/DVP bus |
|
svga_wseq_mask(par->state.vgabase, 0x16, 0x08, 0xBF); // FIFO read threshold |
|
vga_wseq(par->state.vgabase, 0x17, 0x1F); // FIFO depth |
|
vga_wseq(par->state.vgabase, 0x18, 0x4E); |
|
svga_wseq_mask(par->state.vgabase, 0x1A, 0x08, 0x08); // enable MMIO ? |
|
|
|
vga_wcrt(par->state.vgabase, 0x32, 0x00); |
|
vga_wcrt(par->state.vgabase, 0x34, 0x00); |
|
vga_wcrt(par->state.vgabase, 0x6A, 0x80); |
|
vga_wcrt(par->state.vgabase, 0x6A, 0xC0); |
|
|
|
vga_wgfx(par->state.vgabase, 0x20, 0x00); |
|
vga_wgfx(par->state.vgabase, 0x21, 0x00); |
|
vga_wgfx(par->state.vgabase, 0x22, 0x00); |
|
|
|
/* Set SR15 according to number of bits per pixel */ |
|
mode = svga_match_format(vt8623fb_formats, &(info->var), &(info->fix)); |
|
switch (mode) { |
|
case 0: |
|
fb_dbg(info, "text mode\n"); |
|
svga_set_textmode_vga_regs(par->state.vgabase); |
|
svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); |
|
svga_wcrt_mask(par->state.vgabase, 0x11, 0x60, 0x70); |
|
break; |
|
case 1: |
|
fb_dbg(info, "4 bit pseudocolor\n"); |
|
vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); |
|
svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE); |
|
svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); |
|
break; |
|
case 2: |
|
fb_dbg(info, "4 bit pseudocolor, planar\n"); |
|
svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); |
|
svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); |
|
break; |
|
case 3: |
|
fb_dbg(info, "8 bit pseudocolor\n"); |
|
svga_wseq_mask(par->state.vgabase, 0x15, 0x22, 0xFE); |
|
break; |
|
case 4: |
|
fb_dbg(info, "5/6/5 truecolor\n"); |
|
svga_wseq_mask(par->state.vgabase, 0x15, 0xB6, 0xFE); |
|
break; |
|
case 5: |
|
fb_dbg(info, "8/8/8 truecolor\n"); |
|
svga_wseq_mask(par->state.vgabase, 0x15, 0xAE, 0xFE); |
|
break; |
|
default: |
|
printk(KERN_ERR "vt8623fb: unsupported mode - bug\n"); |
|
return (-EINVAL); |
|
} |
|
|
|
vt8623_set_pixclock(info, info->var.pixclock); |
|
svga_set_timings(par->state.vgabase, &vt8623_timing_regs, &(info->var), 1, 1, |
|
(info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 1, |
|
1, info->node); |
|
|
|
memset_io(info->screen_base, 0x00, screen_size); |
|
|
|
/* Device and screen back on */ |
|
svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); |
|
svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); |
|
svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); |
|
|
|
return 0; |
|
} |
|
|
|
|
|
static int vt8623fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
|
u_int transp, struct fb_info *fb) |
|
{ |
|
switch (fb->var.bits_per_pixel) { |
|
case 0: |
|
case 4: |
|
if (regno >= 16) |
|
return -EINVAL; |
|
|
|
outb(0x0F, VGA_PEL_MSK); |
|
outb(regno, VGA_PEL_IW); |
|
outb(red >> 10, VGA_PEL_D); |
|
outb(green >> 10, VGA_PEL_D); |
|
outb(blue >> 10, VGA_PEL_D); |
|
break; |
|
case 8: |
|
if (regno >= 256) |
|
return -EINVAL; |
|
|
|
outb(0xFF, VGA_PEL_MSK); |
|
outb(regno, VGA_PEL_IW); |
|
outb(red >> 10, VGA_PEL_D); |
|
outb(green >> 10, VGA_PEL_D); |
|
outb(blue >> 10, VGA_PEL_D); |
|
break; |
|
case 16: |
|
if (regno >= 16) |
|
return 0; |
|
|
|
if (fb->var.green.length == 5) |
|
((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) | |
|
((green & 0xF800) >> 6) | ((blue & 0xF800) >> 11); |
|
else if (fb->var.green.length == 6) |
|
((u32*)fb->pseudo_palette)[regno] = (red & 0xF800) | |
|
((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11); |
|
else |
|
return -EINVAL; |
|
break; |
|
case 24: |
|
case 32: |
|
if (regno >= 16) |
|
return 0; |
|
|
|
/* ((transp & 0xFF00) << 16) */ |
|
((u32*)fb->pseudo_palette)[regno] = ((red & 0xFF00) << 8) | |
|
(green & 0xFF00) | ((blue & 0xFF00) >> 8); |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
|
|
static int vt8623fb_blank(int blank_mode, struct fb_info *info) |
|
{ |
|
struct vt8623fb_info *par = info->par; |
|
|
|
switch (blank_mode) { |
|
case FB_BLANK_UNBLANK: |
|
fb_dbg(info, "unblank\n"); |
|
svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); |
|
svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); |
|
break; |
|
case FB_BLANK_NORMAL: |
|
fb_dbg(info, "blank\n"); |
|
svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); |
|
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
|
break; |
|
case FB_BLANK_HSYNC_SUSPEND: |
|
fb_dbg(info, "DPMS standby (hsync off)\n"); |
|
svga_wcrt_mask(par->state.vgabase, 0x36, 0x10, 0x30); |
|
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
|
break; |
|
case FB_BLANK_VSYNC_SUSPEND: |
|
fb_dbg(info, "DPMS suspend (vsync off)\n"); |
|
svga_wcrt_mask(par->state.vgabase, 0x36, 0x20, 0x30); |
|
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
|
break; |
|
case FB_BLANK_POWERDOWN: |
|
fb_dbg(info, "DPMS off (no sync)\n"); |
|
svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); |
|
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); |
|
break; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
|
|
static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
|
{ |
|
struct vt8623fb_info *par = info->par; |
|
unsigned int offset; |
|
|
|
/* Calculate the offset */ |
|
if (info->var.bits_per_pixel == 0) { |
|
offset = (var->yoffset / 16) * info->var.xres_virtual |
|
+ var->xoffset; |
|
offset = offset >> 3; |
|
} else { |
|
offset = (var->yoffset * info->fix.line_length) + |
|
(var->xoffset * info->var.bits_per_pixel / 8); |
|
offset = offset >> ((info->var.bits_per_pixel == 4) ? 2 : 1); |
|
} |
|
|
|
/* Set the offset */ |
|
svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, offset); |
|
|
|
return 0; |
|
} |
|
|
|
|
|
/* ------------------------------------------------------------------------- */ |
|
|
|
|
|
/* Frame buffer operations */ |
|
|
|
static const struct fb_ops vt8623fb_ops = { |
|
.owner = THIS_MODULE, |
|
.fb_open = vt8623fb_open, |
|
.fb_release = vt8623fb_release, |
|
.fb_check_var = vt8623fb_check_var, |
|
.fb_set_par = vt8623fb_set_par, |
|
.fb_setcolreg = vt8623fb_setcolreg, |
|
.fb_blank = vt8623fb_blank, |
|
.fb_pan_display = vt8623fb_pan_display, |
|
.fb_fillrect = vt8623fb_fillrect, |
|
.fb_copyarea = cfb_copyarea, |
|
.fb_imageblit = vt8623fb_imageblit, |
|
.fb_get_caps = svga_get_caps, |
|
}; |
|
|
|
|
|
/* PCI probe */ |
|
|
|
static int vt8623_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) |
|
{ |
|
struct pci_bus_region bus_reg; |
|
struct resource vga_res; |
|
struct fb_info *info; |
|
struct vt8623fb_info *par; |
|
unsigned int memsize1, memsize2; |
|
int rc; |
|
|
|
/* Ignore secondary VGA device because there is no VGA arbitration */ |
|
if (! svga_primary_device(dev)) { |
|
dev_info(&(dev->dev), "ignoring secondary device\n"); |
|
return -ENODEV; |
|
} |
|
|
|
/* Allocate and fill driver data structure */ |
|
info = framebuffer_alloc(sizeof(struct vt8623fb_info), &(dev->dev)); |
|
if (!info) |
|
return -ENOMEM; |
|
|
|
par = info->par; |
|
mutex_init(&par->open_lock); |
|
|
|
info->flags = FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN; |
|
info->fbops = &vt8623fb_ops; |
|
|
|
/* Prepare PCI device */ |
|
|
|
rc = pci_enable_device(dev); |
|
if (rc < 0) { |
|
dev_err(info->device, "cannot enable PCI device\n"); |
|
goto err_enable_device; |
|
} |
|
|
|
rc = pci_request_regions(dev, "vt8623fb"); |
|
if (rc < 0) { |
|
dev_err(info->device, "cannot reserve framebuffer region\n"); |
|
goto err_request_regions; |
|
} |
|
|
|
info->fix.smem_start = pci_resource_start(dev, 0); |
|
info->fix.smem_len = pci_resource_len(dev, 0); |
|
info->fix.mmio_start = pci_resource_start(dev, 1); |
|
info->fix.mmio_len = pci_resource_len(dev, 1); |
|
|
|
/* Map physical IO memory address into kernel space */ |
|
info->screen_base = pci_iomap_wc(dev, 0, 0); |
|
if (! info->screen_base) { |
|
rc = -ENOMEM; |
|
dev_err(info->device, "iomap for framebuffer failed\n"); |
|
goto err_iomap_1; |
|
} |
|
|
|
par->mmio_base = pci_iomap(dev, 1, 0); |
|
if (! par->mmio_base) { |
|
rc = -ENOMEM; |
|
dev_err(info->device, "iomap for MMIO failed\n"); |
|
goto err_iomap_2; |
|
} |
|
|
|
bus_reg.start = 0; |
|
bus_reg.end = 64 * 1024; |
|
|
|
vga_res.flags = IORESOURCE_IO; |
|
|
|
pcibios_bus_to_resource(dev->bus, &vga_res, &bus_reg); |
|
|
|
par->state.vgabase = (void __iomem *) (unsigned long) vga_res.start; |
|
|
|
/* Find how many physical memory there is on card */ |
|
memsize1 = (vga_rseq(par->state.vgabase, 0x34) + 1) >> 1; |
|
memsize2 = vga_rseq(par->state.vgabase, 0x39) << 2; |
|
|
|
if ((16 <= memsize1) && (memsize1 <= 64) && (memsize1 == memsize2)) |
|
info->screen_size = memsize1 << 20; |
|
else { |
|
dev_err(info->device, "memory size detection failed (%x %x), suppose 16 MB\n", memsize1, memsize2); |
|
info->screen_size = 16 << 20; |
|
} |
|
|
|
info->fix.smem_len = info->screen_size; |
|
strcpy(info->fix.id, "VIA VT8623"); |
|
info->fix.type = FB_TYPE_PACKED_PIXELS; |
|
info->fix.visual = FB_VISUAL_PSEUDOCOLOR; |
|
info->fix.ypanstep = 0; |
|
info->fix.accel = FB_ACCEL_NONE; |
|
info->pseudo_palette = (void*)par->pseudo_palette; |
|
|
|
/* Prepare startup mode */ |
|
|
|
kernel_param_lock(THIS_MODULE); |
|
rc = fb_find_mode(&(info->var), info, mode_option, NULL, 0, NULL, 8); |
|
kernel_param_unlock(THIS_MODULE); |
|
if (! ((rc == 1) || (rc == 2))) { |
|
rc = -EINVAL; |
|
dev_err(info->device, "mode %s not found\n", mode_option); |
|
goto err_find_mode; |
|
} |
|
|
|
rc = fb_alloc_cmap(&info->cmap, 256, 0); |
|
if (rc < 0) { |
|
dev_err(info->device, "cannot allocate colormap\n"); |
|
goto err_alloc_cmap; |
|
} |
|
|
|
rc = register_framebuffer(info); |
|
if (rc < 0) { |
|
dev_err(info->device, "cannot register framebuffer\n"); |
|
goto err_reg_fb; |
|
} |
|
|
|
fb_info(info, "%s on %s, %d MB RAM\n", |
|
info->fix.id, pci_name(dev), info->fix.smem_len >> 20); |
|
|
|
/* Record a reference to the driver data */ |
|
pci_set_drvdata(dev, info); |
|
|
|
if (mtrr) |
|
par->wc_cookie = arch_phys_wc_add(info->fix.smem_start, |
|
info->fix.smem_len); |
|
|
|
return 0; |
|
|
|
/* Error handling */ |
|
err_reg_fb: |
|
fb_dealloc_cmap(&info->cmap); |
|
err_alloc_cmap: |
|
err_find_mode: |
|
pci_iounmap(dev, par->mmio_base); |
|
err_iomap_2: |
|
pci_iounmap(dev, info->screen_base); |
|
err_iomap_1: |
|
pci_release_regions(dev); |
|
err_request_regions: |
|
/* pci_disable_device(dev); */ |
|
err_enable_device: |
|
framebuffer_release(info); |
|
return rc; |
|
} |
|
|
|
/* PCI remove */ |
|
|
|
static void vt8623_pci_remove(struct pci_dev *dev) |
|
{ |
|
struct fb_info *info = pci_get_drvdata(dev); |
|
|
|
if (info) { |
|
struct vt8623fb_info *par = info->par; |
|
|
|
arch_phys_wc_del(par->wc_cookie); |
|
unregister_framebuffer(info); |
|
fb_dealloc_cmap(&info->cmap); |
|
|
|
pci_iounmap(dev, info->screen_base); |
|
pci_iounmap(dev, par->mmio_base); |
|
pci_release_regions(dev); |
|
/* pci_disable_device(dev); */ |
|
|
|
framebuffer_release(info); |
|
} |
|
} |
|
|
|
|
|
/* PCI suspend */ |
|
|
|
static int __maybe_unused vt8623_pci_suspend(struct device *dev) |
|
{ |
|
struct fb_info *info = dev_get_drvdata(dev); |
|
struct vt8623fb_info *par = info->par; |
|
|
|
dev_info(info->device, "suspend\n"); |
|
|
|
console_lock(); |
|
mutex_lock(&(par->open_lock)); |
|
|
|
if (par->ref_count == 0) { |
|
mutex_unlock(&(par->open_lock)); |
|
console_unlock(); |
|
return 0; |
|
} |
|
|
|
fb_set_suspend(info, 1); |
|
|
|
mutex_unlock(&(par->open_lock)); |
|
console_unlock(); |
|
|
|
return 0; |
|
} |
|
|
|
|
|
/* PCI resume */ |
|
|
|
static int __maybe_unused vt8623_pci_resume(struct device *dev) |
|
{ |
|
struct fb_info *info = dev_get_drvdata(dev); |
|
struct vt8623fb_info *par = info->par; |
|
|
|
dev_info(info->device, "resume\n"); |
|
|
|
console_lock(); |
|
mutex_lock(&(par->open_lock)); |
|
|
|
if (par->ref_count == 0) |
|
goto fail; |
|
|
|
vt8623fb_set_par(info); |
|
fb_set_suspend(info, 0); |
|
|
|
fail: |
|
mutex_unlock(&(par->open_lock)); |
|
console_unlock(); |
|
|
|
return 0; |
|
} |
|
|
|
static const struct dev_pm_ops vt8623_pci_pm_ops = { |
|
#ifdef CONFIG_PM_SLEEP |
|
.suspend = vt8623_pci_suspend, |
|
.resume = vt8623_pci_resume, |
|
.freeze = NULL, |
|
.thaw = vt8623_pci_resume, |
|
.poweroff = vt8623_pci_suspend, |
|
.restore = vt8623_pci_resume, |
|
#endif /* CONFIG_PM_SLEEP */ |
|
}; |
|
|
|
/* List of boards that we are trying to support */ |
|
|
|
static const struct pci_device_id vt8623_devices[] = { |
|
{PCI_DEVICE(PCI_VENDOR_ID_VIA, 0x3122)}, |
|
{0, 0, 0, 0, 0, 0, 0} |
|
}; |
|
|
|
MODULE_DEVICE_TABLE(pci, vt8623_devices); |
|
|
|
static struct pci_driver vt8623fb_pci_driver = { |
|
.name = "vt8623fb", |
|
.id_table = vt8623_devices, |
|
.probe = vt8623_pci_probe, |
|
.remove = vt8623_pci_remove, |
|
.driver.pm = &vt8623_pci_pm_ops, |
|
}; |
|
|
|
/* Cleanup */ |
|
|
|
static void __exit vt8623fb_cleanup(void) |
|
{ |
|
pr_debug("vt8623fb: cleaning up\n"); |
|
pci_unregister_driver(&vt8623fb_pci_driver); |
|
} |
|
|
|
/* Driver Initialisation */ |
|
|
|
static int __init vt8623fb_init(void) |
|
{ |
|
|
|
#ifndef MODULE |
|
char *option = NULL; |
|
|
|
if (fb_get_options("vt8623fb", &option)) |
|
return -ENODEV; |
|
|
|
if (option && *option) |
|
mode_option = option; |
|
#endif |
|
|
|
pr_debug("vt8623fb: initializing\n"); |
|
return pci_register_driver(&vt8623fb_pci_driver); |
|
} |
|
|
|
/* ------------------------------------------------------------------------- */ |
|
|
|
/* Modularization */ |
|
|
|
module_init(vt8623fb_init); |
|
module_exit(vt8623fb_cleanup);
|
|
|