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174 lines
4.6 KiB
174 lines
4.6 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2013 TangoTec Ltd. |
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* Author: Baruch Siach <[email protected]> |
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* |
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* Driver for the Xtensa LX4 GPIO32 Option |
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* |
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* Documentation: Xtensa LX4 Microprocessor Data Book, Section 2.22 |
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* |
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* GPIO32 is a standard optional extension to the Xtensa architecture core that |
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* provides preconfigured output and input ports for intra SoC signaling. The |
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* GPIO32 option is implemented as 32bit Tensilica Instruction Extension (TIE) |
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* output state called EXPSTATE, and 32bit input wire called IMPWIRE. This |
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* driver treats input and output states as two distinct devices. |
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* |
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* Access to GPIO32 specific instructions is controlled by the CPENABLE |
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* (Coprocessor Enable Bits) register. By default Xtensa Linux startup code |
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* disables access to all coprocessors. This driver sets the CPENABLE bit |
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* corresponding to GPIO32 before any GPIO32 specific instruction, and restores |
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* CPENABLE state after that. |
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* |
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* This driver is currently incompatible with SMP. The GPIO32 extension is not |
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* guaranteed to be available in all cores. Moreover, each core controls a |
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* different set of IO wires. A theoretical SMP aware version of this driver |
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* would need to have a per core workqueue to do the actual GPIO manipulation. |
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*/ |
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#include <linux/err.h> |
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#include <linux/module.h> |
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#include <linux/gpio/driver.h> |
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#include <linux/bitops.h> |
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#include <linux/platform_device.h> |
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#include <asm/coprocessor.h> /* CPENABLE read/write macros */ |
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#ifndef XCHAL_CP_ID_XTIOP |
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#error GPIO32 option is not enabled for your xtensa core variant |
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#endif |
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#if XCHAL_HAVE_CP |
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static inline unsigned long enable_cp(unsigned long *cpenable) |
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{ |
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unsigned long flags; |
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local_irq_save(flags); |
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*cpenable = xtensa_get_sr(cpenable); |
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xtensa_set_sr(*cpenable | BIT(XCHAL_CP_ID_XTIOP), cpenable); |
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return flags; |
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} |
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static inline void disable_cp(unsigned long flags, unsigned long cpenable) |
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{ |
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xtensa_set_sr(cpenable, cpenable); |
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local_irq_restore(flags); |
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} |
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#else |
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static inline unsigned long enable_cp(unsigned long *cpenable) |
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{ |
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*cpenable = 0; /* avoid uninitialized value warning */ |
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return 0; |
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} |
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static inline void disable_cp(unsigned long flags, unsigned long cpenable) |
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{ |
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} |
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#endif /* XCHAL_HAVE_CP */ |
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static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset) |
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{ |
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return GPIO_LINE_DIRECTION_IN; /* input only */ |
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} |
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static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset) |
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{ |
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unsigned long flags, saved_cpenable; |
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u32 impwire; |
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flags = enable_cp(&saved_cpenable); |
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__asm__ __volatile__("read_impwire %0" : "=a" (impwire)); |
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disable_cp(flags, saved_cpenable); |
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return !!(impwire & BIT(offset)); |
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} |
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static void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset, |
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int value) |
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{ |
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BUG(); /* output only; should never be called */ |
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} |
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static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset) |
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{ |
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return GPIO_LINE_DIRECTION_OUT; /* output only */ |
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} |
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static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset) |
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{ |
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unsigned long flags, saved_cpenable; |
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u32 expstate; |
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flags = enable_cp(&saved_cpenable); |
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__asm__ __volatile__("rur.expstate %0" : "=a" (expstate)); |
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disable_cp(flags, saved_cpenable); |
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return !!(expstate & BIT(offset)); |
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} |
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static void xtensa_expstate_set_value(struct gpio_chip *gc, unsigned offset, |
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int value) |
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{ |
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unsigned long flags, saved_cpenable; |
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u32 mask = BIT(offset); |
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u32 val = value ? BIT(offset) : 0; |
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flags = enable_cp(&saved_cpenable); |
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__asm__ __volatile__("wrmsk_expstate %0, %1" |
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:: "a" (val), "a" (mask)); |
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disable_cp(flags, saved_cpenable); |
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} |
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static struct gpio_chip impwire_chip = { |
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.label = "impwire", |
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.base = -1, |
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.ngpio = 32, |
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.get_direction = xtensa_impwire_get_direction, |
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.get = xtensa_impwire_get_value, |
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.set = xtensa_impwire_set_value, |
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}; |
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static struct gpio_chip expstate_chip = { |
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.label = "expstate", |
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.base = -1, |
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.ngpio = 32, |
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.get_direction = xtensa_expstate_get_direction, |
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.get = xtensa_expstate_get_value, |
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.set = xtensa_expstate_set_value, |
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}; |
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static int xtensa_gpio_probe(struct platform_device *pdev) |
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{ |
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int ret; |
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ret = gpiochip_add_data(&impwire_chip, NULL); |
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if (ret) |
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return ret; |
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return gpiochip_add_data(&expstate_chip, NULL); |
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} |
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static struct platform_driver xtensa_gpio_driver = { |
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.driver = { |
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.name = "xtensa-gpio", |
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}, |
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.probe = xtensa_gpio_probe, |
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}; |
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static int __init xtensa_gpio_init(void) |
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{ |
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struct platform_device *pdev; |
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pdev = platform_device_register_simple("xtensa-gpio", 0, NULL, 0); |
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if (IS_ERR(pdev)) |
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return PTR_ERR(pdev); |
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return platform_driver_register(&xtensa_gpio_driver); |
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} |
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device_initcall(xtensa_gpio_init); |
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MODULE_AUTHOR("Baruch Siach <[email protected]>"); |
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MODULE_DESCRIPTION("Xtensa LX4 GPIO32 driver"); |
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MODULE_LICENSE("GPL");
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