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53 lines
1.3 KiB
53 lines
1.3 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Based on linux/arch/arm/mm/dma-mapping.c |
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* |
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* Copyright (C) 2000-2004 Russell King |
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*/ |
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#include <linux/dma-map-ops.h> |
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#include <asm/cachetype.h> |
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#include <asm/cacheflush.h> |
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#include <asm/outercache.h> |
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#include <asm/cp15.h> |
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#include "dma.h" |
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void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, |
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enum dma_data_direction dir) |
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{ |
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dmac_map_area(__va(paddr), size, dir); |
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if (dir == DMA_FROM_DEVICE) |
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outer_inv_range(paddr, paddr + size); |
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else |
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outer_clean_range(paddr, paddr + size); |
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} |
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void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, |
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enum dma_data_direction dir) |
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{ |
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if (dir != DMA_TO_DEVICE) { |
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outer_inv_range(paddr, paddr + size); |
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dmac_unmap_area(__va(paddr), size, dir); |
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} |
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} |
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void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, |
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const struct iommu_ops *iommu, bool coherent) |
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{ |
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if (IS_ENABLED(CONFIG_CPU_V7M)) { |
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/* |
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* Cache support for v7m is optional, so can be treated as |
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* coherent if no cache has been detected. Note that it is not |
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* enough to check if MPU is in use or not since in absense of |
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* MPU system memory map is used. |
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*/ |
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dev->dma_coherent = cacheid ? coherent : true; |
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} else { |
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/* |
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* Assume coherent DMA in case MMU/MPU has not been set up. |
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*/ |
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dev->dma_coherent = (get_cr() & CR_M) ? coherent : true; |
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} |
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}
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