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222 lines
5.8 KiB
222 lines
5.8 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* -*- linux-c -*- * |
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* |
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* ALSA driver for the digigram lx6464es interface |
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* low-level interface |
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* |
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* Copyright (c) 2009 Tim Blechmann <[email protected]> |
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*/ |
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#ifndef LX_CORE_H |
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#define LX_CORE_H |
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#include <linux/interrupt.h> |
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#include "lx_defs.h" |
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#define REG_CRM_NUMBER 12 |
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struct lx6464es; |
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/* low-level register access */ |
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/* dsp register access */ |
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enum { |
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eReg_BASE, |
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eReg_CSM, |
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eReg_CRM1, |
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eReg_CRM2, |
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eReg_CRM3, |
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eReg_CRM4, |
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eReg_CRM5, |
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eReg_CRM6, |
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eReg_CRM7, |
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eReg_CRM8, |
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eReg_CRM9, |
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eReg_CRM10, |
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eReg_CRM11, |
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eReg_CRM12, |
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eReg_ICR, |
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eReg_CVR, |
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eReg_ISR, |
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eReg_RXHTXH, |
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eReg_RXMTXM, |
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eReg_RHLTXL, |
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eReg_RESETDSP, |
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eReg_CSUF, |
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eReg_CSES, |
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eReg_CRESMSB, |
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eReg_CRESLSB, |
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eReg_ADMACESMSB, |
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eReg_ADMACESLSB, |
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eReg_CONFES, |
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eMaxPortLx |
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}; |
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unsigned long lx_dsp_reg_read(struct lx6464es *chip, int port); |
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void lx_dsp_reg_write(struct lx6464es *chip, int port, unsigned data); |
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/* plx register access */ |
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enum { |
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ePLX_PCICR, |
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ePLX_MBOX0, |
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ePLX_MBOX1, |
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ePLX_MBOX2, |
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ePLX_MBOX3, |
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ePLX_MBOX4, |
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ePLX_MBOX5, |
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ePLX_MBOX6, |
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ePLX_MBOX7, |
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ePLX_L2PCIDB, |
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ePLX_IRQCS, |
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ePLX_CHIPSC, |
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eMaxPort |
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}; |
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unsigned long lx_plx_reg_read(struct lx6464es *chip, int port); |
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void lx_plx_reg_write(struct lx6464es *chip, int port, u32 data); |
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/* rhm */ |
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struct lx_rmh { |
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u16 cmd_len; /* length of the command to send (WORDs) */ |
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u16 stat_len; /* length of the status received (WORDs) */ |
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u16 dsp_stat; /* status type, RMP_SSIZE_XXX */ |
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u16 cmd_idx; /* index of the command */ |
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u32 cmd[REG_CRM_NUMBER]; |
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u32 stat[REG_CRM_NUMBER]; |
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}; |
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/* low-level dsp access */ |
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int lx_dsp_get_version(struct lx6464es *chip, u32 *rdsp_version); |
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int lx_dsp_get_clock_frequency(struct lx6464es *chip, u32 *rfreq); |
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int lx_dsp_set_granularity(struct lx6464es *chip, u32 gran); |
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int lx_dsp_read_async_events(struct lx6464es *chip, u32 *data); |
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int lx_dsp_get_mac(struct lx6464es *chip); |
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/* low-level pipe handling */ |
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int lx_pipe_allocate(struct lx6464es *chip, u32 pipe, int is_capture, |
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int channels); |
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int lx_pipe_release(struct lx6464es *chip, u32 pipe, int is_capture); |
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int lx_pipe_sample_count(struct lx6464es *chip, u32 pipe, int is_capture, |
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u64 *rsample_count); |
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int lx_pipe_state(struct lx6464es *chip, u32 pipe, int is_capture, u16 *rstate); |
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int lx_pipe_stop(struct lx6464es *chip, u32 pipe, int is_capture); |
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int lx_pipe_start(struct lx6464es *chip, u32 pipe, int is_capture); |
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int lx_pipe_pause(struct lx6464es *chip, u32 pipe, int is_capture); |
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int lx_pipe_wait_for_start(struct lx6464es *chip, u32 pipe, int is_capture); |
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int lx_pipe_wait_for_idle(struct lx6464es *chip, u32 pipe, int is_capture); |
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/* low-level stream handling */ |
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int lx_stream_set_format(struct lx6464es *chip, struct snd_pcm_runtime *runtime, |
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u32 pipe, int is_capture); |
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int lx_stream_state(struct lx6464es *chip, u32 pipe, int is_capture, |
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int *rstate); |
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int lx_stream_sample_position(struct lx6464es *chip, u32 pipe, int is_capture, |
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u64 *r_bytepos); |
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int lx_stream_set_state(struct lx6464es *chip, u32 pipe, |
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int is_capture, enum stream_state_t state); |
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static inline int lx_stream_start(struct lx6464es *chip, u32 pipe, |
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int is_capture) |
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{ |
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snd_printdd("->lx_stream_start\n"); |
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return lx_stream_set_state(chip, pipe, is_capture, SSTATE_RUN); |
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} |
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static inline int lx_stream_pause(struct lx6464es *chip, u32 pipe, |
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int is_capture) |
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{ |
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snd_printdd("->lx_stream_pause\n"); |
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return lx_stream_set_state(chip, pipe, is_capture, SSTATE_PAUSE); |
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} |
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static inline int lx_stream_stop(struct lx6464es *chip, u32 pipe, |
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int is_capture) |
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{ |
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snd_printdd("->lx_stream_stop\n"); |
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return lx_stream_set_state(chip, pipe, is_capture, SSTATE_STOP); |
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} |
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/* low-level buffer handling */ |
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int lx_buffer_ask(struct lx6464es *chip, u32 pipe, int is_capture, |
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u32 *r_needed, u32 *r_freed, u32 *size_array); |
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int lx_buffer_give(struct lx6464es *chip, u32 pipe, int is_capture, |
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u32 buffer_size, u32 buf_address_lo, u32 buf_address_hi, |
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u32 *r_buffer_index); |
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int lx_buffer_free(struct lx6464es *chip, u32 pipe, int is_capture, |
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u32 *r_buffer_size); |
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int lx_buffer_cancel(struct lx6464es *chip, u32 pipe, int is_capture, |
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u32 buffer_index); |
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/* low-level gain/peak handling */ |
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int lx_level_unmute(struct lx6464es *chip, int is_capture, int unmute); |
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int lx_level_peaks(struct lx6464es *chip, int is_capture, int channels, |
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u32 *r_levels); |
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/* interrupt handling */ |
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irqreturn_t lx_interrupt(int irq, void *dev_id); |
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irqreturn_t lx_threaded_irq(int irq, void *dev_id); |
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void lx_irq_enable(struct lx6464es *chip); |
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void lx_irq_disable(struct lx6464es *chip); |
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/* Stream Format Header Defines (for LIN and IEEE754) */ |
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#define HEADER_FMT_BASE HEADER_FMT_BASE_LIN |
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#define HEADER_FMT_BASE_LIN 0xFED00000 |
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#define HEADER_FMT_BASE_FLOAT 0xFAD00000 |
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#define HEADER_FMT_MONO 0x00000080 /* bit 23 in header_lo. WARNING: old |
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* bit 22 is ignored in float |
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* format */ |
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#define HEADER_FMT_INTEL 0x00008000 |
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#define HEADER_FMT_16BITS 0x00002000 |
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#define HEADER_FMT_24BITS 0x00004000 |
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#define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k. |
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* */ |
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#define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less |
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* then 32k.*/ |
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#define BIT_FMP_HEADER 23 |
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#define BIT_FMP_SD 22 |
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#define BIT_FMP_MULTICHANNEL 19 |
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#define START_STATE 1 |
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#define PAUSE_STATE 0 |
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/* from PcxAll_e.h */ |
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/* Start/Pause condition for pipes (PCXStartPipe, PCXPausePipe) */ |
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#define START_PAUSE_IMMEDIATE 0 |
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#define START_PAUSE_ON_SYNCHRO 1 |
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#define START_PAUSE_ON_TIME_CODE 2 |
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/* Pipe / Stream state */ |
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#define START_STATE 1 |
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#define PAUSE_STATE 0 |
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static inline void unpack_pointer(dma_addr_t ptr, u32 *r_low, u32 *r_high) |
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{ |
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*r_low = (u32)(ptr & 0xffffffff); |
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#if BITS_PER_LONG == 32 |
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*r_high = 0; |
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#else |
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*r_high = (u32)((u64)ptr>>32); |
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#endif |
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} |
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#endif /* LX_CORE_H */
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