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216 lines
5.8 KiB
216 lines
5.8 KiB
// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) |
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/* Copyright(c) 2015 - 2020 Intel Corporation */ |
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#include <linux/workqueue.h> |
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#include <linux/pci.h> |
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#include <linux/device.h> |
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#include <linux/iommu.h> |
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#include "adf_common_drv.h" |
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#include "adf_cfg.h" |
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#include "adf_pf2vf_msg.h" |
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static struct workqueue_struct *pf2vf_resp_wq; |
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struct adf_pf2vf_resp { |
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struct work_struct pf2vf_resp_work; |
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struct adf_accel_vf_info *vf_info; |
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}; |
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static void adf_iov_send_resp(struct work_struct *work) |
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{ |
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struct adf_pf2vf_resp *pf2vf_resp = |
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container_of(work, struct adf_pf2vf_resp, pf2vf_resp_work); |
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adf_vf2pf_req_hndl(pf2vf_resp->vf_info); |
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kfree(pf2vf_resp); |
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} |
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static void adf_vf2pf_bh_handler(void *data) |
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{ |
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struct adf_accel_vf_info *vf_info = (struct adf_accel_vf_info *)data; |
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struct adf_pf2vf_resp *pf2vf_resp; |
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pf2vf_resp = kzalloc(sizeof(*pf2vf_resp), GFP_ATOMIC); |
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if (!pf2vf_resp) |
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return; |
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pf2vf_resp->vf_info = vf_info; |
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INIT_WORK(&pf2vf_resp->pf2vf_resp_work, adf_iov_send_resp); |
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queue_work(pf2vf_resp_wq, &pf2vf_resp->pf2vf_resp_work); |
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} |
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static int adf_enable_sriov(struct adf_accel_dev *accel_dev) |
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{ |
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struct pci_dev *pdev = accel_to_pci_dev(accel_dev); |
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int totalvfs = pci_sriov_get_totalvfs(pdev); |
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struct adf_hw_device_data *hw_data = accel_dev->hw_device; |
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struct adf_accel_vf_info *vf_info; |
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int i; |
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for (i = 0, vf_info = accel_dev->pf.vf_info; i < totalvfs; |
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i++, vf_info++) { |
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/* This ptr will be populated when VFs will be created */ |
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vf_info->accel_dev = accel_dev; |
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vf_info->vf_nr = i; |
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tasklet_init(&vf_info->vf2pf_bh_tasklet, |
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(void *)adf_vf2pf_bh_handler, |
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(unsigned long)vf_info); |
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mutex_init(&vf_info->pf2vf_lock); |
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ratelimit_state_init(&vf_info->vf2pf_ratelimit, |
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DEFAULT_RATELIMIT_INTERVAL, |
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DEFAULT_RATELIMIT_BURST); |
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} |
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/* Set Valid bits in AE Thread to PCIe Function Mapping */ |
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if (hw_data->configure_iov_threads) |
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hw_data->configure_iov_threads(accel_dev, true); |
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/* Enable VF to PF interrupts for all VFs */ |
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if (hw_data->get_pf2vf_offset) |
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adf_enable_vf2pf_interrupts(accel_dev, BIT_ULL(totalvfs) - 1); |
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/* |
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* Due to the hardware design, when SR-IOV and the ring arbiter |
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* are enabled all the VFs supported in hardware must be enabled in |
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* order for all the hardware resources (i.e. bundles) to be usable. |
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* When SR-IOV is enabled, each of the VFs will own one bundle. |
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*/ |
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return pci_enable_sriov(pdev, totalvfs); |
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} |
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/** |
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* adf_disable_sriov() - Disable SRIOV for the device |
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* @accel_dev: Pointer to accel device. |
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* |
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* Function disables SRIOV for the accel device. |
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* |
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* Return: 0 on success, error code otherwise. |
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*/ |
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void adf_disable_sriov(struct adf_accel_dev *accel_dev) |
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{ |
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struct adf_hw_device_data *hw_data = accel_dev->hw_device; |
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int totalvfs = pci_sriov_get_totalvfs(accel_to_pci_dev(accel_dev)); |
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struct adf_accel_vf_info *vf; |
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int i; |
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if (!accel_dev->pf.vf_info) |
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return; |
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if (hw_data->get_pf2vf_offset) |
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adf_pf2vf_notify_restarting(accel_dev); |
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pci_disable_sriov(accel_to_pci_dev(accel_dev)); |
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/* Disable VF to PF interrupts */ |
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if (hw_data->get_pf2vf_offset) |
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adf_disable_vf2pf_interrupts(accel_dev, GENMASK(31, 0)); |
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/* Clear Valid bits in AE Thread to PCIe Function Mapping */ |
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if (hw_data->configure_iov_threads) |
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hw_data->configure_iov_threads(accel_dev, false); |
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for (i = 0, vf = accel_dev->pf.vf_info; i < totalvfs; i++, vf++) { |
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tasklet_disable(&vf->vf2pf_bh_tasklet); |
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tasklet_kill(&vf->vf2pf_bh_tasklet); |
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mutex_destroy(&vf->pf2vf_lock); |
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} |
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kfree(accel_dev->pf.vf_info); |
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accel_dev->pf.vf_info = NULL; |
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} |
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EXPORT_SYMBOL_GPL(adf_disable_sriov); |
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/** |
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* adf_sriov_configure() - Enable SRIOV for the device |
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* @pdev: Pointer to PCI device. |
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* @numvfs: Number of virtual functions (VFs) to enable. |
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* |
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* Note that the @numvfs parameter is ignored and all VFs supported by the |
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* device are enabled due to the design of the hardware. |
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* |
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* Function enables SRIOV for the PCI device. |
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* |
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* Return: number of VFs enabled on success, error code otherwise. |
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*/ |
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int adf_sriov_configure(struct pci_dev *pdev, int numvfs) |
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{ |
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struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev); |
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int totalvfs = pci_sriov_get_totalvfs(pdev); |
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unsigned long val; |
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int ret; |
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if (!accel_dev) { |
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dev_err(&pdev->dev, "Failed to find accel_dev\n"); |
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return -EFAULT; |
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} |
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if (!iommu_present(&pci_bus_type)) |
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dev_warn(&pdev->dev, "IOMMU should be enabled for SR-IOV to work correctly\n"); |
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if (accel_dev->pf.vf_info) { |
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dev_info(&pdev->dev, "Already enabled for this device\n"); |
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return -EINVAL; |
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} |
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if (adf_dev_started(accel_dev)) { |
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if (adf_devmgr_in_reset(accel_dev) || |
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adf_dev_in_use(accel_dev)) { |
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dev_err(&GET_DEV(accel_dev), "Device busy\n"); |
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return -EBUSY; |
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} |
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adf_dev_stop(accel_dev); |
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adf_dev_shutdown(accel_dev); |
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} |
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if (adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC)) |
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return -EFAULT; |
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val = 0; |
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if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, |
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ADF_NUM_CY, (void *)&val, ADF_DEC)) |
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return -EFAULT; |
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set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status); |
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/* Allocate memory for VF info structs */ |
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accel_dev->pf.vf_info = kcalloc(totalvfs, |
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sizeof(struct adf_accel_vf_info), |
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GFP_KERNEL); |
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if (!accel_dev->pf.vf_info) |
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return -ENOMEM; |
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if (adf_dev_init(accel_dev)) { |
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dev_err(&GET_DEV(accel_dev), "Failed to init qat_dev%d\n", |
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accel_dev->accel_id); |
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return -EFAULT; |
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} |
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if (adf_dev_start(accel_dev)) { |
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dev_err(&GET_DEV(accel_dev), "Failed to start qat_dev%d\n", |
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accel_dev->accel_id); |
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return -EFAULT; |
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} |
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ret = adf_enable_sriov(accel_dev); |
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if (ret) |
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return ret; |
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return numvfs; |
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} |
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EXPORT_SYMBOL_GPL(adf_sriov_configure); |
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int __init adf_init_pf_wq(void) |
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{ |
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/* Workqueue for PF2VF responses */ |
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pf2vf_resp_wq = alloc_workqueue("qat_pf2vf_resp_wq", WQ_MEM_RECLAIM, 0); |
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return !pf2vf_resp_wq ? -ENOMEM : 0; |
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} |
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void adf_exit_pf_wq(void) |
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{ |
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if (pf2vf_resp_wq) { |
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destroy_workqueue(pf2vf_resp_wq); |
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pf2vf_resp_wq = NULL; |
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} |
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}
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