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146 lines
3.7 KiB
146 lines
3.7 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* Microchip Sparx5 Switch Reset driver |
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* |
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* Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries. |
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* |
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* The Sparx5 Chip Register Model can be browsed at this location: |
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* https://github.com/microchip-ung/sparx-5_reginfo |
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*/ |
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#include <linux/mfd/syscon.h> |
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#include <linux/of_device.h> |
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#include <linux/module.h> |
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#include <linux/platform_device.h> |
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#include <linux/regmap.h> |
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#include <linux/reset-controller.h> |
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#define PROTECT_REG 0x84 |
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#define PROTECT_BIT BIT(10) |
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#define SOFT_RESET_REG 0x00 |
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#define SOFT_RESET_BIT BIT(1) |
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struct mchp_reset_context { |
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struct regmap *cpu_ctrl; |
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struct regmap *gcb_ctrl; |
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struct reset_controller_dev rcdev; |
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}; |
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static struct regmap_config sparx5_reset_regmap_config = { |
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.reg_bits = 32, |
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.val_bits = 32, |
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.reg_stride = 4, |
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}; |
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static int sparx5_switch_reset(struct reset_controller_dev *rcdev, |
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unsigned long id) |
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{ |
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struct mchp_reset_context *ctx = |
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container_of(rcdev, struct mchp_reset_context, rcdev); |
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u32 val; |
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/* Make sure the core is PROTECTED from reset */ |
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regmap_update_bits(ctx->cpu_ctrl, PROTECT_REG, PROTECT_BIT, PROTECT_BIT); |
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/* Start soft reset */ |
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regmap_write(ctx->gcb_ctrl, SOFT_RESET_REG, SOFT_RESET_BIT); |
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/* Wait for soft reset done */ |
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return regmap_read_poll_timeout(ctx->gcb_ctrl, SOFT_RESET_REG, val, |
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(val & SOFT_RESET_BIT) == 0, |
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1, 100); |
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} |
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static const struct reset_control_ops sparx5_reset_ops = { |
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.reset = sparx5_switch_reset, |
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}; |
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static int mchp_sparx5_map_syscon(struct platform_device *pdev, char *name, |
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struct regmap **target) |
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{ |
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struct device_node *syscon_np; |
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struct regmap *regmap; |
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int err; |
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syscon_np = of_parse_phandle(pdev->dev.of_node, name, 0); |
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if (!syscon_np) |
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return -ENODEV; |
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regmap = syscon_node_to_regmap(syscon_np); |
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of_node_put(syscon_np); |
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if (IS_ERR(regmap)) { |
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err = PTR_ERR(regmap); |
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dev_err(&pdev->dev, "No '%s' map: %d\n", name, err); |
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return err; |
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} |
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*target = regmap; |
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return 0; |
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} |
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static int mchp_sparx5_map_io(struct platform_device *pdev, int index, |
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struct regmap **target) |
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{ |
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struct resource *res; |
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struct regmap *map; |
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void __iomem *mem; |
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mem = devm_platform_get_and_ioremap_resource(pdev, index, &res); |
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if (IS_ERR(mem)) { |
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dev_err(&pdev->dev, "Could not map resource %d\n", index); |
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return PTR_ERR(mem); |
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} |
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sparx5_reset_regmap_config.name = res->name; |
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map = devm_regmap_init_mmio(&pdev->dev, mem, &sparx5_reset_regmap_config); |
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if (IS_ERR(map)) |
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return PTR_ERR(map); |
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*target = map; |
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return 0; |
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} |
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static int mchp_sparx5_reset_probe(struct platform_device *pdev) |
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{ |
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struct device_node *dn = pdev->dev.of_node; |
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struct mchp_reset_context *ctx; |
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int err; |
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ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); |
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if (!ctx) |
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return -ENOMEM; |
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err = mchp_sparx5_map_syscon(pdev, "cpu-syscon", &ctx->cpu_ctrl); |
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if (err) |
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return err; |
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err = mchp_sparx5_map_io(pdev, 0, &ctx->gcb_ctrl); |
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if (err) |
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return err; |
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ctx->rcdev.owner = THIS_MODULE; |
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ctx->rcdev.nr_resets = 1; |
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ctx->rcdev.ops = &sparx5_reset_ops; |
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ctx->rcdev.of_node = dn; |
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return devm_reset_controller_register(&pdev->dev, &ctx->rcdev); |
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} |
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static const struct of_device_id mchp_sparx5_reset_of_match[] = { |
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{ |
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.compatible = "microchip,sparx5-switch-reset", |
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}, |
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{ } |
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}; |
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static struct platform_driver mchp_sparx5_reset_driver = { |
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.probe = mchp_sparx5_reset_probe, |
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.driver = { |
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.name = "sparx5-switch-reset", |
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.of_match_table = mchp_sparx5_reset_of_match, |
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}, |
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}; |
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static int __init mchp_sparx5_reset_init(void) |
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{ |
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return platform_driver_register(&mchp_sparx5_reset_driver); |
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} |
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postcore_initcall(mchp_sparx5_reset_init); |
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MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); |
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MODULE_AUTHOR("Steen Hegelund <[email protected]>"); |
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MODULE_LICENSE("Dual MIT/GPL");
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