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695 lines
17 KiB
695 lines
17 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* i2c-algo-bit.c: i2c driver algorithms for bit-shift adapters |
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* |
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* Copyright (C) 1995-2000 Simon G. Vogl |
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* |
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* With some changes from Frodo Looijaard <[email protected]>, Kyösti Mälkki |
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* <[email protected]> and Jean Delvare <[email protected]> |
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*/ |
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|
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/delay.h> |
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#include <linux/errno.h> |
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#include <linux/sched.h> |
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#include <linux/i2c.h> |
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#include <linux/i2c-algo-bit.h> |
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/* ----- global defines ----------------------------------------------- */ |
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|
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#ifdef DEBUG |
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#define bit_dbg(level, dev, format, args...) \ |
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do { \ |
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if (i2c_debug >= level) \ |
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dev_dbg(dev, format, ##args); \ |
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} while (0) |
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#else |
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#define bit_dbg(level, dev, format, args...) \ |
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do {} while (0) |
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#endif /* DEBUG */ |
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/* ----- global variables --------------------------------------------- */ |
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static int bit_test; /* see if the line-setting functions work */ |
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module_param(bit_test, int, S_IRUGO); |
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MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck"); |
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#ifdef DEBUG |
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static int i2c_debug = 1; |
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module_param(i2c_debug, int, S_IRUGO | S_IWUSR); |
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MODULE_PARM_DESC(i2c_debug, |
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"debug level - 0 off; 1 normal; 2 verbose; 3 very verbose"); |
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#endif |
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|
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/* --- setting states on the bus with the right timing: --------------- */ |
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|
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#define setsda(adap, val) adap->setsda(adap->data, val) |
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#define setscl(adap, val) adap->setscl(adap->data, val) |
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#define getsda(adap) adap->getsda(adap->data) |
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#define getscl(adap) adap->getscl(adap->data) |
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static inline void sdalo(struct i2c_algo_bit_data *adap) |
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{ |
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setsda(adap, 0); |
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udelay((adap->udelay + 1) / 2); |
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} |
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static inline void sdahi(struct i2c_algo_bit_data *adap) |
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{ |
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setsda(adap, 1); |
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udelay((adap->udelay + 1) / 2); |
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} |
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static inline void scllo(struct i2c_algo_bit_data *adap) |
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{ |
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setscl(adap, 0); |
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udelay(adap->udelay / 2); |
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} |
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/* |
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* Raise scl line, and do checking for delays. This is necessary for slower |
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* devices. |
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*/ |
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static int sclhi(struct i2c_algo_bit_data *adap) |
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{ |
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unsigned long start; |
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setscl(adap, 1); |
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/* Not all adapters have scl sense line... */ |
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if (!adap->getscl) |
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goto done; |
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start = jiffies; |
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while (!getscl(adap)) { |
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/* This hw knows how to read the clock line, so we wait |
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* until it actually gets high. This is safer as some |
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* chips may hold it low ("clock stretching") while they |
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* are processing data internally. |
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*/ |
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if (time_after(jiffies, start + adap->timeout)) { |
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/* Test one last time, as we may have been preempted |
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* between last check and timeout test. |
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*/ |
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if (getscl(adap)) |
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break; |
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return -ETIMEDOUT; |
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} |
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cpu_relax(); |
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} |
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#ifdef DEBUG |
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if (jiffies != start && i2c_debug >= 3) |
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pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go high\n", |
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jiffies - start); |
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#endif |
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done: |
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udelay(adap->udelay); |
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return 0; |
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} |
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/* --- other auxiliary functions -------------------------------------- */ |
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static void i2c_start(struct i2c_algo_bit_data *adap) |
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{ |
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/* assert: scl, sda are high */ |
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setsda(adap, 0); |
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udelay(adap->udelay); |
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scllo(adap); |
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} |
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static void i2c_repstart(struct i2c_algo_bit_data *adap) |
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{ |
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/* assert: scl is low */ |
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sdahi(adap); |
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sclhi(adap); |
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setsda(adap, 0); |
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udelay(adap->udelay); |
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scllo(adap); |
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} |
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static void i2c_stop(struct i2c_algo_bit_data *adap) |
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{ |
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/* assert: scl is low */ |
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sdalo(adap); |
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sclhi(adap); |
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setsda(adap, 1); |
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udelay(adap->udelay); |
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} |
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/* send a byte without start cond., look for arbitration, |
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check ackn. from slave */ |
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/* returns: |
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* 1 if the device acknowledged |
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* 0 if the device did not ack |
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* -ETIMEDOUT if an error occurred (while raising the scl line) |
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*/ |
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static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c) |
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{ |
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int i; |
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int sb; |
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int ack; |
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data; |
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/* assert: scl is low */ |
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for (i = 7; i >= 0; i--) { |
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sb = (c >> i) & 1; |
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setsda(adap, sb); |
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udelay((adap->udelay + 1) / 2); |
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if (sclhi(adap) < 0) { /* timed out */ |
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bit_dbg(1, &i2c_adap->dev, |
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"i2c_outb: 0x%02x, timeout at bit #%d\n", |
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(int)c, i); |
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return -ETIMEDOUT; |
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} |
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/* FIXME do arbitration here: |
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* if (sb && !getsda(adap)) -> ouch! Get out of here. |
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* |
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* Report a unique code, so higher level code can retry |
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* the whole (combined) message and *NOT* issue STOP. |
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*/ |
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scllo(adap); |
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} |
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sdahi(adap); |
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if (sclhi(adap) < 0) { /* timeout */ |
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bit_dbg(1, &i2c_adap->dev, |
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"i2c_outb: 0x%02x, timeout at ack\n", (int)c); |
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return -ETIMEDOUT; |
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} |
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/* read ack: SDA should be pulled down by slave, or it may |
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* NAK (usually to report problems with the data we wrote). |
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*/ |
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ack = !getsda(adap); /* ack: sda is pulled low -> success */ |
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bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c, |
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ack ? "A" : "NA"); |
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scllo(adap); |
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return ack; |
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/* assert: scl is low (sda undef) */ |
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} |
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static int i2c_inb(struct i2c_adapter *i2c_adap) |
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{ |
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/* read byte via i2c port, without start/stop sequence */ |
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/* acknowledge is sent in i2c_read. */ |
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int i; |
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unsigned char indata = 0; |
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data; |
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/* assert: scl is low */ |
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sdahi(adap); |
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for (i = 0; i < 8; i++) { |
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if (sclhi(adap) < 0) { /* timeout */ |
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bit_dbg(1, &i2c_adap->dev, |
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"i2c_inb: timeout at bit #%d\n", |
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7 - i); |
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return -ETIMEDOUT; |
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} |
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indata *= 2; |
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if (getsda(adap)) |
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indata |= 0x01; |
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setscl(adap, 0); |
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udelay(i == 7 ? adap->udelay / 2 : adap->udelay); |
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} |
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/* assert: scl is low */ |
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return indata; |
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} |
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/* |
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* Sanity check for the adapter hardware - check the reaction of |
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* the bus lines only if it seems to be idle. |
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*/ |
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static int test_bus(struct i2c_adapter *i2c_adap) |
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{ |
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data; |
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const char *name = i2c_adap->name; |
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int scl, sda, ret; |
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if (adap->pre_xfer) { |
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ret = adap->pre_xfer(i2c_adap); |
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if (ret < 0) |
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return -ENODEV; |
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} |
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if (adap->getscl == NULL) |
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pr_info("%s: Testing SDA only, SCL is not readable\n", name); |
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sda = getsda(adap); |
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scl = (adap->getscl == NULL) ? 1 : getscl(adap); |
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if (!scl || !sda) { |
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printk(KERN_WARNING |
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"%s: bus seems to be busy (scl=%d, sda=%d)\n", |
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name, scl, sda); |
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goto bailout; |
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} |
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sdalo(adap); |
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sda = getsda(adap); |
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scl = (adap->getscl == NULL) ? 1 : getscl(adap); |
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if (sda) { |
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printk(KERN_WARNING "%s: SDA stuck high!\n", name); |
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goto bailout; |
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} |
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if (!scl) { |
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printk(KERN_WARNING |
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"%s: SCL unexpected low while pulling SDA low!\n", |
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name); |
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goto bailout; |
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} |
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sdahi(adap); |
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sda = getsda(adap); |
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scl = (adap->getscl == NULL) ? 1 : getscl(adap); |
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if (!sda) { |
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printk(KERN_WARNING "%s: SDA stuck low!\n", name); |
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goto bailout; |
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} |
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if (!scl) { |
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printk(KERN_WARNING |
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"%s: SCL unexpected low while pulling SDA high!\n", |
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name); |
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goto bailout; |
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} |
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scllo(adap); |
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sda = getsda(adap); |
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scl = (adap->getscl == NULL) ? 0 : getscl(adap); |
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if (scl) { |
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printk(KERN_WARNING "%s: SCL stuck high!\n", name); |
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goto bailout; |
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} |
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if (!sda) { |
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printk(KERN_WARNING |
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"%s: SDA unexpected low while pulling SCL low!\n", |
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name); |
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goto bailout; |
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} |
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sclhi(adap); |
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sda = getsda(adap); |
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scl = (adap->getscl == NULL) ? 1 : getscl(adap); |
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if (!scl) { |
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printk(KERN_WARNING "%s: SCL stuck low!\n", name); |
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goto bailout; |
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} |
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if (!sda) { |
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printk(KERN_WARNING |
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"%s: SDA unexpected low while pulling SCL high!\n", |
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name); |
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goto bailout; |
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} |
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if (adap->post_xfer) |
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adap->post_xfer(i2c_adap); |
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pr_info("%s: Test OK\n", name); |
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return 0; |
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bailout: |
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sdahi(adap); |
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sclhi(adap); |
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if (adap->post_xfer) |
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adap->post_xfer(i2c_adap); |
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return -ENODEV; |
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} |
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/* ----- Utility functions |
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*/ |
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/* try_address tries to contact a chip for a number of |
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* times before it gives up. |
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* return values: |
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* 1 chip answered |
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* 0 chip did not answer |
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* -x transmission error |
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*/ |
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static int try_address(struct i2c_adapter *i2c_adap, |
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unsigned char addr, int retries) |
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{ |
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data; |
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int i, ret = 0; |
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for (i = 0; i <= retries; i++) { |
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ret = i2c_outb(i2c_adap, addr); |
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if (ret == 1 || i == retries) |
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break; |
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bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); |
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i2c_stop(adap); |
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udelay(adap->udelay); |
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yield(); |
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bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); |
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i2c_start(adap); |
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} |
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if (i && ret) |
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bit_dbg(1, &i2c_adap->dev, |
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"Used %d tries to %s client at 0x%02x: %s\n", i + 1, |
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addr & 1 ? "read from" : "write to", addr >> 1, |
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ret == 1 ? "success" : "failed, timeout?"); |
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return ret; |
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} |
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static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) |
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{ |
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const unsigned char *temp = msg->buf; |
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int count = msg->len; |
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unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK; |
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int retval; |
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int wrcount = 0; |
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while (count > 0) { |
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retval = i2c_outb(i2c_adap, *temp); |
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/* OK/ACK; or ignored NAK */ |
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if ((retval > 0) || (nak_ok && (retval == 0))) { |
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count--; |
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temp++; |
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wrcount++; |
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|
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/* A slave NAKing the master means the slave didn't like |
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* something about the data it saw. For example, maybe |
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* the SMBus PEC was wrong. |
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*/ |
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} else if (retval == 0) { |
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dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n"); |
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return -EIO; |
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|
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/* Timeout; or (someday) lost arbitration |
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* |
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* FIXME Lost ARB implies retrying the transaction from |
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* the first message, after the "winning" master issues |
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* its STOP. As a rule, upper layer code has no reason |
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* to know or care about this ... it is *NOT* an error. |
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*/ |
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} else { |
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dev_err(&i2c_adap->dev, "sendbytes: error %d\n", |
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retval); |
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return retval; |
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} |
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} |
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return wrcount; |
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} |
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static int acknak(struct i2c_adapter *i2c_adap, int is_ack) |
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{ |
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data; |
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/* assert: sda is high */ |
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if (is_ack) /* send ack */ |
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setsda(adap, 0); |
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udelay((adap->udelay + 1) / 2); |
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if (sclhi(adap) < 0) { /* timeout */ |
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dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n"); |
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return -ETIMEDOUT; |
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} |
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scllo(adap); |
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return 0; |
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} |
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static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) |
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{ |
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int inval; |
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int rdcount = 0; /* counts bytes read */ |
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unsigned char *temp = msg->buf; |
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int count = msg->len; |
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const unsigned flags = msg->flags; |
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while (count > 0) { |
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inval = i2c_inb(i2c_adap); |
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if (inval >= 0) { |
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*temp = inval; |
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rdcount++; |
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} else { /* read timed out */ |
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break; |
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} |
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temp++; |
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count--; |
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/* Some SMBus transactions require that we receive the |
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transaction length as the first read byte. */ |
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if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) { |
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if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) { |
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if (!(flags & I2C_M_NO_RD_ACK)) |
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acknak(i2c_adap, 0); |
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dev_err(&i2c_adap->dev, |
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"readbytes: invalid block length (%d)\n", |
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inval); |
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return -EPROTO; |
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} |
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/* The original count value accounts for the extra |
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bytes, that is, either 1 for a regular transaction, |
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or 2 for a PEC transaction. */ |
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count += inval; |
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msg->len += inval; |
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} |
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bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n", |
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inval, |
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(flags & I2C_M_NO_RD_ACK) |
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? "(no ack/nak)" |
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: (count ? "A" : "NA")); |
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if (!(flags & I2C_M_NO_RD_ACK)) { |
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inval = acknak(i2c_adap, count); |
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if (inval < 0) |
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return inval; |
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} |
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} |
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return rdcount; |
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} |
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|
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/* doAddress initiates the transfer by generating the start condition (in |
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* try_address) and transmits the address in the necessary format to handle |
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* reads, writes as well as 10bit-addresses. |
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* returns: |
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* 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set |
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* -x an error occurred (like: -ENXIO if the device did not answer, or |
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* -ETIMEDOUT, for example if the lines are stuck...) |
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*/ |
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static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) |
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{ |
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unsigned short flags = msg->flags; |
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unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK; |
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data; |
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|
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unsigned char addr; |
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int ret, retries; |
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retries = nak_ok ? 0 : i2c_adap->retries; |
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if (flags & I2C_M_TEN) { |
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/* a ten bit address */ |
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addr = 0xf0 | ((msg->addr >> 7) & 0x06); |
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bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr); |
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/* try extended address code...*/ |
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ret = try_address(i2c_adap, addr, retries); |
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if ((ret != 1) && !nak_ok) { |
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dev_err(&i2c_adap->dev, |
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"died at extended address code\n"); |
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return -ENXIO; |
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} |
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/* the remaining 8 bit address */ |
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ret = i2c_outb(i2c_adap, msg->addr & 0xff); |
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if ((ret != 1) && !nak_ok) { |
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/* the chip did not ack / xmission error occurred */ |
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dev_err(&i2c_adap->dev, "died at 2nd address code\n"); |
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return -ENXIO; |
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} |
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if (flags & I2C_M_RD) { |
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bit_dbg(3, &i2c_adap->dev, |
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"emitting repeated start condition\n"); |
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i2c_repstart(adap); |
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/* okay, now switch into reading mode */ |
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addr |= 0x01; |
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ret = try_address(i2c_adap, addr, retries); |
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if ((ret != 1) && !nak_ok) { |
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dev_err(&i2c_adap->dev, |
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"died at repeated address code\n"); |
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return -EIO; |
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} |
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} |
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} else { /* normal 7bit address */ |
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addr = i2c_8bit_addr_from_msg(msg); |
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if (flags & I2C_M_REV_DIR_ADDR) |
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addr ^= 1; |
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ret = try_address(i2c_adap, addr, retries); |
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if ((ret != 1) && !nak_ok) |
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return -ENXIO; |
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} |
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|
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return 0; |
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} |
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|
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static int bit_xfer(struct i2c_adapter *i2c_adap, |
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struct i2c_msg msgs[], int num) |
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{ |
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struct i2c_msg *pmsg; |
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struct i2c_algo_bit_data *adap = i2c_adap->algo_data; |
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int i, ret; |
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unsigned short nak_ok; |
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|
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if (adap->pre_xfer) { |
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ret = adap->pre_xfer(i2c_adap); |
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if (ret < 0) |
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return ret; |
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} |
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|
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bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); |
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i2c_start(adap); |
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for (i = 0; i < num; i++) { |
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pmsg = &msgs[i]; |
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nak_ok = pmsg->flags & I2C_M_IGNORE_NAK; |
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if (!(pmsg->flags & I2C_M_NOSTART)) { |
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if (i) { |
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if (msgs[i - 1].flags & I2C_M_STOP) { |
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bit_dbg(3, &i2c_adap->dev, |
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"emitting enforced stop/start condition\n"); |
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i2c_stop(adap); |
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i2c_start(adap); |
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} else { |
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bit_dbg(3, &i2c_adap->dev, |
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"emitting repeated start condition\n"); |
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i2c_repstart(adap); |
|
} |
|
} |
|
ret = bit_doAddress(i2c_adap, pmsg); |
|
if ((ret != 0) && !nak_ok) { |
|
bit_dbg(1, &i2c_adap->dev, |
|
"NAK from device addr 0x%02x msg #%d\n", |
|
msgs[i].addr, i); |
|
goto bailout; |
|
} |
|
} |
|
if (pmsg->flags & I2C_M_RD) { |
|
/* read bytes into buffer*/ |
|
ret = readbytes(i2c_adap, pmsg); |
|
if (ret >= 1) |
|
bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n", |
|
ret, ret == 1 ? "" : "s"); |
|
if (ret < pmsg->len) { |
|
if (ret >= 0) |
|
ret = -EIO; |
|
goto bailout; |
|
} |
|
} else { |
|
/* write bytes from buffer */ |
|
ret = sendbytes(i2c_adap, pmsg); |
|
if (ret >= 1) |
|
bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n", |
|
ret, ret == 1 ? "" : "s"); |
|
if (ret < pmsg->len) { |
|
if (ret >= 0) |
|
ret = -EIO; |
|
goto bailout; |
|
} |
|
} |
|
} |
|
ret = i; |
|
|
|
bailout: |
|
bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); |
|
i2c_stop(adap); |
|
|
|
if (adap->post_xfer) |
|
adap->post_xfer(i2c_adap); |
|
return ret; |
|
} |
|
|
|
/* |
|
* We print a warning when we are not flagged to support atomic transfers but |
|
* will try anyhow. That's what the I2C core would do as well. Sadly, we can't |
|
* modify the algorithm struct at probe time because this struct is exported |
|
* 'const'. |
|
*/ |
|
static int bit_xfer_atomic(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], |
|
int num) |
|
{ |
|
struct i2c_algo_bit_data *adap = i2c_adap->algo_data; |
|
|
|
if (!adap->can_do_atomic) |
|
dev_warn(&i2c_adap->dev, "not flagged for atomic transfers\n"); |
|
|
|
return bit_xfer(i2c_adap, msgs, num); |
|
} |
|
|
|
static u32 bit_func(struct i2c_adapter *adap) |
|
{ |
|
return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL_ALL | |
|
I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING; |
|
} |
|
|
|
|
|
/* -----exported algorithm data: ------------------------------------- */ |
|
|
|
const struct i2c_algorithm i2c_bit_algo = { |
|
.master_xfer = bit_xfer, |
|
.master_xfer_atomic = bit_xfer_atomic, |
|
.functionality = bit_func, |
|
}; |
|
EXPORT_SYMBOL(i2c_bit_algo); |
|
|
|
static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = { |
|
.flags = I2C_AQ_NO_CLK_STRETCH, |
|
}; |
|
|
|
/* |
|
* registering functions to load algorithms at runtime |
|
*/ |
|
static int __i2c_bit_add_bus(struct i2c_adapter *adap, |
|
int (*add_adapter)(struct i2c_adapter *)) |
|
{ |
|
struct i2c_algo_bit_data *bit_adap = adap->algo_data; |
|
int ret; |
|
|
|
if (bit_test) { |
|
ret = test_bus(adap); |
|
if (bit_test >= 2 && ret < 0) |
|
return -ENODEV; |
|
} |
|
|
|
/* register new adapter to i2c module... */ |
|
adap->algo = &i2c_bit_algo; |
|
adap->retries = 3; |
|
if (bit_adap->getscl == NULL) |
|
adap->quirks = &i2c_bit_quirk_no_clk_stretch; |
|
|
|
/* |
|
* We tried forcing SCL/SDA to an initial state here. But that caused a |
|
* regression, sadly. Check Bugzilla #200045 for details. |
|
*/ |
|
|
|
ret = add_adapter(adap); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Complain if SCL can't be read */ |
|
if (bit_adap->getscl == NULL) { |
|
dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n"); |
|
dev_warn(&adap->dev, "Bus may be unreliable\n"); |
|
} |
|
return 0; |
|
} |
|
|
|
int i2c_bit_add_bus(struct i2c_adapter *adap) |
|
{ |
|
return __i2c_bit_add_bus(adap, i2c_add_adapter); |
|
} |
|
EXPORT_SYMBOL(i2c_bit_add_bus); |
|
|
|
int i2c_bit_add_numbered_bus(struct i2c_adapter *adap) |
|
{ |
|
return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter); |
|
} |
|
EXPORT_SYMBOL(i2c_bit_add_numbered_bus); |
|
|
|
MODULE_AUTHOR("Simon G. Vogl <[email protected]>"); |
|
MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm"); |
|
MODULE_LICENSE("GPL");
|
|
|