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634 lines
16 KiB
634 lines
16 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (c) 2018, The Linux Foundation. All rights reserved. |
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*/ |
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|
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#include <linux/bitfield.h> |
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#include <linux/cpufreq.h> |
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#include <linux/init.h> |
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#include <linux/interconnect.h> |
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#include <linux/interrupt.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/of_address.h> |
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#include <linux/of_platform.h> |
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#include <linux/pm_opp.h> |
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#include <linux/slab.h> |
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#include <linux/spinlock.h> |
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#define LUT_MAX_ENTRIES 40U |
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#define LUT_SRC GENMASK(31, 30) |
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#define LUT_L_VAL GENMASK(7, 0) |
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#define LUT_CORE_COUNT GENMASK(18, 16) |
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#define LUT_VOLT GENMASK(11, 0) |
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#define CLK_HW_DIV 2 |
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#define LUT_TURBO_IND 1 |
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#define HZ_PER_KHZ 1000 |
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struct qcom_cpufreq_soc_data { |
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u32 reg_enable; |
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u32 reg_freq_lut; |
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u32 reg_volt_lut; |
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u32 reg_current_vote; |
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u32 reg_perf_state; |
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u8 lut_row_size; |
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}; |
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struct qcom_cpufreq_data { |
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void __iomem *base; |
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struct resource *res; |
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const struct qcom_cpufreq_soc_data *soc_data; |
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|
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/* |
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* Mutex to synchronize between de-init sequence and re-starting LMh |
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* polling/interrupts |
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*/ |
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struct mutex throttle_lock; |
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int throttle_irq; |
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bool cancel_throttle; |
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struct delayed_work throttle_work; |
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struct cpufreq_policy *policy; |
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}; |
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static unsigned long cpu_hw_rate, xo_rate; |
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static bool icc_scaling_enabled; |
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static int qcom_cpufreq_set_bw(struct cpufreq_policy *policy, |
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unsigned long freq_khz) |
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{ |
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unsigned long freq_hz = freq_khz * 1000; |
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struct dev_pm_opp *opp; |
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struct device *dev; |
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int ret; |
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dev = get_cpu_device(policy->cpu); |
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if (!dev) |
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return -ENODEV; |
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opp = dev_pm_opp_find_freq_exact(dev, freq_hz, true); |
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if (IS_ERR(opp)) |
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return PTR_ERR(opp); |
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ret = dev_pm_opp_set_opp(dev, opp); |
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dev_pm_opp_put(opp); |
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return ret; |
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} |
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static int qcom_cpufreq_update_opp(struct device *cpu_dev, |
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unsigned long freq_khz, |
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unsigned long volt) |
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{ |
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unsigned long freq_hz = freq_khz * 1000; |
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int ret; |
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/* Skip voltage update if the opp table is not available */ |
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if (!icc_scaling_enabled) |
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return dev_pm_opp_add(cpu_dev, freq_hz, volt); |
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ret = dev_pm_opp_adjust_voltage(cpu_dev, freq_hz, volt, volt, volt); |
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if (ret) { |
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dev_err(cpu_dev, "Voltage update failed freq=%ld\n", freq_khz); |
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return ret; |
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} |
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return dev_pm_opp_enable(cpu_dev, freq_hz); |
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} |
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static int qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy, |
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unsigned int index) |
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{ |
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struct qcom_cpufreq_data *data = policy->driver_data; |
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const struct qcom_cpufreq_soc_data *soc_data = data->soc_data; |
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unsigned long freq = policy->freq_table[index].frequency; |
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writel_relaxed(index, data->base + soc_data->reg_perf_state); |
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if (icc_scaling_enabled) |
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qcom_cpufreq_set_bw(policy, freq); |
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return 0; |
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} |
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static unsigned int qcom_cpufreq_hw_get(unsigned int cpu) |
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{ |
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struct qcom_cpufreq_data *data; |
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const struct qcom_cpufreq_soc_data *soc_data; |
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struct cpufreq_policy *policy; |
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unsigned int index; |
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policy = cpufreq_cpu_get_raw(cpu); |
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if (!policy) |
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return 0; |
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data = policy->driver_data; |
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soc_data = data->soc_data; |
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index = readl_relaxed(data->base + soc_data->reg_perf_state); |
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index = min(index, LUT_MAX_ENTRIES - 1); |
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return policy->freq_table[index].frequency; |
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} |
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static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy, |
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unsigned int target_freq) |
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{ |
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struct qcom_cpufreq_data *data = policy->driver_data; |
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const struct qcom_cpufreq_soc_data *soc_data = data->soc_data; |
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unsigned int index; |
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index = policy->cached_resolved_idx; |
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writel_relaxed(index, data->base + soc_data->reg_perf_state); |
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return policy->freq_table[index].frequency; |
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} |
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static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev, |
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struct cpufreq_policy *policy) |
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{ |
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u32 data, src, lval, i, core_count, prev_freq = 0, freq; |
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u32 volt; |
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struct cpufreq_frequency_table *table; |
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struct dev_pm_opp *opp; |
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unsigned long rate; |
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int ret; |
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struct qcom_cpufreq_data *drv_data = policy->driver_data; |
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const struct qcom_cpufreq_soc_data *soc_data = drv_data->soc_data; |
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table = kcalloc(LUT_MAX_ENTRIES + 1, sizeof(*table), GFP_KERNEL); |
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if (!table) |
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return -ENOMEM; |
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ret = dev_pm_opp_of_add_table(cpu_dev); |
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if (!ret) { |
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/* Disable all opps and cross-validate against LUT later */ |
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icc_scaling_enabled = true; |
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for (rate = 0; ; rate++) { |
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opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate); |
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if (IS_ERR(opp)) |
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break; |
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dev_pm_opp_put(opp); |
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dev_pm_opp_disable(cpu_dev, rate); |
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} |
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} else if (ret != -ENODEV) { |
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dev_err(cpu_dev, "Invalid opp table in device tree\n"); |
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return ret; |
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} else { |
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policy->fast_switch_possible = true; |
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icc_scaling_enabled = false; |
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} |
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for (i = 0; i < LUT_MAX_ENTRIES; i++) { |
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data = readl_relaxed(drv_data->base + soc_data->reg_freq_lut + |
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i * soc_data->lut_row_size); |
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src = FIELD_GET(LUT_SRC, data); |
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lval = FIELD_GET(LUT_L_VAL, data); |
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core_count = FIELD_GET(LUT_CORE_COUNT, data); |
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data = readl_relaxed(drv_data->base + soc_data->reg_volt_lut + |
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i * soc_data->lut_row_size); |
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volt = FIELD_GET(LUT_VOLT, data) * 1000; |
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if (src) |
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freq = xo_rate * lval / 1000; |
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else |
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freq = cpu_hw_rate / 1000; |
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if (freq != prev_freq && core_count != LUT_TURBO_IND) { |
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if (!qcom_cpufreq_update_opp(cpu_dev, freq, volt)) { |
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table[i].frequency = freq; |
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dev_dbg(cpu_dev, "index=%d freq=%d, core_count %d\n", i, |
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freq, core_count); |
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} else { |
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dev_warn(cpu_dev, "failed to update OPP for freq=%d\n", freq); |
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table[i].frequency = CPUFREQ_ENTRY_INVALID; |
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} |
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} else if (core_count == LUT_TURBO_IND) { |
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table[i].frequency = CPUFREQ_ENTRY_INVALID; |
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} |
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/* |
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* Two of the same frequencies with the same core counts means |
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* end of table |
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*/ |
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if (i > 0 && prev_freq == freq) { |
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struct cpufreq_frequency_table *prev = &table[i - 1]; |
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/* |
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* Only treat the last frequency that might be a boost |
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* as the boost frequency |
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*/ |
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if (prev->frequency == CPUFREQ_ENTRY_INVALID) { |
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if (!qcom_cpufreq_update_opp(cpu_dev, prev_freq, volt)) { |
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prev->frequency = prev_freq; |
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prev->flags = CPUFREQ_BOOST_FREQ; |
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} else { |
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dev_warn(cpu_dev, "failed to update OPP for freq=%d\n", |
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freq); |
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} |
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} |
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break; |
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} |
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prev_freq = freq; |
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} |
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table[i].frequency = CPUFREQ_TABLE_END; |
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policy->freq_table = table; |
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dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus); |
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return 0; |
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} |
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static void qcom_get_related_cpus(int index, struct cpumask *m) |
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{ |
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struct device_node *cpu_np; |
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struct of_phandle_args args; |
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int cpu, ret; |
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for_each_possible_cpu(cpu) { |
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cpu_np = of_cpu_device_node_get(cpu); |
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if (!cpu_np) |
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continue; |
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ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain", |
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"#freq-domain-cells", 0, |
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&args); |
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of_node_put(cpu_np); |
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if (ret < 0) |
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continue; |
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if (index == args.args[0]) |
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cpumask_set_cpu(cpu, m); |
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} |
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} |
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static unsigned int qcom_lmh_get_throttle_freq(struct qcom_cpufreq_data *data) |
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{ |
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unsigned int val = readl_relaxed(data->base + data->soc_data->reg_current_vote); |
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return (val & 0x3FF) * 19200; |
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} |
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static void qcom_lmh_dcvs_notify(struct qcom_cpufreq_data *data) |
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{ |
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unsigned long max_capacity, capacity, freq_hz, throttled_freq; |
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struct cpufreq_policy *policy = data->policy; |
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int cpu = cpumask_first(policy->cpus); |
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struct device *dev = get_cpu_device(cpu); |
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struct dev_pm_opp *opp; |
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unsigned int freq; |
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/* |
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* Get the h/w throttled frequency, normalize it using the |
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* registered opp table and use it to calculate thermal pressure. |
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*/ |
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freq = qcom_lmh_get_throttle_freq(data); |
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freq_hz = freq * HZ_PER_KHZ; |
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opp = dev_pm_opp_find_freq_floor(dev, &freq_hz); |
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if (IS_ERR(opp) && PTR_ERR(opp) == -ERANGE) |
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dev_pm_opp_find_freq_ceil(dev, &freq_hz); |
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throttled_freq = freq_hz / HZ_PER_KHZ; |
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/* Update thermal pressure */ |
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max_capacity = arch_scale_cpu_capacity(cpu); |
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capacity = mult_frac(max_capacity, throttled_freq, policy->cpuinfo.max_freq); |
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/* Don't pass boost capacity to scheduler */ |
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if (capacity > max_capacity) |
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capacity = max_capacity; |
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arch_set_thermal_pressure(policy->cpus, max_capacity - capacity); |
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/* |
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* In the unlikely case policy is unregistered do not enable |
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* polling or h/w interrupt |
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*/ |
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mutex_lock(&data->throttle_lock); |
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if (data->cancel_throttle) |
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goto out; |
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/* |
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* If h/w throttled frequency is higher than what cpufreq has requested |
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* for, then stop polling and switch back to interrupt mechanism. |
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*/ |
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if (throttled_freq >= qcom_cpufreq_hw_get(cpu)) |
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enable_irq(data->throttle_irq); |
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else |
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mod_delayed_work(system_highpri_wq, &data->throttle_work, |
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msecs_to_jiffies(10)); |
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out: |
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mutex_unlock(&data->throttle_lock); |
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} |
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static void qcom_lmh_dcvs_poll(struct work_struct *work) |
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{ |
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struct qcom_cpufreq_data *data; |
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data = container_of(work, struct qcom_cpufreq_data, throttle_work.work); |
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qcom_lmh_dcvs_notify(data); |
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} |
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static irqreturn_t qcom_lmh_dcvs_handle_irq(int irq, void *data) |
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{ |
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struct qcom_cpufreq_data *c_data = data; |
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/* Disable interrupt and enable polling */ |
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disable_irq_nosync(c_data->throttle_irq); |
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qcom_lmh_dcvs_notify(c_data); |
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return 0; |
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} |
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static const struct qcom_cpufreq_soc_data qcom_soc_data = { |
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.reg_enable = 0x0, |
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.reg_freq_lut = 0x110, |
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.reg_volt_lut = 0x114, |
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.reg_current_vote = 0x704, |
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.reg_perf_state = 0x920, |
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.lut_row_size = 32, |
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}; |
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static const struct qcom_cpufreq_soc_data epss_soc_data = { |
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.reg_enable = 0x0, |
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.reg_freq_lut = 0x100, |
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.reg_volt_lut = 0x200, |
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.reg_perf_state = 0x320, |
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.lut_row_size = 4, |
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}; |
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static const struct of_device_id qcom_cpufreq_hw_match[] = { |
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{ .compatible = "qcom,cpufreq-hw", .data = &qcom_soc_data }, |
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{ .compatible = "qcom,cpufreq-epss", .data = &epss_soc_data }, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(of, qcom_cpufreq_hw_match); |
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static int qcom_cpufreq_hw_lmh_init(struct cpufreq_policy *policy, int index) |
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{ |
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struct qcom_cpufreq_data *data = policy->driver_data; |
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struct platform_device *pdev = cpufreq_get_driver_data(); |
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char irq_name[15]; |
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int ret; |
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/* |
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* Look for LMh interrupt. If no interrupt line is specified / |
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* if there is an error, allow cpufreq to be enabled as usual. |
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*/ |
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data->throttle_irq = platform_get_irq(pdev, index); |
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if (data->throttle_irq <= 0) |
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return data->throttle_irq == -EPROBE_DEFER ? -EPROBE_DEFER : 0; |
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data->cancel_throttle = false; |
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data->policy = policy; |
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mutex_init(&data->throttle_lock); |
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INIT_DEFERRABLE_WORK(&data->throttle_work, qcom_lmh_dcvs_poll); |
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snprintf(irq_name, sizeof(irq_name), "dcvsh-irq-%u", policy->cpu); |
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ret = request_threaded_irq(data->throttle_irq, NULL, qcom_lmh_dcvs_handle_irq, |
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IRQF_ONESHOT, irq_name, data); |
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if (ret) { |
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dev_err(&pdev->dev, "Error registering %s: %d\n", irq_name, ret); |
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return 0; |
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} |
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return 0; |
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} |
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static void qcom_cpufreq_hw_lmh_exit(struct qcom_cpufreq_data *data) |
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{ |
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if (data->throttle_irq <= 0) |
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return; |
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mutex_lock(&data->throttle_lock); |
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data->cancel_throttle = true; |
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mutex_unlock(&data->throttle_lock); |
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cancel_delayed_work_sync(&data->throttle_work); |
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free_irq(data->throttle_irq, data); |
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} |
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static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) |
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{ |
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struct platform_device *pdev = cpufreq_get_driver_data(); |
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struct device *dev = &pdev->dev; |
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struct of_phandle_args args; |
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struct device_node *cpu_np; |
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struct device *cpu_dev; |
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struct resource *res; |
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void __iomem *base; |
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struct qcom_cpufreq_data *data; |
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int ret, index; |
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cpu_dev = get_cpu_device(policy->cpu); |
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if (!cpu_dev) { |
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pr_err("%s: failed to get cpu%d device\n", __func__, |
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policy->cpu); |
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return -ENODEV; |
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} |
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cpu_np = of_cpu_device_node_get(policy->cpu); |
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if (!cpu_np) |
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return -EINVAL; |
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ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain", |
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"#freq-domain-cells", 0, &args); |
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of_node_put(cpu_np); |
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if (ret) |
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return ret; |
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index = args.args[0]; |
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res = platform_get_resource(pdev, IORESOURCE_MEM, index); |
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if (!res) { |
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dev_err(dev, "failed to get mem resource %d\n", index); |
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return -ENODEV; |
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} |
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if (!request_mem_region(res->start, resource_size(res), res->name)) { |
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dev_err(dev, "failed to request resource %pR\n", res); |
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return -EBUSY; |
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} |
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base = ioremap(res->start, resource_size(res)); |
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if (!base) { |
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dev_err(dev, "failed to map resource %pR\n", res); |
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ret = -ENOMEM; |
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goto release_region; |
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} |
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data = kzalloc(sizeof(*data), GFP_KERNEL); |
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if (!data) { |
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ret = -ENOMEM; |
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goto unmap_base; |
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} |
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data->soc_data = of_device_get_match_data(&pdev->dev); |
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data->base = base; |
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data->res = res; |
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/* HW should be in enabled state to proceed */ |
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if (!(readl_relaxed(base + data->soc_data->reg_enable) & 0x1)) { |
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dev_err(dev, "Domain-%d cpufreq hardware not enabled\n", index); |
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ret = -ENODEV; |
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goto error; |
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} |
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qcom_get_related_cpus(index, policy->cpus); |
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if (!cpumask_weight(policy->cpus)) { |
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dev_err(dev, "Domain-%d failed to get related CPUs\n", index); |
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ret = -ENOENT; |
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goto error; |
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} |
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policy->driver_data = data; |
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policy->dvfs_possible_from_any_cpu = true; |
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ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy); |
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if (ret) { |
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dev_err(dev, "Domain-%d failed to read LUT\n", index); |
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goto error; |
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} |
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ret = dev_pm_opp_get_opp_count(cpu_dev); |
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if (ret <= 0) { |
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dev_err(cpu_dev, "Failed to add OPPs\n"); |
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ret = -ENODEV; |
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goto error; |
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} |
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if (policy_has_boost_freq(policy)) { |
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ret = cpufreq_enable_boost_support(); |
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if (ret) |
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dev_warn(cpu_dev, "failed to enable boost: %d\n", ret); |
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} |
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ret = qcom_cpufreq_hw_lmh_init(policy, index); |
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if (ret) |
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goto error; |
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return 0; |
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error: |
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kfree(data); |
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unmap_base: |
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iounmap(base); |
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release_region: |
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release_mem_region(res->start, resource_size(res)); |
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return ret; |
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} |
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static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy) |
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{ |
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struct device *cpu_dev = get_cpu_device(policy->cpu); |
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struct qcom_cpufreq_data *data = policy->driver_data; |
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struct resource *res = data->res; |
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void __iomem *base = data->base; |
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dev_pm_opp_remove_all_dynamic(cpu_dev); |
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dev_pm_opp_of_cpumask_remove_table(policy->related_cpus); |
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qcom_cpufreq_hw_lmh_exit(data); |
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kfree(policy->freq_table); |
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kfree(data); |
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iounmap(base); |
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release_mem_region(res->start, resource_size(res)); |
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return 0; |
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} |
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static struct freq_attr *qcom_cpufreq_hw_attr[] = { |
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&cpufreq_freq_attr_scaling_available_freqs, |
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&cpufreq_freq_attr_scaling_boost_freqs, |
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NULL |
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}; |
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|
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static struct cpufreq_driver cpufreq_qcom_hw_driver = { |
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK | |
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CPUFREQ_HAVE_GOVERNOR_PER_POLICY | |
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CPUFREQ_IS_COOLING_DEV, |
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.verify = cpufreq_generic_frequency_table_verify, |
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.target_index = qcom_cpufreq_hw_target_index, |
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.get = qcom_cpufreq_hw_get, |
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.init = qcom_cpufreq_hw_cpu_init, |
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.exit = qcom_cpufreq_hw_cpu_exit, |
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.register_em = cpufreq_register_em_with_opp, |
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.fast_switch = qcom_cpufreq_hw_fast_switch, |
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.name = "qcom-cpufreq-hw", |
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.attr = qcom_cpufreq_hw_attr, |
|
}; |
|
|
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static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev) |
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{ |
|
struct device *cpu_dev; |
|
struct clk *clk; |
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int ret; |
|
|
|
clk = clk_get(&pdev->dev, "xo"); |
|
if (IS_ERR(clk)) |
|
return PTR_ERR(clk); |
|
|
|
xo_rate = clk_get_rate(clk); |
|
clk_put(clk); |
|
|
|
clk = clk_get(&pdev->dev, "alternate"); |
|
if (IS_ERR(clk)) |
|
return PTR_ERR(clk); |
|
|
|
cpu_hw_rate = clk_get_rate(clk) / CLK_HW_DIV; |
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clk_put(clk); |
|
|
|
cpufreq_qcom_hw_driver.driver_data = pdev; |
|
|
|
/* Check for optional interconnect paths on CPU0 */ |
|
cpu_dev = get_cpu_device(0); |
|
if (!cpu_dev) |
|
return -EPROBE_DEFER; |
|
|
|
ret = dev_pm_opp_of_find_icc_paths(cpu_dev, NULL); |
|
if (ret) |
|
return ret; |
|
|
|
ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver); |
|
if (ret) |
|
dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n"); |
|
else |
|
dev_dbg(&pdev->dev, "QCOM CPUFreq HW driver initialized\n"); |
|
|
|
return ret; |
|
} |
|
|
|
static int qcom_cpufreq_hw_driver_remove(struct platform_device *pdev) |
|
{ |
|
return cpufreq_unregister_driver(&cpufreq_qcom_hw_driver); |
|
} |
|
|
|
static struct platform_driver qcom_cpufreq_hw_driver = { |
|
.probe = qcom_cpufreq_hw_driver_probe, |
|
.remove = qcom_cpufreq_hw_driver_remove, |
|
.driver = { |
|
.name = "qcom-cpufreq-hw", |
|
.of_match_table = qcom_cpufreq_hw_match, |
|
}, |
|
}; |
|
|
|
static int __init qcom_cpufreq_hw_init(void) |
|
{ |
|
return platform_driver_register(&qcom_cpufreq_hw_driver); |
|
} |
|
postcore_initcall(qcom_cpufreq_hw_init); |
|
|
|
static void __exit qcom_cpufreq_hw_exit(void) |
|
{ |
|
platform_driver_unregister(&qcom_cpufreq_hw_driver); |
|
} |
|
module_exit(qcom_cpufreq_hw_exit); |
|
|
|
MODULE_DESCRIPTION("QCOM CPUFREQ HW Driver"); |
|
MODULE_LICENSE("GPL v2");
|
|
|