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988 lines
27 KiB
988 lines
27 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright (C) 2005 - 2016 Broadcom |
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* All rights reserved. |
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* |
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* Contact Information: |
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* [email protected] |
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* |
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* Emulex |
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* 3333 Susan Street |
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* Costa Mesa, CA 92626 |
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*/ |
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#ifndef BE_H |
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#define BE_H |
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#include <linux/pci.h> |
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#include <linux/etherdevice.h> |
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#include <linux/delay.h> |
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#include <net/tcp.h> |
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#include <net/ip.h> |
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#include <net/ipv6.h> |
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#include <linux/if_vlan.h> |
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#include <linux/workqueue.h> |
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#include <linux/interrupt.h> |
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#include <linux/firmware.h> |
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#include <linux/slab.h> |
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#include <linux/u64_stats_sync.h> |
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#include <linux/cpumask.h> |
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#include <linux/hwmon.h> |
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#include <linux/hwmon-sysfs.h> |
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#include "be_hw.h" |
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#include "be_roce.h" |
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#define DRV_NAME "be2net" |
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#define BE_NAME "Emulex BladeEngine2" |
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#define BE3_NAME "Emulex BladeEngine3" |
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#define OC_NAME "Emulex OneConnect" |
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#define OC_NAME_BE OC_NAME "(be3)" |
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#define OC_NAME_LANCER OC_NAME "(Lancer)" |
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#define OC_NAME_SH OC_NAME "(Skyhawk)" |
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#define DRV_DESC "Emulex OneConnect NIC Driver" |
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#define BE_VENDOR_ID 0x19a2 |
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#define EMULEX_VENDOR_ID 0x10df |
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#define BE_DEVICE_ID1 0x211 |
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#define BE_DEVICE_ID2 0x221 |
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#define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */ |
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#define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */ |
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#define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */ |
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#define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */ |
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#define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */ |
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#define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */ |
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#define OC_SUBSYS_DEVICE_ID1 0xE602 |
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#define OC_SUBSYS_DEVICE_ID2 0xE642 |
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#define OC_SUBSYS_DEVICE_ID3 0xE612 |
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#define OC_SUBSYS_DEVICE_ID4 0xE652 |
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/* Number of bytes of an RX frame that are copied to skb->data */ |
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#define BE_HDR_LEN ((u16) 64) |
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/* allocate extra space to allow tunneling decapsulation without head reallocation */ |
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#define BE_RX_SKB_ALLOC_SIZE 256 |
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#define BE_MAX_JUMBO_FRAME_SIZE 9018 |
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#define BE_MIN_MTU 256 |
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#define BE_MAX_MTU (BE_MAX_JUMBO_FRAME_SIZE - \ |
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(ETH_HLEN + ETH_FCS_LEN)) |
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/* Accommodate for QnQ configurations where VLAN insertion is enabled in HW */ |
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#define BE_MAX_GSO_SIZE (65535 - 2 * VLAN_HLEN) |
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#define BE_NUM_VLANS_SUPPORTED 64 |
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#define BE_MAX_EQD 128u |
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#define BE_MAX_TX_FRAG_COUNT 30 |
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#define EVNT_Q_LEN 1024 |
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#define TX_Q_LEN 2048 |
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#define TX_CQ_LEN 1024 |
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#define RX_Q_LEN 1024 /* Does not support any other value */ |
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#define RX_CQ_LEN 1024 |
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#define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ |
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#define MCC_CQ_LEN 256 |
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#define BE2_MAX_RSS_QS 4 |
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#define BE3_MAX_RSS_QS 16 |
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#define BE3_MAX_TX_QS 16 |
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#define BE3_MAX_EVT_QS 16 |
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#define BE3_SRIOV_MAX_EVT_QS 8 |
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#define SH_VF_MAX_NIC_EQS 3 /* Skyhawk VFs can have a max of 4 EQs |
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* and at least 1 is granted to either |
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* SURF/DPDK |
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*/ |
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#define MAX_PORT_RSS_TABLES 15 |
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#define MAX_NIC_FUNCS 16 |
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#define MAX_RX_QS 32 |
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#define MAX_EVT_QS 32 |
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#define MAX_TX_QS 32 |
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#define MAX_ROCE_EQS 5 |
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#define MAX_MSIX_VECTORS 32 |
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#define MIN_MSIX_VECTORS 1 |
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#define BE_NAPI_WEIGHT 64 |
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#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ |
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#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) |
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#define MAX_NUM_POST_ERX_DB 255u |
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#define MAX_VFS 30 /* Max VFs supported by BE3 FW */ |
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#define FW_VER_LEN 32 |
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#define CNTL_SERIAL_NUM_WORDS 8 /* Controller serial number words */ |
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#define CNTL_SERIAL_NUM_WORD_SZ (sizeof(u16)) /* Byte-sz of serial num word */ |
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#define RSS_INDIR_TABLE_LEN 128 |
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#define RSS_HASH_KEY_LEN 40 |
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#define BE_UNKNOWN_PHY_STATE 0xFF |
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struct be_dma_mem { |
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void *va; |
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dma_addr_t dma; |
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u32 size; |
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}; |
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struct be_queue_info { |
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u32 len; |
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u32 entry_size; /* Size of an element in the queue */ |
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u32 tail, head; |
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atomic_t used; /* Number of valid elements in the queue */ |
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u32 id; |
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struct be_dma_mem dma_mem; |
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bool created; |
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}; |
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static inline u32 MODULO(u32 val, u32 limit) |
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{ |
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BUG_ON(limit & (limit - 1)); |
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return val & (limit - 1); |
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} |
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static inline void index_adv(u32 *index, u32 val, u32 limit) |
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{ |
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*index = MODULO((*index + val), limit); |
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} |
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static inline void index_inc(u32 *index, u32 limit) |
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{ |
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*index = MODULO((*index + 1), limit); |
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} |
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static inline void *queue_head_node(struct be_queue_info *q) |
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{ |
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return q->dma_mem.va + q->head * q->entry_size; |
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} |
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static inline void *queue_tail_node(struct be_queue_info *q) |
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{ |
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return q->dma_mem.va + q->tail * q->entry_size; |
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} |
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static inline void *queue_index_node(struct be_queue_info *q, u16 index) |
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{ |
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return q->dma_mem.va + index * q->entry_size; |
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} |
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static inline void queue_head_inc(struct be_queue_info *q) |
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{ |
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index_inc(&q->head, q->len); |
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} |
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static inline void index_dec(u32 *index, u32 limit) |
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{ |
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*index = MODULO((*index - 1), limit); |
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} |
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static inline void queue_tail_inc(struct be_queue_info *q) |
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{ |
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index_inc(&q->tail, q->len); |
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} |
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struct be_eq_obj { |
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struct be_queue_info q; |
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char desc[32]; |
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struct be_adapter *adapter; |
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struct napi_struct napi; |
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u8 idx; /* array index */ |
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u8 msix_idx; |
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u16 spurious_intr; |
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cpumask_var_t affinity_mask; |
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} ____cacheline_aligned_in_smp; |
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struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */ |
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u32 min_eqd; /* in usecs */ |
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u32 max_eqd; /* in usecs */ |
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u32 prev_eqd; /* in usecs */ |
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u32 et_eqd; /* configured val when aic is off */ |
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ulong jiffies; |
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u64 rx_pkts_prev; /* Used to calculate RX pps */ |
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u64 tx_reqs_prev; /* Used to calculate TX pps */ |
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}; |
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struct be_mcc_obj { |
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struct be_queue_info q; |
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struct be_queue_info cq; |
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bool rearm_cq; |
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}; |
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struct be_tx_stats { |
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u64 tx_bytes; |
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u64 tx_pkts; |
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u64 tx_vxlan_offload_pkts; |
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u64 tx_reqs; |
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u64 tx_compl; |
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u32 tx_stops; |
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u32 tx_drv_drops; /* pkts dropped by driver */ |
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/* the error counters are described in be_ethtool.c */ |
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u32 tx_hdr_parse_err; |
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u32 tx_dma_err; |
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u32 tx_tso_err; |
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u32 tx_spoof_check_err; |
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u32 tx_qinq_err; |
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u32 tx_internal_parity_err; |
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u32 tx_sge_err; |
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struct u64_stats_sync sync; |
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struct u64_stats_sync sync_compl; |
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}; |
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/* Structure to hold some data of interest obtained from a TX CQE */ |
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struct be_tx_compl_info { |
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u8 status; /* Completion status */ |
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u16 end_index; /* Completed TXQ Index */ |
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}; |
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struct be_tx_obj { |
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u32 db_offset; |
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struct be_tx_compl_info txcp; |
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struct be_queue_info q; |
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struct be_queue_info cq; |
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/* Remember the skbs that were transmitted */ |
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struct sk_buff *sent_skb_list[TX_Q_LEN]; |
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struct be_tx_stats stats; |
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u16 pend_wrb_cnt; /* Number of WRBs yet to be given to HW */ |
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u16 last_req_wrb_cnt; /* wrb cnt of the last req in the Q */ |
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u16 last_req_hdr; /* index of the last req's hdr-wrb */ |
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} ____cacheline_aligned_in_smp; |
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/* Struct to remember the pages posted for rx frags */ |
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struct be_rx_page_info { |
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struct page *page; |
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/* set to page-addr for last frag of the page & frag-addr otherwise */ |
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DEFINE_DMA_UNMAP_ADDR(bus); |
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u16 page_offset; |
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bool last_frag; /* last frag of the page */ |
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}; |
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struct be_rx_stats { |
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u64 rx_bytes; |
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u64 rx_pkts; |
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u64 rx_vxlan_offload_pkts; |
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u32 rx_drops_no_skbs; /* skb allocation errors */ |
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u32 rx_drops_no_frags; /* HW has no fetched frags */ |
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u32 rx_post_fail; /* page post alloc failures */ |
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u32 rx_compl; |
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u32 rx_mcast_pkts; |
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u32 rx_compl_err; /* completions with err set */ |
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struct u64_stats_sync sync; |
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}; |
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struct be_rx_compl_info { |
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u32 rss_hash; |
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u16 vlan_tag; |
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u16 pkt_size; |
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u16 port; |
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u8 vlanf; |
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u8 num_rcvd; |
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u8 err; |
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u8 ipf; |
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u8 tcpf; |
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u8 udpf; |
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u8 ip_csum; |
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u8 l4_csum; |
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u8 ipv6; |
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u8 qnq; |
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u8 pkt_type; |
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u8 ip_frag; |
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u8 tunneled; |
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}; |
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struct be_rx_obj { |
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struct be_adapter *adapter; |
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struct be_queue_info q; |
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struct be_queue_info cq; |
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struct be_rx_compl_info rxcp; |
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struct be_rx_page_info page_info_tbl[RX_Q_LEN]; |
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struct be_rx_stats stats; |
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u8 rss_id; |
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bool rx_post_starved; /* Zero rx frags have been posted to BE */ |
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} ____cacheline_aligned_in_smp; |
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struct be_drv_stats { |
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u32 eth_red_drops; |
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u32 dma_map_errors; |
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u32 rx_drops_no_pbuf; |
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u32 rx_drops_no_txpb; |
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u32 rx_drops_no_erx_descr; |
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u32 rx_drops_no_tpre_descr; |
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u32 rx_drops_too_many_frags; |
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u32 forwarded_packets; |
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u32 rx_drops_mtu; |
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u32 rx_crc_errors; |
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u32 rx_alignment_symbol_errors; |
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u32 rx_pause_frames; |
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u32 rx_priority_pause_frames; |
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u32 rx_control_frames; |
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u32 rx_in_range_errors; |
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u32 rx_out_range_errors; |
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u32 rx_frame_too_long; |
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u32 rx_address_filtered; |
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u32 rx_dropped_too_small; |
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u32 rx_dropped_too_short; |
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u32 rx_dropped_header_too_small; |
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u32 rx_dropped_tcp_length; |
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u32 rx_dropped_runt; |
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u32 rx_ip_checksum_errs; |
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u32 rx_tcp_checksum_errs; |
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u32 rx_udp_checksum_errs; |
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u32 tx_pauseframes; |
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u32 tx_priority_pauseframes; |
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u32 tx_controlframes; |
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u32 rxpp_fifo_overflow_drop; |
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u32 rx_input_fifo_overflow_drop; |
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u32 pmem_fifo_overflow_drop; |
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u32 jabber_events; |
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u32 rx_roce_bytes_lsd; |
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u32 rx_roce_bytes_msd; |
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u32 rx_roce_frames; |
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u32 roce_drops_payload_len; |
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u32 roce_drops_crc; |
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}; |
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/* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */ |
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#define BE_RESET_VLAN_TAG_ID 0xFFFF |
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struct be_vf_cfg { |
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unsigned char mac_addr[ETH_ALEN]; |
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int if_handle; |
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int pmac_id; |
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u16 vlan_tag; |
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u32 tx_rate; |
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u32 plink_tracking; |
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u32 privileges; |
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bool spoofchk; |
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}; |
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enum vf_state { |
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ENABLED = 0, |
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ASSIGNED = 1 |
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}; |
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#define BE_FLAGS_LINK_STATUS_INIT BIT(1) |
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#define BE_FLAGS_SRIOV_ENABLED BIT(2) |
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#define BE_FLAGS_WORKER_SCHEDULED BIT(3) |
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#define BE_FLAGS_NAPI_ENABLED BIT(6) |
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#define BE_FLAGS_QNQ_ASYNC_EVT_RCVD BIT(7) |
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#define BE_FLAGS_VXLAN_OFFLOADS BIT(8) |
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#define BE_FLAGS_SETUP_DONE BIT(9) |
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#define BE_FLAGS_PHY_MISCONFIGURED BIT(10) |
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#define BE_FLAGS_ERR_DETECTION_SCHEDULED BIT(11) |
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#define BE_FLAGS_OS2BMC BIT(12) |
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#define BE_FLAGS_TRY_RECOVERY BIT(13) |
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#define BE_UC_PMAC_COUNT 30 |
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#define BE_VF_UC_PMAC_COUNT 2 |
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#define MAX_ERR_RECOVERY_RETRY_COUNT 3 |
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#define ERR_DETECTION_DELAY 1000 |
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/* Ethtool set_dump flags */ |
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#define LANCER_INITIATE_FW_DUMP 0x1 |
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#define LANCER_DELETE_FW_DUMP 0x2 |
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struct phy_info { |
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/* From SFF-8472 spec */ |
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#define SFP_VENDOR_NAME_LEN 17 |
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u8 transceiver; |
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u8 autoneg; |
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u8 fc_autoneg; |
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u8 port_type; |
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u16 phy_type; |
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u16 interface_type; |
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u32 misc_params; |
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u16 auto_speeds_supported; |
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u16 fixed_speeds_supported; |
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int link_speed; |
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u32 advertising; |
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u32 supported; |
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u8 cable_type; |
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u8 vendor_name[SFP_VENDOR_NAME_LEN]; |
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u8 vendor_pn[SFP_VENDOR_NAME_LEN]; |
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}; |
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struct be_resources { |
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u16 max_vfs; /* Total VFs "really" supported by FW/HW */ |
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u16 max_mcast_mac; |
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u16 max_tx_qs; |
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u16 max_rss_qs; |
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u16 max_rx_qs; |
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u16 max_cq_count; |
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u16 max_uc_mac; /* Max UC MACs programmable */ |
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u16 max_vlans; /* Number of vlans supported */ |
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u16 max_iface_count; |
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u16 max_mcc_count; |
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u16 max_evt_qs; |
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u16 max_nic_evt_qs; /* NIC's share of evt qs */ |
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u32 if_cap_flags; |
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u32 vf_if_cap_flags; /* VF if capability flags */ |
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u32 flags; |
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/* Calculated PF Pool's share of RSS Tables. This is not enforced by |
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* the FW, but is a self-imposed driver limitation. |
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*/ |
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u16 max_rss_tables; |
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}; |
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/* These are port-wide values */ |
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struct be_port_resources { |
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u16 max_vfs; |
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u16 nic_pfs; |
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}; |
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#define be_is_os2bmc_enabled(adapter) (adapter->flags & BE_FLAGS_OS2BMC) |
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struct rss_info { |
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u8 rsstable[RSS_INDIR_TABLE_LEN]; |
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u8 rss_queue[RSS_INDIR_TABLE_LEN]; |
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u8 rss_hkey[RSS_HASH_KEY_LEN]; |
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u64 rss_flags; |
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}; |
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#define BE_INVALID_DIE_TEMP 0xFF |
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struct be_hwmon { |
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struct device *hwmon_dev; |
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u8 be_on_die_temp; /* Unit: millidegree Celsius */ |
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}; |
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/* Macros to read/write the 'features' word of be_wrb_params structure. |
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*/ |
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#define BE_WRB_F_BIT(name) BE_WRB_F_##name##_BIT |
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#define BE_WRB_F_MASK(name) BIT_MASK(BE_WRB_F_##name##_BIT) |
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#define BE_WRB_F_GET(word, name) \ |
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(((word) & (BE_WRB_F_MASK(name))) >> BE_WRB_F_BIT(name)) |
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#define BE_WRB_F_SET(word, name, val) \ |
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((word) |= (((val) << BE_WRB_F_BIT(name)) & BE_WRB_F_MASK(name))) |
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/* Feature/offload bits */ |
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enum { |
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BE_WRB_F_CRC_BIT, /* Ethernet CRC */ |
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BE_WRB_F_IPCS_BIT, /* IP csum */ |
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BE_WRB_F_TCPCS_BIT, /* TCP csum */ |
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BE_WRB_F_UDPCS_BIT, /* UDP csum */ |
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BE_WRB_F_LSO_BIT, /* LSO */ |
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BE_WRB_F_LSO6_BIT, /* LSO6 */ |
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BE_WRB_F_VLAN_BIT, /* VLAN */ |
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BE_WRB_F_VLAN_SKIP_HW_BIT, /* Skip VLAN tag (workaround) */ |
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BE_WRB_F_OS2BMC_BIT /* Send packet to the management ring */ |
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}; |
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/* The structure below provides a HW-agnostic abstraction of WRB params |
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* retrieved from a TX skb. This is in turn passed to chip specific routines |
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* during transmit, to set the corresponding params in the WRB. |
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*/ |
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struct be_wrb_params { |
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u32 features; /* Feature bits */ |
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u16 vlan_tag; /* VLAN tag */ |
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u16 lso_mss; /* MSS for LSO */ |
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}; |
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struct be_eth_addr { |
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unsigned char mac[ETH_ALEN]; |
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}; |
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#define BE_SEC 1000 /* in msec */ |
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#define BE_MIN (60 * BE_SEC) /* in msec */ |
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#define BE_HOUR (60 * BE_MIN) /* in msec */ |
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#define ERR_RECOVERY_MAX_RETRY_COUNT 3 |
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#define ERR_RECOVERY_DETECTION_DELAY BE_SEC |
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#define ERR_RECOVERY_RETRY_DELAY (30 * BE_SEC) |
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/* UE-detection-duration in BEx/Skyhawk: |
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* All PFs must wait for this duration after they detect UE before reading |
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* SLIPORT_SEMAPHORE register. At the end of this duration, the Firmware |
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* guarantees that the SLIPORT_SEMAPHORE register is updated to indicate |
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* if the UE is recoverable. |
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*/ |
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#define ERR_RECOVERY_UE_DETECT_DURATION BE_SEC |
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/* Initial idle time (in msec) to elapse after driver load, |
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* before UE recovery is allowed. |
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*/ |
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#define ERR_IDLE_HR 24 |
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#define ERR_RECOVERY_IDLE_TIME (ERR_IDLE_HR * BE_HOUR) |
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/* Time interval (in msec) after which UE recovery can be repeated */ |
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#define ERR_INTERVAL_HR 72 |
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#define ERR_RECOVERY_INTERVAL (ERR_INTERVAL_HR * BE_HOUR) |
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/* BEx/SH UE recovery state machine */ |
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enum { |
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ERR_RECOVERY_ST_NONE = 0, /* No Recovery */ |
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ERR_RECOVERY_ST_DETECT = 1, /* UE detection duration */ |
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ERR_RECOVERY_ST_RESET = 2, /* Reset Phase (PF0 only) */ |
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ERR_RECOVERY_ST_PRE_POLL = 3, /* Pre-Poll Phase (all PFs) */ |
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ERR_RECOVERY_ST_REINIT = 4 /* Re-initialize Phase */ |
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}; |
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struct be_error_recovery { |
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union { |
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u8 recovery_retries; /* used for Lancer */ |
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u8 recovery_state; /* used for BEx and Skyhawk */ |
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}; |
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/* BEx/Skyhawk error recovery variables */ |
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bool recovery_supported; |
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u16 ue_to_reset_time; /* Time after UE, to soft reset |
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* the chip - PF0 only |
|
*/ |
|
u16 ue_to_poll_time; /* Time after UE, to Restart Polling |
|
* of SLIPORT_SEMAPHORE reg |
|
*/ |
|
u16 last_err_code; |
|
unsigned long probe_time; |
|
unsigned long last_recovery_time; |
|
|
|
/* Common to both Lancer & BEx/SH error recovery */ |
|
u32 resched_delay; |
|
struct delayed_work err_detection_work; |
|
}; |
|
|
|
/* Ethtool priv_flags */ |
|
#define BE_DISABLE_TPE_RECOVERY 0x1 |
|
|
|
struct be_vxlan_port { |
|
struct list_head list; |
|
__be16 port; /* VxLAN UDP dst port */ |
|
int port_aliases; /* alias count */ |
|
}; |
|
|
|
struct be_adapter { |
|
struct pci_dev *pdev; |
|
struct net_device *netdev; |
|
|
|
u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ |
|
u8 __iomem *db; /* Door Bell */ |
|
u8 __iomem *pcicfg; /* On SH,BEx only. Shadow of PCI config space */ |
|
|
|
struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ |
|
struct be_dma_mem mbox_mem; |
|
/* Mbox mem is adjusted to align to 16 bytes. The allocated addr |
|
* is stored for freeing purpose */ |
|
struct be_dma_mem mbox_mem_alloced; |
|
|
|
struct be_mcc_obj mcc_obj; |
|
struct mutex mcc_lock; /* For serializing mcc cmds to BE card */ |
|
spinlock_t mcc_cq_lock; |
|
|
|
u16 cfg_num_rx_irqs; /* configured via set-channels */ |
|
u16 cfg_num_tx_irqs; /* configured via set-channels */ |
|
u16 num_evt_qs; |
|
u16 num_msix_vec; |
|
struct be_eq_obj eq_obj[MAX_EVT_QS]; |
|
struct msix_entry msix_entries[MAX_MSIX_VECTORS]; |
|
bool isr_registered; |
|
|
|
/* TX Rings */ |
|
u16 num_tx_qs; |
|
struct be_tx_obj tx_obj[MAX_TX_QS]; |
|
|
|
/* Rx rings */ |
|
u16 num_rx_qs; |
|
u16 num_rss_qs; |
|
u16 need_def_rxq; |
|
struct be_rx_obj rx_obj[MAX_RX_QS]; |
|
u32 big_page_size; /* Compounded page size shared by rx wrbs */ |
|
|
|
struct be_drv_stats drv_stats; |
|
struct be_aic_obj aic_obj[MAX_EVT_QS]; |
|
bool aic_enabled; |
|
u8 vlan_prio_bmap; /* Available Priority BitMap */ |
|
u16 recommended_prio_bits;/* Recommended Priority bits in vlan tag */ |
|
struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */ |
|
|
|
struct be_dma_mem stats_cmd; |
|
/* Work queue used to perform periodic tasks like getting statistics */ |
|
struct delayed_work work; |
|
u16 work_counter; |
|
|
|
u8 recovery_retries; |
|
u8 err_flags; |
|
bool pcicfg_mapped; /* pcicfg obtained via pci_iomap() */ |
|
u32 flags; |
|
u32 cmd_privileges; |
|
/* Ethtool knobs and info */ |
|
char fw_ver[FW_VER_LEN]; |
|
char fw_on_flash[FW_VER_LEN]; |
|
|
|
/* IFACE filtering fields */ |
|
int if_handle; /* Used to configure filtering */ |
|
u32 if_flags; /* Interface filtering flags */ |
|
u32 *pmac_id; /* MAC addr handle used by BE card */ |
|
struct be_eth_addr *uc_list;/* list of uc-addrs programmed (not perm) */ |
|
u32 uc_macs; /* Count of secondary UC MAC programmed */ |
|
struct be_eth_addr *mc_list;/* list of mcast addrs programmed */ |
|
u32 mc_count; |
|
unsigned long vids[BITS_TO_LONGS(VLAN_N_VID)]; |
|
u16 vlans_added; |
|
bool update_uc_list; |
|
bool update_mc_list; |
|
struct mutex rx_filter_lock;/* For protecting vids[] & mc/uc_list[] */ |
|
|
|
u32 beacon_state; /* for set_phys_id */ |
|
|
|
u32 port_num; |
|
char port_name; |
|
u8 mc_type; |
|
u32 function_mode; |
|
u32 function_caps; |
|
u32 rx_fc; /* Rx flow control */ |
|
u32 tx_fc; /* Tx flow control */ |
|
bool stats_cmd_sent; |
|
struct { |
|
u32 size; |
|
u32 total_size; |
|
u64 io_addr; |
|
} roce_db; |
|
u32 num_msix_roce_vec; |
|
struct ocrdma_dev *ocrdma_dev; |
|
struct list_head entry; |
|
|
|
u32 flash_status; |
|
struct completion et_cmd_compl; |
|
|
|
struct be_resources pool_res; /* resources available for the port */ |
|
struct be_resources res; /* resources available for the func */ |
|
u16 num_vfs; /* Number of VFs provisioned by PF */ |
|
u8 pf_num; /* Numbering used by FW, starts at 0 */ |
|
u8 vf_num; /* Numbering used by FW, starts at 1 */ |
|
u8 virtfn; |
|
struct be_vf_cfg *vf_cfg; |
|
bool be3_native; |
|
u32 sli_family; |
|
u8 hba_port_num; |
|
u16 pvid; |
|
__be16 vxlan_port; /* offloaded vxlan port num */ |
|
struct phy_info phy; |
|
u8 wol_cap; |
|
bool wol_en; |
|
u16 asic_rev; |
|
u16 qnq_vid; |
|
u32 msg_enable; |
|
int be_get_temp_freq; |
|
struct be_hwmon hwmon_info; |
|
struct rss_info rss_info; |
|
/* Filters for packets that need to be sent to BMC */ |
|
u32 bmc_filt_mask; |
|
u32 fat_dump_len; |
|
u16 serial_num[CNTL_SERIAL_NUM_WORDS]; |
|
u8 phy_state; /* state of sfp optics (functional, faulted, etc.,) */ |
|
u8 dev_mac[ETH_ALEN]; |
|
u32 priv_flags; /* ethtool get/set_priv_flags() */ |
|
struct be_error_recovery error_recovery; |
|
}; |
|
|
|
/* Used for defered FW config cmds. Add fields to this struct as reqd */ |
|
struct be_cmd_work { |
|
struct work_struct work; |
|
struct be_adapter *adapter; |
|
}; |
|
|
|
#define be_physfn(adapter) (!adapter->virtfn) |
|
#define be_virtfn(adapter) (adapter->virtfn) |
|
#define sriov_enabled(adapter) (adapter->flags & \ |
|
BE_FLAGS_SRIOV_ENABLED) |
|
|
|
#define for_all_vfs(adapter, vf_cfg, i) \ |
|
for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \ |
|
i++, vf_cfg++) |
|
|
|
#define ON 1 |
|
#define OFF 0 |
|
|
|
#define be_max_vlans(adapter) (adapter->res.max_vlans) |
|
#define be_max_uc(adapter) (adapter->res.max_uc_mac) |
|
#define be_max_mc(adapter) (adapter->res.max_mcast_mac) |
|
#define be_max_vfs(adapter) (adapter->pool_res.max_vfs) |
|
#define be_max_rss(adapter) (adapter->res.max_rss_qs) |
|
#define be_max_txqs(adapter) (adapter->res.max_tx_qs) |
|
#define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs) |
|
#define be_max_rxqs(adapter) (adapter->res.max_rx_qs) |
|
/* Max number of EQs available for the function (NIC + RoCE (if enabled)) */ |
|
#define be_max_func_eqs(adapter) (adapter->res.max_evt_qs) |
|
/* Max number of EQs available avaialble only for NIC */ |
|
#define be_max_nic_eqs(adapter) (adapter->res.max_nic_evt_qs) |
|
#define be_if_cap_flags(adapter) (adapter->res.if_cap_flags) |
|
#define be_max_pf_pool_rss_tables(adapter) \ |
|
(adapter->pool_res.max_rss_tables) |
|
/* Max irqs avaialble for NIC */ |
|
#define be_max_irqs(adapter) \ |
|
(min_t(u16, be_max_nic_eqs(adapter), num_online_cpus())) |
|
|
|
/* Max irqs *needed* for RX queues */ |
|
static inline u16 be_max_rx_irqs(struct be_adapter *adapter) |
|
{ |
|
/* If no RSS, need atleast one irq for def-RXQ */ |
|
u16 num = max_t(u16, be_max_rss(adapter), 1); |
|
|
|
return min_t(u16, num, be_max_irqs(adapter)); |
|
} |
|
|
|
/* Max irqs *needed* for TX queues */ |
|
static inline u16 be_max_tx_irqs(struct be_adapter *adapter) |
|
{ |
|
return min_t(u16, be_max_txqs(adapter), be_max_irqs(adapter)); |
|
} |
|
|
|
/* Max irqs *needed* for combined queues */ |
|
static inline u16 be_max_qp_irqs(struct be_adapter *adapter) |
|
{ |
|
return min(be_max_tx_irqs(adapter), be_max_rx_irqs(adapter)); |
|
} |
|
|
|
/* Max irqs *needed* for RX and TX queues together */ |
|
static inline u16 be_max_any_irqs(struct be_adapter *adapter) |
|
{ |
|
return max(be_max_tx_irqs(adapter), be_max_rx_irqs(adapter)); |
|
} |
|
|
|
/* Is BE in pvid_tagging mode */ |
|
#define be_pvid_tagging_enabled(adapter) (adapter->pvid) |
|
|
|
/* Is BE in QNQ multi-channel mode */ |
|
#define be_is_qnq_mode(adapter) (adapter->function_mode & QNQ_MODE) |
|
|
|
#ifdef CONFIG_BE2NET_LANCER |
|
#define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \ |
|
adapter->pdev->device == OC_DEVICE_ID4) |
|
#else |
|
#define lancer_chip(adapter) (0) |
|
#endif /* CONFIG_BE2NET_LANCER */ |
|
|
|
#ifdef CONFIG_BE2NET_SKYHAWK |
|
#define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \ |
|
adapter->pdev->device == OC_DEVICE_ID6) |
|
#else |
|
#define skyhawk_chip(adapter) (0) |
|
#endif /* CONFIG_BE2NET_SKYHAWK */ |
|
|
|
#ifdef CONFIG_BE2NET_BE3 |
|
#define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \ |
|
adapter->pdev->device == OC_DEVICE_ID2) |
|
#else |
|
#define BE3_chip(adapter) (0) |
|
#endif /* CONFIG_BE2NET_BE3 */ |
|
|
|
#ifdef CONFIG_BE2NET_BE2 |
|
#define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \ |
|
adapter->pdev->device == OC_DEVICE_ID1) |
|
#else |
|
#define BE2_chip(adapter) (0) |
|
#endif /* CONFIG_BE2NET_BE2 */ |
|
|
|
#define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter)) |
|
|
|
#define be_roce_supported(adapter) (skyhawk_chip(adapter) && \ |
|
(adapter->function_mode & RDMA_ENABLED)) |
|
|
|
extern const struct ethtool_ops be_ethtool_ops; |
|
|
|
#define msix_enabled(adapter) (adapter->num_msix_vec > 0) |
|
#define num_irqs(adapter) (msix_enabled(adapter) ? \ |
|
adapter->num_msix_vec : 1) |
|
#define tx_stats(txo) (&(txo)->stats) |
|
#define rx_stats(rxo) (&(rxo)->stats) |
|
|
|
/* The default RXQ is the last RXQ */ |
|
#define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1]) |
|
|
|
#define for_all_rx_queues(adapter, rxo, i) \ |
|
for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \ |
|
i++, rxo++) |
|
|
|
#define for_all_rss_queues(adapter, rxo, i) \ |
|
for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rss_qs; \ |
|
i++, rxo++) |
|
|
|
#define for_all_tx_queues(adapter, txo, i) \ |
|
for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \ |
|
i++, txo++) |
|
|
|
#define for_all_evt_queues(adapter, eqo, i) \ |
|
for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \ |
|
i++, eqo++) |
|
|
|
#define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \ |
|
for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\ |
|
i += adapter->num_evt_qs, rxo += adapter->num_evt_qs) |
|
|
|
#define for_all_tx_queues_on_eq(adapter, eqo, txo, i) \ |
|
for (i = eqo->idx, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;\ |
|
i += adapter->num_evt_qs, txo += adapter->num_evt_qs) |
|
|
|
#define is_mcc_eqo(eqo) (eqo->idx == 0) |
|
#define mcc_eqo(adapter) (&adapter->eq_obj[0]) |
|
|
|
#define PAGE_SHIFT_4K 12 |
|
#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) |
|
|
|
/* Returns number of pages spanned by the data starting at the given addr */ |
|
#define PAGES_4K_SPANNED(_address, size) \ |
|
((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ |
|
(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) |
|
|
|
/* Returns bit offset within a DWORD of a bitfield */ |
|
#define AMAP_BIT_OFFSET(_struct, field) \ |
|
(((size_t)&(((_struct *)0)->field))%32) |
|
|
|
/* Returns the bit mask of the field that is NOT shifted into location. */ |
|
static inline u32 amap_mask(u32 bitsize) |
|
{ |
|
return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); |
|
} |
|
|
|
static inline void |
|
amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) |
|
{ |
|
u32 *dw = (u32 *) ptr + dw_offset; |
|
*dw &= ~(mask << offset); |
|
*dw |= (mask & value) << offset; |
|
} |
|
|
|
#define AMAP_SET_BITS(_struct, field, ptr, val) \ |
|
amap_set(ptr, \ |
|
offsetof(_struct, field)/32, \ |
|
amap_mask(sizeof(((_struct *)0)->field)), \ |
|
AMAP_BIT_OFFSET(_struct, field), \ |
|
val) |
|
|
|
static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) |
|
{ |
|
u32 *dw = (u32 *) ptr; |
|
return mask & (*(dw + dw_offset) >> offset); |
|
} |
|
|
|
#define AMAP_GET_BITS(_struct, field, ptr) \ |
|
amap_get(ptr, \ |
|
offsetof(_struct, field)/32, \ |
|
amap_mask(sizeof(((_struct *)0)->field)), \ |
|
AMAP_BIT_OFFSET(_struct, field)) |
|
|
|
#define GET_RX_COMPL_V0_BITS(field, ptr) \ |
|
AMAP_GET_BITS(struct amap_eth_rx_compl_v0, field, ptr) |
|
|
|
#define GET_RX_COMPL_V1_BITS(field, ptr) \ |
|
AMAP_GET_BITS(struct amap_eth_rx_compl_v1, field, ptr) |
|
|
|
#define GET_TX_COMPL_BITS(field, ptr) \ |
|
AMAP_GET_BITS(struct amap_eth_tx_compl, field, ptr) |
|
|
|
#define SET_TX_WRB_HDR_BITS(field, ptr, val) \ |
|
AMAP_SET_BITS(struct amap_eth_hdr_wrb, field, ptr, val) |
|
|
|
#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) |
|
#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) |
|
static inline void swap_dws(void *wrb, int len) |
|
{ |
|
#ifdef __BIG_ENDIAN |
|
u32 *dw = wrb; |
|
BUG_ON(len % 4); |
|
do { |
|
*dw = cpu_to_le32(*dw); |
|
dw++; |
|
len -= 4; |
|
} while (len); |
|
#endif /* __BIG_ENDIAN */ |
|
} |
|
|
|
#define be_cmd_status(status) (status > 0 ? -EIO : status) |
|
|
|
static inline u8 is_tcp_pkt(struct sk_buff *skb) |
|
{ |
|
u8 val = 0; |
|
|
|
if (ip_hdr(skb)->version == 4) |
|
val = (ip_hdr(skb)->protocol == IPPROTO_TCP); |
|
else if (ip_hdr(skb)->version == 6) |
|
val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); |
|
|
|
return val; |
|
} |
|
|
|
static inline u8 is_udp_pkt(struct sk_buff *skb) |
|
{ |
|
u8 val = 0; |
|
|
|
if (ip_hdr(skb)->version == 4) |
|
val = (ip_hdr(skb)->protocol == IPPROTO_UDP); |
|
else if (ip_hdr(skb)->version == 6) |
|
val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); |
|
|
|
return val; |
|
} |
|
|
|
static inline bool is_ipv4_pkt(struct sk_buff *skb) |
|
{ |
|
return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; |
|
} |
|
|
|
static inline bool is_ipv6_ext_hdr(struct sk_buff *skb) |
|
{ |
|
if (ip_hdr(skb)->version == 6) |
|
return ipv6_ext_hdr(ipv6_hdr(skb)->nexthdr); |
|
else |
|
return false; |
|
} |
|
|
|
#define be_error_recovering(adapter) \ |
|
(adapter->flags & BE_FLAGS_TRY_RECOVERY) |
|
|
|
#define BE_ERROR_EEH 1 |
|
#define BE_ERROR_UE BIT(1) |
|
#define BE_ERROR_FW BIT(2) |
|
#define BE_ERROR_TX BIT(3) |
|
#define BE_ERROR_HW (BE_ERROR_EEH | BE_ERROR_UE | BE_ERROR_TX) |
|
#define BE_ERROR_ANY (BE_ERROR_EEH | BE_ERROR_UE | BE_ERROR_FW | \ |
|
BE_ERROR_TX) |
|
#define BE_CLEAR_ALL 0xFF |
|
|
|
static inline u8 be_check_error(struct be_adapter *adapter, u32 err_type) |
|
{ |
|
return (adapter->err_flags & err_type); |
|
} |
|
|
|
static inline void be_set_error(struct be_adapter *adapter, int err_type) |
|
{ |
|
struct net_device *netdev = adapter->netdev; |
|
|
|
adapter->err_flags |= err_type; |
|
netif_carrier_off(netdev); |
|
|
|
dev_info(&adapter->pdev->dev, "%s: Link down\n", netdev->name); |
|
} |
|
|
|
static inline void be_clear_error(struct be_adapter *adapter, int err_type) |
|
{ |
|
adapter->err_flags &= ~err_type; |
|
} |
|
|
|
static inline bool be_multi_rxq(const struct be_adapter *adapter) |
|
{ |
|
return adapter->num_rx_qs > 1; |
|
} |
|
|
|
void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, |
|
u16 num_popped); |
|
void be_link_status_update(struct be_adapter *adapter, u8 link_status); |
|
void be_parse_stats(struct be_adapter *adapter); |
|
int be_load_fw(struct be_adapter *adapter, u8 *func); |
|
bool be_is_wol_supported(struct be_adapter *adapter); |
|
bool be_pause_supported(struct be_adapter *adapter); |
|
u32 be_get_fw_log_level(struct be_adapter *adapter); |
|
int be_update_queues(struct be_adapter *adapter); |
|
int be_poll(struct napi_struct *napi, int budget); |
|
void be_eqd_update(struct be_adapter *adapter, bool force_update); |
|
|
|
/* |
|
* internal function to initialize-cleanup roce device. |
|
*/ |
|
void be_roce_dev_add(struct be_adapter *); |
|
void be_roce_dev_remove(struct be_adapter *); |
|
|
|
/* |
|
* internal function to open-close roce device during ifup-ifdown. |
|
*/ |
|
void be_roce_dev_shutdown(struct be_adapter *); |
|
|
|
#endif /* BE_H */
|
|
|