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718 lines
19 KiB
718 lines
19 KiB
/* |
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* Copyright (c) 2007 Cisco Systems, Inc. All rights reserved. |
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* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. |
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* |
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* This software is available to you under a choice of one of two |
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* licenses. You may choose to be licensed under the terms of the GNU |
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* General Public License (GPL) Version 2, available from the file |
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* COPYING in the main directory of this source tree, or the |
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* OpenIB.org BSD license below: |
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* |
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* Redistribution and use in source and binary forms, with or |
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* without modification, are permitted provided that the following |
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* conditions are met: |
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* |
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* - Redistributions of source code must retain the above |
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* copyright notice, this list of conditions and the following |
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* disclaimer. |
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* |
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* - Redistributions in binary form must reproduce the above |
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* copyright notice, this list of conditions and the following |
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* disclaimer in the documentation and/or other materials |
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* provided with the distribution. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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* SOFTWARE. |
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*/ |
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|
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#include <linux/slab.h> |
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#include <rdma/ib_user_verbs.h> |
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|
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#include "mlx4_ib.h" |
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|
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static u32 convert_access(int acc) |
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{ |
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return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX4_PERM_ATOMIC : 0) | |
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(acc & IB_ACCESS_REMOTE_WRITE ? MLX4_PERM_REMOTE_WRITE : 0) | |
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(acc & IB_ACCESS_REMOTE_READ ? MLX4_PERM_REMOTE_READ : 0) | |
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(acc & IB_ACCESS_LOCAL_WRITE ? MLX4_PERM_LOCAL_WRITE : 0) | |
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(acc & IB_ACCESS_MW_BIND ? MLX4_PERM_BIND_MW : 0) | |
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MLX4_PERM_LOCAL_READ; |
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} |
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|
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static enum mlx4_mw_type to_mlx4_type(enum ib_mw_type type) |
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{ |
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switch (type) { |
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case IB_MW_TYPE_1: return MLX4_MW_TYPE_1; |
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case IB_MW_TYPE_2: return MLX4_MW_TYPE_2; |
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default: return -1; |
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} |
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} |
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struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc) |
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{ |
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struct mlx4_ib_mr *mr; |
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int err; |
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mr = kzalloc(sizeof(*mr), GFP_KERNEL); |
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if (!mr) |
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return ERR_PTR(-ENOMEM); |
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|
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err = mlx4_mr_alloc(to_mdev(pd->device)->dev, to_mpd(pd)->pdn, 0, |
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~0ull, convert_access(acc), 0, 0, &mr->mmr); |
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if (err) |
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goto err_free; |
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|
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err = mlx4_mr_enable(to_mdev(pd->device)->dev, &mr->mmr); |
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if (err) |
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goto err_mr; |
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mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key; |
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mr->umem = NULL; |
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return &mr->ibmr; |
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err_mr: |
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(void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr); |
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|
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err_free: |
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kfree(mr); |
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return ERR_PTR(err); |
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} |
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enum { |
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MLX4_MAX_MTT_SHIFT = 31 |
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}; |
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static int mlx4_ib_umem_write_mtt_block(struct mlx4_ib_dev *dev, |
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struct mlx4_mtt *mtt, |
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u64 mtt_size, u64 mtt_shift, u64 len, |
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u64 cur_start_addr, u64 *pages, |
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int *start_index, int *npages) |
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{ |
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u64 cur_end_addr = cur_start_addr + len; |
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u64 cur_end_addr_aligned = 0; |
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u64 mtt_entries; |
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int err = 0; |
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int k; |
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len += (cur_start_addr & (mtt_size - 1ULL)); |
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cur_end_addr_aligned = round_up(cur_end_addr, mtt_size); |
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len += (cur_end_addr_aligned - cur_end_addr); |
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if (len & (mtt_size - 1ULL)) { |
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pr_warn("write_block: len %llx is not aligned to mtt_size %llx\n", |
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len, mtt_size); |
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return -EINVAL; |
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} |
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mtt_entries = (len >> mtt_shift); |
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|
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/* |
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* Align the MTT start address to the mtt_size. |
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* Required to handle cases when the MR starts in the middle of an MTT |
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* record. Was not required in old code since the physical addresses |
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* provided by the dma subsystem were page aligned, which was also the |
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* MTT size. |
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*/ |
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cur_start_addr = round_down(cur_start_addr, mtt_size); |
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/* A new block is started ... */ |
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for (k = 0; k < mtt_entries; ++k) { |
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pages[*npages] = cur_start_addr + (mtt_size * k); |
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(*npages)++; |
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/* |
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* Be friendly to mlx4_write_mtt() and pass it chunks of |
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* appropriate size. |
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*/ |
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if (*npages == PAGE_SIZE / sizeof(u64)) { |
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err = mlx4_write_mtt(dev->dev, mtt, *start_index, |
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*npages, pages); |
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if (err) |
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return err; |
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(*start_index) += *npages; |
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*npages = 0; |
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} |
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} |
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return 0; |
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} |
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static inline u64 alignment_of(u64 ptr) |
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{ |
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return ilog2(ptr & (~(ptr - 1))); |
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} |
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static int mlx4_ib_umem_calc_block_mtt(u64 next_block_start, |
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u64 current_block_end, |
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u64 block_shift) |
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{ |
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/* Check whether the alignment of the new block is aligned as well as |
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* the previous block. |
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* Block address must start with zeros till size of entity_size. |
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*/ |
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if ((next_block_start & ((1ULL << block_shift) - 1ULL)) != 0) |
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/* |
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* It is not as well aligned as the previous block-reduce the |
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* mtt size accordingly. Here we take the last right bit which |
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* is 1. |
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*/ |
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block_shift = alignment_of(next_block_start); |
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|
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/* |
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* Check whether the alignment of the end of previous block - is it |
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* aligned as well as the start of the block |
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*/ |
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if (((current_block_end) & ((1ULL << block_shift) - 1ULL)) != 0) |
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/* |
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* It is not as well aligned as the start of the block - |
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* reduce the mtt size accordingly. |
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*/ |
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block_shift = alignment_of(current_block_end); |
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|
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return block_shift; |
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} |
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|
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int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt, |
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struct ib_umem *umem) |
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{ |
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u64 *pages; |
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u64 len = 0; |
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int err = 0; |
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u64 mtt_size; |
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u64 cur_start_addr = 0; |
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u64 mtt_shift; |
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int start_index = 0; |
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int npages = 0; |
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struct scatterlist *sg; |
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int i; |
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|
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pages = (u64 *) __get_free_page(GFP_KERNEL); |
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if (!pages) |
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return -ENOMEM; |
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mtt_shift = mtt->page_shift; |
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mtt_size = 1ULL << mtt_shift; |
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for_each_sg(umem->sg_head.sgl, sg, umem->nmap, i) { |
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if (cur_start_addr + len == sg_dma_address(sg)) { |
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/* still the same block */ |
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len += sg_dma_len(sg); |
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continue; |
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} |
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/* |
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* A new block is started ... |
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* If len is malaligned, write an extra mtt entry to cover the |
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* misaligned area (round up the division) |
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*/ |
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err = mlx4_ib_umem_write_mtt_block(dev, mtt, mtt_size, |
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mtt_shift, len, |
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cur_start_addr, |
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pages, &start_index, |
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&npages); |
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if (err) |
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goto out; |
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cur_start_addr = sg_dma_address(sg); |
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len = sg_dma_len(sg); |
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} |
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|
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/* Handle the last block */ |
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if (len > 0) { |
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/* |
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* If len is malaligned, write an extra mtt entry to cover |
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* the misaligned area (round up the division) |
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*/ |
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err = mlx4_ib_umem_write_mtt_block(dev, mtt, mtt_size, |
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mtt_shift, len, |
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cur_start_addr, pages, |
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&start_index, &npages); |
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if (err) |
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goto out; |
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} |
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if (npages) |
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err = mlx4_write_mtt(dev->dev, mtt, start_index, npages, pages); |
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|
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out: |
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free_page((unsigned long) pages); |
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return err; |
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} |
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/* |
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* Calculate optimal mtt size based on contiguous pages. |
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* Function will return also the number of pages that are not aligned to the |
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* calculated mtt_size to be added to total number of pages. For that we should |
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* check the first chunk length & last chunk length and if not aligned to |
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* mtt_size we should increment the non_aligned_pages number. All chunks in the |
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* middle already handled as part of mtt shift calculation for both their start |
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* & end addresses. |
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*/ |
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int mlx4_ib_umem_calc_optimal_mtt_size(struct ib_umem *umem, u64 start_va, |
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int *num_of_mtts) |
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{ |
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u64 block_shift = MLX4_MAX_MTT_SHIFT; |
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u64 min_shift = PAGE_SHIFT; |
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u64 last_block_aligned_end = 0; |
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u64 current_block_start = 0; |
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u64 first_block_start = 0; |
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u64 current_block_len = 0; |
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u64 last_block_end = 0; |
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struct scatterlist *sg; |
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u64 current_block_end; |
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u64 misalignment_bits; |
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u64 next_block_start; |
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u64 total_len = 0; |
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int i; |
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*num_of_mtts = ib_umem_num_dma_blocks(umem, PAGE_SIZE); |
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for_each_sg(umem->sg_head.sgl, sg, umem->nmap, i) { |
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/* |
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* Initialization - save the first chunk start as the |
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* current_block_start - block means contiguous pages. |
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*/ |
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if (current_block_len == 0 && current_block_start == 0) { |
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current_block_start = sg_dma_address(sg); |
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first_block_start = current_block_start; |
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/* |
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* Find the bits that are different between the physical |
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* address and the virtual address for the start of the |
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* MR. |
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* umem_get aligned the start_va to a page boundary. |
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* Therefore, we need to align the start va to the same |
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* boundary. |
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* misalignment_bits is needed to handle the case of a |
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* single memory region. In this case, the rest of the |
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* logic will not reduce the block size. If we use a |
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* block size which is bigger than the alignment of the |
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* misalignment bits, we might use the virtual page |
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* number instead of the physical page number, resulting |
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* in access to the wrong data. |
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*/ |
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misalignment_bits = |
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(start_va & (~(((u64)(PAGE_SIZE)) - 1ULL))) ^ |
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current_block_start; |
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block_shift = min(alignment_of(misalignment_bits), |
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block_shift); |
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} |
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|
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/* |
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* Go over the scatter entries and check if they continue the |
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* previous scatter entry. |
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*/ |
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next_block_start = sg_dma_address(sg); |
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current_block_end = current_block_start + current_block_len; |
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/* If we have a split (non-contig.) between two blocks */ |
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if (current_block_end != next_block_start) { |
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block_shift = mlx4_ib_umem_calc_block_mtt |
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(next_block_start, |
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current_block_end, |
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block_shift); |
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|
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/* |
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* If we reached the minimum shift for 4k page we stop |
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* the loop. |
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*/ |
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if (block_shift <= min_shift) |
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goto end; |
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|
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/* |
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* If not saved yet we are in first block - we save the |
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* length of first block to calculate the |
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* non_aligned_pages number at the end. |
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*/ |
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total_len += current_block_len; |
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|
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/* Start a new block */ |
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current_block_start = next_block_start; |
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current_block_len = sg_dma_len(sg); |
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continue; |
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} |
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/* The scatter entry is another part of the current block, |
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* increase the block size. |
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* An entry in the scatter can be larger than 4k (page) as of |
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* dma mapping which merge some blocks together. |
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*/ |
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current_block_len += sg_dma_len(sg); |
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} |
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|
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/* Account for the last block in the total len */ |
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total_len += current_block_len; |
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/* Add to the first block the misalignment that it suffers from. */ |
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total_len += (first_block_start & ((1ULL << block_shift) - 1ULL)); |
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last_block_end = current_block_start + current_block_len; |
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last_block_aligned_end = round_up(last_block_end, 1ULL << block_shift); |
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total_len += (last_block_aligned_end - last_block_end); |
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|
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if (total_len & ((1ULL << block_shift) - 1ULL)) |
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pr_warn("misaligned total length detected (%llu, %llu)!", |
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total_len, block_shift); |
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|
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*num_of_mtts = total_len >> block_shift; |
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end: |
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if (block_shift < min_shift) { |
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/* |
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* If shift is less than the min we set a warning and return the |
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* min shift. |
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*/ |
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pr_warn("umem_calc_optimal_mtt_size - unexpected shift %lld\n", block_shift); |
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|
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block_shift = min_shift; |
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} |
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return block_shift; |
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} |
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static struct ib_umem *mlx4_get_umem_mr(struct ib_device *device, u64 start, |
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u64 length, int access_flags) |
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{ |
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/* |
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* Force registering the memory as writable if the underlying pages |
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* are writable. This is so rereg can change the access permissions |
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* from readable to writable without having to run through ib_umem_get |
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* again |
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*/ |
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if (!ib_access_writable(access_flags)) { |
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unsigned long untagged_start = untagged_addr(start); |
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struct vm_area_struct *vma; |
|
|
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mmap_read_lock(current->mm); |
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/* |
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* FIXME: Ideally this would iterate over all the vmas that |
|
* cover the memory, but for now it requires a single vma to |
|
* entirely cover the MR to support RO mappings. |
|
*/ |
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vma = find_vma(current->mm, untagged_start); |
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if (vma && vma->vm_end >= untagged_start + length && |
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vma->vm_start <= untagged_start) { |
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if (vma->vm_flags & VM_WRITE) |
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access_flags |= IB_ACCESS_LOCAL_WRITE; |
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} else { |
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access_flags |= IB_ACCESS_LOCAL_WRITE; |
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} |
|
|
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mmap_read_unlock(current->mm); |
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} |
|
|
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return ib_umem_get(device, start, length, access_flags); |
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} |
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|
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struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, |
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u64 virt_addr, int access_flags, |
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struct ib_udata *udata) |
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{ |
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struct mlx4_ib_dev *dev = to_mdev(pd->device); |
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struct mlx4_ib_mr *mr; |
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int shift; |
|
int err; |
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int n; |
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|
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mr = kzalloc(sizeof(*mr), GFP_KERNEL); |
|
if (!mr) |
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return ERR_PTR(-ENOMEM); |
|
|
|
mr->umem = mlx4_get_umem_mr(pd->device, start, length, access_flags); |
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if (IS_ERR(mr->umem)) { |
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err = PTR_ERR(mr->umem); |
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goto err_free; |
|
} |
|
|
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shift = mlx4_ib_umem_calc_optimal_mtt_size(mr->umem, start, &n); |
|
|
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err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, virt_addr, length, |
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convert_access(access_flags), n, shift, &mr->mmr); |
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if (err) |
|
goto err_umem; |
|
|
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err = mlx4_ib_umem_write_mtt(dev, &mr->mmr.mtt, mr->umem); |
|
if (err) |
|
goto err_mr; |
|
|
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err = mlx4_mr_enable(dev->dev, &mr->mmr); |
|
if (err) |
|
goto err_mr; |
|
|
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mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key; |
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mr->ibmr.length = length; |
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mr->ibmr.page_size = 1U << shift; |
|
|
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return &mr->ibmr; |
|
|
|
err_mr: |
|
(void) mlx4_mr_free(to_mdev(pd->device)->dev, &mr->mmr); |
|
|
|
err_umem: |
|
ib_umem_release(mr->umem); |
|
|
|
err_free: |
|
kfree(mr); |
|
|
|
return ERR_PTR(err); |
|
} |
|
|
|
struct ib_mr *mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags, u64 start, |
|
u64 length, u64 virt_addr, |
|
int mr_access_flags, struct ib_pd *pd, |
|
struct ib_udata *udata) |
|
{ |
|
struct mlx4_ib_dev *dev = to_mdev(mr->device); |
|
struct mlx4_ib_mr *mmr = to_mmr(mr); |
|
struct mlx4_mpt_entry *mpt_entry; |
|
struct mlx4_mpt_entry **pmpt_entry = &mpt_entry; |
|
int err; |
|
|
|
/* Since we synchronize this call and mlx4_ib_dereg_mr via uverbs, |
|
* we assume that the calls can't run concurrently. Otherwise, a |
|
* race exists. |
|
*/ |
|
err = mlx4_mr_hw_get_mpt(dev->dev, &mmr->mmr, &pmpt_entry); |
|
if (err) |
|
return ERR_PTR(err); |
|
|
|
if (flags & IB_MR_REREG_PD) { |
|
err = mlx4_mr_hw_change_pd(dev->dev, *pmpt_entry, |
|
to_mpd(pd)->pdn); |
|
|
|
if (err) |
|
goto release_mpt_entry; |
|
} |
|
|
|
if (flags & IB_MR_REREG_ACCESS) { |
|
if (ib_access_writable(mr_access_flags) && |
|
!mmr->umem->writable) { |
|
err = -EPERM; |
|
goto release_mpt_entry; |
|
} |
|
|
|
err = mlx4_mr_hw_change_access(dev->dev, *pmpt_entry, |
|
convert_access(mr_access_flags)); |
|
|
|
if (err) |
|
goto release_mpt_entry; |
|
} |
|
|
|
if (flags & IB_MR_REREG_TRANS) { |
|
int shift; |
|
int n; |
|
|
|
mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr); |
|
ib_umem_release(mmr->umem); |
|
mmr->umem = mlx4_get_umem_mr(mr->device, start, length, |
|
mr_access_flags); |
|
if (IS_ERR(mmr->umem)) { |
|
err = PTR_ERR(mmr->umem); |
|
/* Prevent mlx4_ib_dereg_mr from free'ing invalid pointer */ |
|
mmr->umem = NULL; |
|
goto release_mpt_entry; |
|
} |
|
n = ib_umem_num_dma_blocks(mmr->umem, PAGE_SIZE); |
|
shift = PAGE_SHIFT; |
|
|
|
err = mlx4_mr_rereg_mem_write(dev->dev, &mmr->mmr, |
|
virt_addr, length, n, shift, |
|
*pmpt_entry); |
|
if (err) { |
|
ib_umem_release(mmr->umem); |
|
goto release_mpt_entry; |
|
} |
|
mmr->mmr.iova = virt_addr; |
|
mmr->mmr.size = length; |
|
|
|
err = mlx4_ib_umem_write_mtt(dev, &mmr->mmr.mtt, mmr->umem); |
|
if (err) { |
|
mlx4_mr_rereg_mem_cleanup(dev->dev, &mmr->mmr); |
|
ib_umem_release(mmr->umem); |
|
goto release_mpt_entry; |
|
} |
|
} |
|
|
|
/* If we couldn't transfer the MR to the HCA, just remember to |
|
* return a failure. But dereg_mr will free the resources. |
|
*/ |
|
err = mlx4_mr_hw_write_mpt(dev->dev, &mmr->mmr, pmpt_entry); |
|
if (!err && flags & IB_MR_REREG_ACCESS) |
|
mmr->mmr.access = mr_access_flags; |
|
|
|
release_mpt_entry: |
|
mlx4_mr_hw_put_mpt(dev->dev, pmpt_entry); |
|
if (err) |
|
return ERR_PTR(err); |
|
return NULL; |
|
} |
|
|
|
static int |
|
mlx4_alloc_priv_pages(struct ib_device *device, |
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struct mlx4_ib_mr *mr, |
|
int max_pages) |
|
{ |
|
int ret; |
|
|
|
/* Ensure that size is aligned to DMA cacheline |
|
* requirements. |
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* max_pages is limited to MLX4_MAX_FAST_REG_PAGES |
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* so page_map_size will never cross PAGE_SIZE. |
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*/ |
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mr->page_map_size = roundup(max_pages * sizeof(u64), |
|
MLX4_MR_PAGES_ALIGN); |
|
|
|
/* Prevent cross page boundary allocation. */ |
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mr->pages = (__be64 *)get_zeroed_page(GFP_KERNEL); |
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if (!mr->pages) |
|
return -ENOMEM; |
|
|
|
mr->page_map = dma_map_single(device->dev.parent, mr->pages, |
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mr->page_map_size, DMA_TO_DEVICE); |
|
|
|
if (dma_mapping_error(device->dev.parent, mr->page_map)) { |
|
ret = -ENOMEM; |
|
goto err; |
|
} |
|
|
|
return 0; |
|
|
|
err: |
|
free_page((unsigned long)mr->pages); |
|
return ret; |
|
} |
|
|
|
static void |
|
mlx4_free_priv_pages(struct mlx4_ib_mr *mr) |
|
{ |
|
if (mr->pages) { |
|
struct ib_device *device = mr->ibmr.device; |
|
|
|
dma_unmap_single(device->dev.parent, mr->page_map, |
|
mr->page_map_size, DMA_TO_DEVICE); |
|
free_page((unsigned long)mr->pages); |
|
mr->pages = NULL; |
|
} |
|
} |
|
|
|
int mlx4_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata) |
|
{ |
|
struct mlx4_ib_mr *mr = to_mmr(ibmr); |
|
int ret; |
|
|
|
mlx4_free_priv_pages(mr); |
|
|
|
ret = mlx4_mr_free(to_mdev(ibmr->device)->dev, &mr->mmr); |
|
if (ret) |
|
return ret; |
|
if (mr->umem) |
|
ib_umem_release(mr->umem); |
|
kfree(mr); |
|
|
|
return 0; |
|
} |
|
|
|
int mlx4_ib_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata) |
|
{ |
|
struct mlx4_ib_dev *dev = to_mdev(ibmw->device); |
|
struct mlx4_ib_mw *mw = to_mmw(ibmw); |
|
int err; |
|
|
|
err = mlx4_mw_alloc(dev->dev, to_mpd(ibmw->pd)->pdn, |
|
to_mlx4_type(ibmw->type), &mw->mmw); |
|
if (err) |
|
return err; |
|
|
|
err = mlx4_mw_enable(dev->dev, &mw->mmw); |
|
if (err) |
|
goto err_mw; |
|
|
|
ibmw->rkey = mw->mmw.key; |
|
return 0; |
|
|
|
err_mw: |
|
mlx4_mw_free(dev->dev, &mw->mmw); |
|
return err; |
|
} |
|
|
|
int mlx4_ib_dealloc_mw(struct ib_mw *ibmw) |
|
{ |
|
struct mlx4_ib_mw *mw = to_mmw(ibmw); |
|
|
|
mlx4_mw_free(to_mdev(ibmw->device)->dev, &mw->mmw); |
|
return 0; |
|
} |
|
|
|
struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type, |
|
u32 max_num_sg) |
|
{ |
|
struct mlx4_ib_dev *dev = to_mdev(pd->device); |
|
struct mlx4_ib_mr *mr; |
|
int err; |
|
|
|
if (mr_type != IB_MR_TYPE_MEM_REG || |
|
max_num_sg > MLX4_MAX_FAST_REG_PAGES) |
|
return ERR_PTR(-EINVAL); |
|
|
|
mr = kzalloc(sizeof(*mr), GFP_KERNEL); |
|
if (!mr) |
|
return ERR_PTR(-ENOMEM); |
|
|
|
err = mlx4_mr_alloc(dev->dev, to_mpd(pd)->pdn, 0, 0, 0, |
|
max_num_sg, 0, &mr->mmr); |
|
if (err) |
|
goto err_free; |
|
|
|
err = mlx4_alloc_priv_pages(pd->device, mr, max_num_sg); |
|
if (err) |
|
goto err_free_mr; |
|
|
|
mr->max_pages = max_num_sg; |
|
err = mlx4_mr_enable(dev->dev, &mr->mmr); |
|
if (err) |
|
goto err_free_pl; |
|
|
|
mr->ibmr.rkey = mr->ibmr.lkey = mr->mmr.key; |
|
mr->umem = NULL; |
|
|
|
return &mr->ibmr; |
|
|
|
err_free_pl: |
|
mr->ibmr.device = pd->device; |
|
mlx4_free_priv_pages(mr); |
|
err_free_mr: |
|
(void) mlx4_mr_free(dev->dev, &mr->mmr); |
|
err_free: |
|
kfree(mr); |
|
return ERR_PTR(err); |
|
} |
|
|
|
static int mlx4_set_page(struct ib_mr *ibmr, u64 addr) |
|
{ |
|
struct mlx4_ib_mr *mr = to_mmr(ibmr); |
|
|
|
if (unlikely(mr->npages == mr->max_pages)) |
|
return -ENOMEM; |
|
|
|
mr->pages[mr->npages++] = cpu_to_be64(addr | MLX4_MTT_FLAG_PRESENT); |
|
|
|
return 0; |
|
} |
|
|
|
int mlx4_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents, |
|
unsigned int *sg_offset) |
|
{ |
|
struct mlx4_ib_mr *mr = to_mmr(ibmr); |
|
int rc; |
|
|
|
mr->npages = 0; |
|
|
|
ib_dma_sync_single_for_cpu(ibmr->device, mr->page_map, |
|
mr->page_map_size, DMA_TO_DEVICE); |
|
|
|
rc = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, mlx4_set_page); |
|
|
|
ib_dma_sync_single_for_device(ibmr->device, mr->page_map, |
|
mr->page_map_size, DMA_TO_DEVICE); |
|
|
|
return rc; |
|
}
|
|
|