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179 lines
4.3 KiB
179 lines
4.3 KiB
/******************************************************************************* |
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* |
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* Copyright (c) 2015-2016 Intel Corporation. All rights reserved. |
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* |
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* This software is available to you under a choice of one of two |
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* licenses. You may choose to be licensed under the terms of the GNU |
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* General Public License (GPL) Version 2, available from the file |
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* COPYING in the main directory of this source tree, or the |
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* OpenFabrics.org BSD license below: |
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* |
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* Redistribution and use in source and binary forms, with or |
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* without modification, are permitted provided that the following |
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* conditions are met: |
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* |
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* - Redistributions of source code must retain the above |
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* copyright notice, this list of conditions and the following |
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* disclaimer. |
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* |
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* - Redistributions in binary form must reproduce the above |
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* copyright notice, this list of conditions and the following |
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* disclaimer in the documentation and/or other materials |
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* provided with the distribution. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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* SOFTWARE. |
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* |
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*******************************************************************************/ |
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#ifndef I40IW_VERBS_H |
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#define I40IW_VERBS_H |
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struct i40iw_ucontext { |
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struct ib_ucontext ibucontext; |
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struct i40iw_device *iwdev; |
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struct list_head cq_reg_mem_list; |
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spinlock_t cq_reg_mem_list_lock; /* memory list for cq's */ |
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struct list_head qp_reg_mem_list; |
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spinlock_t qp_reg_mem_list_lock; /* memory list for qp's */ |
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int abi_ver; |
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}; |
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struct i40iw_pd { |
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struct ib_pd ibpd; |
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struct i40iw_sc_pd sc_pd; |
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atomic_t usecount; |
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}; |
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struct i40iw_hmc_pble { |
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union { |
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u32 idx; |
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dma_addr_t addr; |
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}; |
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}; |
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struct i40iw_cq_mr { |
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struct i40iw_hmc_pble cq_pbl; |
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dma_addr_t shadow; |
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}; |
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struct i40iw_qp_mr { |
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struct i40iw_hmc_pble sq_pbl; |
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struct i40iw_hmc_pble rq_pbl; |
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dma_addr_t shadow; |
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struct page *sq_page; |
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}; |
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struct i40iw_pbl { |
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struct list_head list; |
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union { |
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struct i40iw_qp_mr qp_mr; |
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struct i40iw_cq_mr cq_mr; |
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}; |
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bool pbl_allocated; |
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bool on_list; |
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u64 user_base; |
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struct i40iw_pble_alloc pble_alloc; |
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struct i40iw_mr *iwmr; |
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}; |
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#define MAX_SAVE_PAGE_ADDRS 4 |
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struct i40iw_mr { |
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union { |
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struct ib_mr ibmr; |
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struct ib_mw ibmw; |
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}; |
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struct ib_umem *region; |
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u16 type; |
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u32 page_cnt; |
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u64 page_size; |
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u32 npages; |
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u32 stag; |
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u64 length; |
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u64 pgaddrmem[MAX_SAVE_PAGE_ADDRS]; |
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struct i40iw_pbl iwpbl; |
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}; |
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struct i40iw_cq { |
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struct ib_cq ibcq; |
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struct i40iw_sc_cq sc_cq; |
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u16 cq_head; |
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u16 cq_size; |
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u16 cq_number; |
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bool user_mode; |
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u32 polled_completions; |
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u32 cq_mem_size; |
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struct i40iw_dma_mem kmem; |
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spinlock_t lock; /* for poll cq */ |
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struct i40iw_pbl *iwpbl; |
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}; |
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struct disconn_work { |
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struct work_struct work; |
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struct i40iw_qp *iwqp; |
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}; |
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struct iw_cm_id; |
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struct ietf_mpa_frame; |
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struct i40iw_ud_file; |
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struct i40iw_qp_kmode { |
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struct i40iw_dma_mem dma_mem; |
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u64 *wrid_mem; |
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}; |
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struct i40iw_qp { |
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struct ib_qp ibqp; |
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struct i40iw_sc_qp sc_qp; |
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struct i40iw_device *iwdev; |
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struct i40iw_cq *iwscq; |
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struct i40iw_cq *iwrcq; |
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struct i40iw_pd *iwpd; |
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struct i40iw_qp_host_ctx_info ctx_info; |
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struct i40iwarp_offload_info iwarp_info; |
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void *allocated_buffer; |
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refcount_t refcount; |
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struct iw_cm_id *cm_id; |
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void *cm_node; |
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struct ib_mr *lsmm_mr; |
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struct work_struct work; |
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enum ib_qp_state ibqp_state; |
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u32 iwarp_state; |
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u32 qp_mem_size; |
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u32 last_aeq; |
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atomic_t close_timer_started; |
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spinlock_t lock; /* for post work requests */ |
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struct i40iw_qp_context *iwqp_context; |
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void *pbl_vbase; |
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dma_addr_t pbl_pbase; |
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struct page *page; |
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u8 active_conn:1; |
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u8 user_mode:1; |
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u8 hte_added:1; |
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u8 flush_issued:1; |
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u8 destroyed:1; |
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u8 sig_all:1; |
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u8 pau_mode:1; |
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u8 rsvd:1; |
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u16 term_sq_flush_code; |
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u16 term_rq_flush_code; |
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u8 hw_iwarp_state; |
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u8 hw_tcp_state; |
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struct i40iw_qp_kmode kqp; |
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struct i40iw_dma_mem host_ctx; |
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struct timer_list terminate_timer; |
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struct i40iw_pbl iwpbl; |
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struct i40iw_dma_mem q2_ctx_mem; |
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struct i40iw_dma_mem ietf_mem; |
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struct completion sq_drained; |
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struct completion rq_drained; |
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struct completion free_qp; |
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}; |
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#endif
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