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246 lines
9.2 KiB
246 lines
9.2 KiB
/* |
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* Copyright(c) 2015, 2016 Intel Corporation. |
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* |
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* This file is provided under a dual BSD/GPLv2 license. When using or |
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* redistributing this file, you may do so under either license. |
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* |
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* GPL LICENSE SUMMARY |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of version 2 of the GNU General Public License as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, but |
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* WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* General Public License for more details. |
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* |
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* BSD LICENSE |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* - Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* - Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* - Neither the name of Intel Corporation nor the names of its |
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* contributors may be used to endorse or promote products derived |
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* from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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*/ |
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/* QSFP support common definitions, for hfi driver */ |
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#define QSFP_DEV 0xA0 |
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#define QSFP_PWR_LAG_MSEC 2000 |
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#define QSFP_MODPRS_LAG_MSEC 20 |
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/* 128 byte pages, per SFF 8636 rev 2.4 */ |
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#define QSFP_MAX_NUM_PAGES 5 |
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/* |
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* Below are masks for QSFP pins. Pins are the same for HFI0 and HFI1. |
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* _N means asserted low |
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*/ |
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#define QSFP_HFI0_I2CCLK BIT(0) |
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#define QSFP_HFI0_I2CDAT BIT(1) |
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#define QSFP_HFI0_RESET_N BIT(2) |
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#define QSFP_HFI0_INT_N BIT(3) |
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#define QSFP_HFI0_MODPRST_N BIT(4) |
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/* QSFP is paged at 256 bytes */ |
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#define QSFP_PAGESIZE 256 |
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/* Reads/writes cannot cross 128 byte boundaries */ |
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#define QSFP_RW_BOUNDARY 128 |
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/* number of bytes in i2c offset for QSFP devices */ |
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#define __QSFP_OFFSET_SIZE 1 /* num address bytes */ |
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#define QSFP_OFFSET_SIZE (__QSFP_OFFSET_SIZE << 8) /* shifted value */ |
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/* Defined fields that Intel requires of qualified cables */ |
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/* Byte 0 is Identifier, not checked */ |
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/* Byte 1 is reserved "status MSB" */ |
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#define QSFP_MONITOR_VAL_START 22 |
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#define QSFP_MONITOR_VAL_END 81 |
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#define QSFP_MONITOR_RANGE (QSFP_MONITOR_VAL_END - QSFP_MONITOR_VAL_START + 1) |
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#define QSFP_TX_CTRL_BYTE_OFFS 86 |
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#define QSFP_PWR_CTRL_BYTE_OFFS 93 |
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#define QSFP_CDR_CTRL_BYTE_OFFS 98 |
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#define QSFP_PAGE_SELECT_BYTE_OFFS 127 |
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/* Byte 128 is Identifier: must be 0x0c for QSFP, or 0x0d for QSFP+ */ |
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#define QSFP_MOD_ID_OFFS 128 |
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/* |
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* Byte 129 is "Extended Identifier". |
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* For bits [7:6]: 0:1.5W, 1:2.0W, 2:2.5W, 3:3.5W |
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* For bits [1:0]: 0:Unused, 1:4W, 2:4.5W, 3:5W |
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*/ |
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#define QSFP_MOD_PWR_OFFS 129 |
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/* Byte 130 is Connector type. Not Intel req'd */ |
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/* Bytes 131..138 are Transceiver types, bit maps for various tech, none IB */ |
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/* Byte 139 is encoding. code 0x01 is 8b10b. Not Intel req'd */ |
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/* byte 140 is nominal bit-rate, in units of 100Mbits/sec */ |
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#define QSFP_NOM_BIT_RATE_100_OFFS 140 |
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/* Byte 141 is Extended Rate Select. Not Intel req'd */ |
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/* Bytes 142..145 are lengths for various fiber types. Not Intel req'd */ |
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/* Byte 146 is length for Copper. Units of 1 meter */ |
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#define QSFP_MOD_LEN_OFFS 146 |
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/* |
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* Byte 147 is Device technology. D0..3 not Intel req'd |
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* D4..7 select from 15 choices, translated by table: |
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*/ |
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#define QSFP_MOD_TECH_OFFS 147 |
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extern const char *const hfi1_qsfp_devtech[16]; |
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/* Active Equalization includes fiber, copper full EQ, and copper near Eq */ |
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#define QSFP_IS_ACTIVE(tech) ((0xA2FF >> ((tech) >> 4)) & 1) |
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/* Active Equalization includes fiber, copper full EQ, and copper far Eq */ |
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#define QSFP_IS_ACTIVE_FAR(tech) ((0x32FF >> ((tech) >> 4)) & 1) |
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/* Attenuation should be valid for copper other than full/near Eq */ |
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#define QSFP_HAS_ATTEN(tech) ((0x4D00 >> ((tech) >> 4)) & 1) |
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/* Length is only valid if technology is "copper" */ |
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#define QSFP_IS_CU(tech) ((0xED00 >> ((tech) >> 4)) & 1) |
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#define QSFP_TECH_1490 9 |
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#define QSFP_OUI(oui) (((unsigned)oui[0] << 16) | ((unsigned)oui[1] << 8) | \ |
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oui[2]) |
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#define QSFP_OUI_AMPHENOL 0x415048 |
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#define QSFP_OUI_FINISAR 0x009065 |
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#define QSFP_OUI_GORE 0x002177 |
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/* Bytes 148..163 are Vendor Name, Left-justified Blank-filled */ |
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#define QSFP_VEND_OFFS 148 |
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#define QSFP_VEND_LEN 16 |
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/* Byte 164 is IB Extended transceiver codes Bits D0..3 are SDR,DDR,QDR,EDR */ |
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#define QSFP_IBXCV_OFFS 164 |
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/* Bytes 165..167 are Vendor OUI number */ |
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#define QSFP_VOUI_OFFS 165 |
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#define QSFP_VOUI_LEN 3 |
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/* Bytes 168..183 are Vendor Part Number, string */ |
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#define QSFP_PN_OFFS 168 |
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#define QSFP_PN_LEN 16 |
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/* Bytes 184,185 are Vendor Rev. Left Justified, Blank-filled */ |
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#define QSFP_REV_OFFS 184 |
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#define QSFP_REV_LEN 2 |
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/* |
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* Bytes 186,187 are Wavelength, if Optical. Not Intel req'd |
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* If copper, they are attenuation in dB: |
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* Byte 186 is at 2.5Gb/sec (SDR), Byte 187 at 5.0Gb/sec (DDR) |
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*/ |
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#define QSFP_ATTEN_OFFS 186 |
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#define QSFP_ATTEN_LEN 2 |
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/* |
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* Bytes 188,189 are Wavelength tolerance, if optical |
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* If copper, they are attenuation in dB: |
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* Byte 188 is at 12.5 Gb/s, Byte 189 at 25 Gb/s |
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*/ |
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#define QSFP_CU_ATTEN_7G_OFFS 188 |
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#define QSFP_CU_ATTEN_12G_OFFS 189 |
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/* Byte 190 is Max Case Temp. Not Intel req'd */ |
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/* Byte 191 is LSB of sum of bytes 128..190. Not Intel req'd */ |
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#define QSFP_CC_OFFS 191 |
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#define QSFP_EQ_INFO_OFFS 193 |
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#define QSFP_CDR_INFO_OFFS 194 |
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/* Bytes 196..211 are Serial Number, String */ |
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#define QSFP_SN_OFFS 196 |
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#define QSFP_SN_LEN 16 |
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/* Bytes 212..219 are date-code YYMMDD (MM==1 for Jan) */ |
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#define QSFP_DATE_OFFS 212 |
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#define QSFP_DATE_LEN 6 |
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/* Bytes 218,219 are optional lot-code, string */ |
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#define QSFP_LOT_OFFS 218 |
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#define QSFP_LOT_LEN 2 |
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/* Bytes 220, 221 indicate monitoring options, Not Intel req'd */ |
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/* Byte 222 indicates nominal bitrate in units of 250Mbits/sec */ |
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#define QSFP_NOM_BIT_RATE_250_OFFS 222 |
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/* Byte 223 is LSB of sum of bytes 192..222 */ |
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#define QSFP_CC_EXT_OFFS 223 |
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/* |
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* Interrupt flag masks |
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*/ |
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#define QSFP_DATA_NOT_READY 0x01 |
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#define QSFP_HIGH_TEMP_ALARM 0x80 |
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#define QSFP_LOW_TEMP_ALARM 0x40 |
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#define QSFP_HIGH_TEMP_WARNING 0x20 |
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#define QSFP_LOW_TEMP_WARNING 0x10 |
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#define QSFP_HIGH_VCC_ALARM 0x80 |
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#define QSFP_LOW_VCC_ALARM 0x40 |
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#define QSFP_HIGH_VCC_WARNING 0x20 |
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#define QSFP_LOW_VCC_WARNING 0x10 |
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#define QSFP_HIGH_POWER_ALARM 0x88 |
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#define QSFP_LOW_POWER_ALARM 0x44 |
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#define QSFP_HIGH_POWER_WARNING 0x22 |
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#define QSFP_LOW_POWER_WARNING 0x11 |
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#define QSFP_HIGH_BIAS_ALARM 0x88 |
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#define QSFP_LOW_BIAS_ALARM 0x44 |
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#define QSFP_HIGH_BIAS_WARNING 0x22 |
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#define QSFP_LOW_BIAS_WARNING 0x11 |
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#define QSFP_ATTEN_SDR(attenarray) (attenarray[0]) |
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#define QSFP_ATTEN_DDR(attenarray) (attenarray[1]) |
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/* |
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* struct qsfp_data encapsulates state of QSFP device for one port. |
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* it will be part of port-specific data if a board supports QSFP. |
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* |
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* Since multiple board-types use QSFP, and their pport_data structs |
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* differ (in the chip-specific section), we need a pointer to its head. |
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* |
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* Avoiding premature optimization, we will have one work_struct per port, |
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* and let the qsfp_lock arbitrate access to common resources. |
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* |
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*/ |
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struct qsfp_data { |
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/* Helps to find our way */ |
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struct hfi1_pportdata *ppd; |
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struct work_struct qsfp_work; |
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u8 cache[QSFP_MAX_NUM_PAGES * 128]; |
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/* protect qsfp data */ |
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spinlock_t qsfp_lock; |
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u8 check_interrupt_flags; |
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u8 reset_needed; |
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u8 limiting_active; |
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u8 cache_valid; |
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u8 cache_refresh_required; |
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}; |
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int refresh_qsfp_cache(struct hfi1_pportdata *ppd, |
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struct qsfp_data *cp); |
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int get_qsfp_power_class(u8 power_byte); |
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int qsfp_mod_present(struct hfi1_pportdata *ppd); |
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int get_cable_info(struct hfi1_devdata *dd, u32 port_num, u32 addr, |
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u32 len, u8 *data); |
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int i2c_write(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, |
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int offset, void *bp, int len); |
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int i2c_read(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, |
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int offset, void *bp, int len); |
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int qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, |
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int len); |
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int qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, |
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int len); |
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int one_qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, |
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int len); |
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int one_qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, |
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int len); |
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struct hfi1_asic_data; |
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int set_up_i2c(struct hfi1_devdata *dd, struct hfi1_asic_data *ad); |
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void clean_up_i2c(struct hfi1_devdata *dd, struct hfi1_asic_data *ad);
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