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129 lines
3.0 KiB
129 lines
3.0 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (c) 1991,1992,1995 Linus Torvalds |
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* Copyright (c) 1994 Alan Modra |
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* Copyright (c) 1995 Markus Kuhn |
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* Copyright (c) 1996 Ingo Molnar |
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* Copyright (c) 1998 Andrea Arcangeli |
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* Copyright (c) 2002,2006 Vojtech Pavlik |
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* Copyright (c) 2003 Andi Kleen |
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* |
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*/ |
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#include <linux/clocksource.h> |
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#include <linux/clockchips.h> |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/i8253.h> |
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#include <linux/time.h> |
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#include <linux/export.h> |
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#include <asm/vsyscall.h> |
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#include <asm/x86_init.h> |
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#include <asm/i8259.h> |
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#include <asm/timer.h> |
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#include <asm/hpet.h> |
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#include <asm/time.h> |
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unsigned long profile_pc(struct pt_regs *regs) |
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{ |
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unsigned long pc = instruction_pointer(regs); |
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if (!user_mode(regs) && in_lock_functions(pc)) { |
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#ifdef CONFIG_FRAME_POINTER |
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return *(unsigned long *)(regs->bp + sizeof(long)); |
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#else |
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unsigned long *sp = (unsigned long *)regs->sp; |
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/* |
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* Return address is either directly at stack pointer |
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* or above a saved flags. Eflags has bits 22-31 zero, |
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* kernel addresses don't. |
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*/ |
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if (sp[0] >> 22) |
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return sp[0]; |
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if (sp[1] >> 22) |
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return sp[1]; |
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#endif |
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} |
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return pc; |
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} |
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EXPORT_SYMBOL(profile_pc); |
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/* |
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* Default timer interrupt handler for PIT/HPET |
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*/ |
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static irqreturn_t timer_interrupt(int irq, void *dev_id) |
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{ |
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global_clock_event->event_handler(global_clock_event); |
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return IRQ_HANDLED; |
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} |
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static void __init setup_default_timer_irq(void) |
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{ |
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unsigned long flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER; |
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/* |
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* Unconditionally register the legacy timer interrupt; even |
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* without legacy PIC/PIT we need this for the HPET0 in legacy |
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* replacement mode. |
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*/ |
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if (request_irq(0, timer_interrupt, flags, "timer", NULL)) |
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pr_info("Failed to register legacy timer interrupt\n"); |
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} |
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/* Default timer init function */ |
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void __init hpet_time_init(void) |
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{ |
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if (!hpet_enable()) { |
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if (!pit_timer_init()) |
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return; |
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} |
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setup_default_timer_irq(); |
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} |
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static __init void x86_late_time_init(void) |
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{ |
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/* |
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* Before PIT/HPET init, select the interrupt mode. This is required |
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* to make the decision whether PIT should be initialized correct. |
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*/ |
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x86_init.irqs.intr_mode_select(); |
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/* Setup the legacy timers */ |
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x86_init.timers.timer_init(); |
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/* |
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* After PIT/HPET timers init, set up the final interrupt mode for |
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* delivering IRQs. |
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*/ |
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x86_init.irqs.intr_mode_init(); |
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tsc_init(); |
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if (static_cpu_has(X86_FEATURE_WAITPKG)) |
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use_tpause_delay(); |
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} |
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/* |
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* Initialize TSC and delay the periodic timer init to |
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* late x86_late_time_init() so ioremap works. |
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*/ |
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void __init time_init(void) |
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{ |
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late_time_init = x86_late_time_init; |
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} |
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/* |
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* Sanity check the vdso related archdata content. |
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*/ |
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void clocksource_arch_init(struct clocksource *cs) |
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{ |
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if (cs->vdso_clock_mode == VDSO_CLOCKMODE_NONE) |
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return; |
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if (cs->mask != CLOCKSOURCE_MASK(64)) { |
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pr_warn("clocksource %s registered with invalid mask %016llx for VDSO. Disabling VDSO support.\n", |
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cs->name, cs->mask); |
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cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE; |
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} |
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}
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