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99 lines
2.8 KiB
99 lines
2.8 KiB
// SPDX-License-Identifier: GPL-2.0 |
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#include <linux/stringify.h> |
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#include <asm/paravirt.h> |
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#include <asm/asm-offsets.h> |
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#define PSTART(d, m) \ |
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patch_data_##d.m |
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#define PEND(d, m) \ |
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(PSTART(d, m) + sizeof(patch_data_##d.m)) |
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#define PATCH(d, m, insn_buff, len) \ |
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paravirt_patch_insns(insn_buff, len, PSTART(d, m), PEND(d, m)) |
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#define PATCH_CASE(ops, m, data, insn_buff, len) \ |
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case PARAVIRT_PATCH(ops.m): \ |
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return PATCH(data, ops##_##m, insn_buff, len) |
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#ifdef CONFIG_PARAVIRT_XXL |
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struct patch_xxl { |
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const unsigned char irq_irq_disable[1]; |
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const unsigned char irq_irq_enable[1]; |
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const unsigned char irq_save_fl[2]; |
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const unsigned char mmu_read_cr2[3]; |
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const unsigned char mmu_read_cr3[3]; |
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const unsigned char mmu_write_cr3[3]; |
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const unsigned char cpu_wbinvd[2]; |
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const unsigned char mov64[3]; |
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}; |
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static const struct patch_xxl patch_data_xxl = { |
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.irq_irq_disable = { 0xfa }, // cli |
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.irq_irq_enable = { 0xfb }, // sti |
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.irq_save_fl = { 0x9c, 0x58 }, // pushf; pop %[re]ax |
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.mmu_read_cr2 = { 0x0f, 0x20, 0xd0 }, // mov %cr2, %[re]ax |
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.mmu_read_cr3 = { 0x0f, 0x20, 0xd8 }, // mov %cr3, %[re]ax |
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.mmu_write_cr3 = { 0x0f, 0x22, 0xdf }, // mov %rdi, %cr3 |
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.cpu_wbinvd = { 0x0f, 0x09 }, // wbinvd |
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.mov64 = { 0x48, 0x89, 0xf8 }, // mov %rdi, %rax |
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}; |
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unsigned int paravirt_patch_ident_64(void *insn_buff, unsigned int len) |
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{ |
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return PATCH(xxl, mov64, insn_buff, len); |
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} |
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# endif /* CONFIG_PARAVIRT_XXL */ |
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#ifdef CONFIG_PARAVIRT_SPINLOCKS |
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struct patch_lock { |
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unsigned char queued_spin_unlock[3]; |
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unsigned char vcpu_is_preempted[2]; |
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}; |
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static const struct patch_lock patch_data_lock = { |
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.vcpu_is_preempted = { 0x31, 0xc0 }, // xor %eax, %eax |
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# ifdef CONFIG_X86_64 |
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.queued_spin_unlock = { 0xc6, 0x07, 0x00 }, // movb $0, (%rdi) |
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# else |
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.queued_spin_unlock = { 0xc6, 0x00, 0x00 }, // movb $0, (%eax) |
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# endif |
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}; |
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#endif /* CONFIG_PARAVIRT_SPINLOCKS */ |
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unsigned int native_patch(u8 type, void *insn_buff, unsigned long addr, |
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unsigned int len) |
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{ |
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switch (type) { |
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#ifdef CONFIG_PARAVIRT_XXL |
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PATCH_CASE(irq, save_fl, xxl, insn_buff, len); |
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PATCH_CASE(irq, irq_enable, xxl, insn_buff, len); |
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PATCH_CASE(irq, irq_disable, xxl, insn_buff, len); |
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PATCH_CASE(mmu, read_cr2, xxl, insn_buff, len); |
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PATCH_CASE(mmu, read_cr3, xxl, insn_buff, len); |
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PATCH_CASE(mmu, write_cr3, xxl, insn_buff, len); |
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PATCH_CASE(cpu, wbinvd, xxl, insn_buff, len); |
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#endif |
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#ifdef CONFIG_PARAVIRT_SPINLOCKS |
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case PARAVIRT_PATCH(lock.queued_spin_unlock): |
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if (pv_is_native_spin_unlock()) |
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return PATCH(lock, queued_spin_unlock, insn_buff, len); |
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break; |
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case PARAVIRT_PATCH(lock.vcpu_is_preempted): |
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if (pv_is_native_vcpu_is_preempted()) |
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return PATCH(lock, vcpu_is_preempted, insn_buff, len); |
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break; |
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#endif |
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default: |
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break; |
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} |
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return paravirt_patch_default(type, insn_buff, addr, len); |
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}
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