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49 lines
1.6 KiB
49 lines
1.6 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* Machine specific calibrate_tsc() for generic. |
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* Split out from timer_tsc.c by Osamu Tomita <[email protected]> |
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*/ |
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/* ------ Calibrate the TSC ------- |
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* Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset(). |
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* Too much 64-bit arithmetic here to do this cleanly in C, and for |
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* accuracy's sake we want to keep the overhead on the CTC speaker (channel 2) |
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* output busy loop as low as possible. We avoid reading the CTC registers |
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* directly because of the awkward 8-bit access mechanism of the 82C54 |
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* device. |
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*/ |
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#ifndef _ASM_X86_MACH_DEFAULT_MACH_TIMER_H |
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#define _ASM_X86_MACH_DEFAULT_MACH_TIMER_H |
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#define CALIBRATE_TIME_MSEC 30 /* 30 msecs */ |
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#define CALIBRATE_LATCH \ |
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((PIT_TICK_RATE * CALIBRATE_TIME_MSEC + 1000/2)/1000) |
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static inline void mach_prepare_counter(void) |
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{ |
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/* Set the Gate high, disable speaker */ |
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outb((inb(0x61) & ~0x02) | 0x01, 0x61); |
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/* |
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* Now let's take care of CTC channel 2 |
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* |
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* Set the Gate high, program CTC channel 2 for mode 0, |
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* (interrupt on terminal count mode), binary count, |
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* load 5 * LATCH count, (LSB and MSB) to begin countdown. |
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* |
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* Some devices need a delay here. |
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*/ |
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outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */ |
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outb_p(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */ |
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outb_p(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */ |
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} |
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static inline void mach_countup(unsigned long *count_p) |
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{ |
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unsigned long count = 0; |
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do { |
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count++; |
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} while ((inb_p(0x61) & 0x20) == 0); |
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*count_p = count; |
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} |
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#endif /* _ASM_X86_MACH_DEFAULT_MACH_TIMER_H */
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