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218 lines
5.1 KiB
218 lines
5.1 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef _ASM_X86_IO_APIC_H |
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#define _ASM_X86_IO_APIC_H |
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#include <linux/types.h> |
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#include <asm/mpspec.h> |
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#include <asm/apicdef.h> |
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#include <asm/irq_vectors.h> |
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#include <asm/x86_init.h> |
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/* |
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* Intel IO-APIC support for SMP and UP systems. |
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* |
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* Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar |
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*/ |
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/* |
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* The structure of the IO-APIC: |
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*/ |
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union IO_APIC_reg_00 { |
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u32 raw; |
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struct { |
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u32 __reserved_2 : 14, |
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LTS : 1, |
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delivery_type : 1, |
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__reserved_1 : 8, |
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ID : 8; |
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} __attribute__ ((packed)) bits; |
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}; |
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union IO_APIC_reg_01 { |
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u32 raw; |
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struct { |
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u32 version : 8, |
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__reserved_2 : 7, |
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PRQ : 1, |
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entries : 8, |
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__reserved_1 : 8; |
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} __attribute__ ((packed)) bits; |
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}; |
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union IO_APIC_reg_02 { |
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u32 raw; |
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struct { |
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u32 __reserved_2 : 24, |
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arbitration : 4, |
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__reserved_1 : 4; |
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} __attribute__ ((packed)) bits; |
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}; |
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union IO_APIC_reg_03 { |
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u32 raw; |
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struct { |
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u32 boot_DT : 1, |
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__reserved_1 : 31; |
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} __attribute__ ((packed)) bits; |
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}; |
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struct IO_APIC_route_entry { |
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union { |
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struct { |
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u64 vector : 8, |
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delivery_mode : 3, |
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dest_mode_logical : 1, |
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delivery_status : 1, |
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active_low : 1, |
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irr : 1, |
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is_level : 1, |
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masked : 1, |
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reserved_0 : 15, |
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reserved_1 : 17, |
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virt_destid_8_14 : 7, |
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destid_0_7 : 8; |
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}; |
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struct { |
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u64 ir_shared_0 : 8, |
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ir_zero : 3, |
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ir_index_15 : 1, |
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ir_shared_1 : 5, |
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ir_reserved_0 : 31, |
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ir_format : 1, |
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ir_index_0_14 : 15; |
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}; |
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struct { |
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u64 w1 : 32, |
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w2 : 32; |
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}; |
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}; |
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} __attribute__ ((packed)); |
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struct irq_alloc_info; |
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struct ioapic_domain_cfg; |
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#define IOAPIC_MAP_ALLOC 0x1 |
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#define IOAPIC_MAP_CHECK 0x2 |
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#ifdef CONFIG_X86_IO_APIC |
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/* |
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* # of IO-APICs and # of IRQ routing registers |
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*/ |
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extern int nr_ioapics; |
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extern int mpc_ioapic_id(int ioapic); |
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extern unsigned int mpc_ioapic_addr(int ioapic); |
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/* # of MP IRQ source entries */ |
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extern int mp_irq_entries; |
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/* MP IRQ source entries */ |
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extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
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/* 1 if "noapic" boot option passed */ |
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extern int skip_ioapic_setup; |
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/* 1 if "noapic" boot option passed */ |
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extern int noioapicquirk; |
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/* -1 if "noapic" boot option passed */ |
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extern int noioapicreroute; |
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extern u32 gsi_top; |
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extern unsigned long io_apic_irqs; |
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#define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1 << (x)) & io_apic_irqs)) |
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/* |
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* If we use the IO-APIC for IRQ routing, disable automatic |
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* assignment of PCI IRQ's. |
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*/ |
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#define io_apic_assign_pci_irqs \ |
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(mp_irq_entries && !skip_ioapic_setup && io_apic_irqs) |
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struct irq_cfg; |
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extern void ioapic_insert_resources(void); |
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extern int arch_early_ioapic_init(void); |
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extern int save_ioapic_entries(void); |
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extern void mask_ioapic_entries(void); |
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extern int restore_ioapic_entries(void); |
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extern void setup_ioapic_ids_from_mpc(void); |
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extern void setup_ioapic_ids_from_mpc_nocheck(void); |
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extern int mp_find_ioapic(u32 gsi); |
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extern int mp_find_ioapic_pin(int ioapic, u32 gsi); |
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extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags, |
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struct irq_alloc_info *info); |
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extern void mp_unmap_irq(int irq); |
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extern int mp_register_ioapic(int id, u32 address, u32 gsi_base, |
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struct ioapic_domain_cfg *cfg); |
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extern int mp_unregister_ioapic(u32 gsi_base); |
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extern int mp_ioapic_registered(u32 gsi_base); |
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extern void ioapic_set_alloc_attr(struct irq_alloc_info *info, |
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int node, int trigger, int polarity); |
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extern void mp_save_irq(struct mpc_intsrc *m); |
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extern void disable_ioapic_support(void); |
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extern void __init io_apic_init_mappings(void); |
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extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg); |
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extern void native_restore_boot_irq_mode(void); |
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static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) |
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{ |
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return x86_apic_ops.io_apic_read(apic, reg); |
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} |
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extern void setup_IO_APIC(void); |
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extern void enable_IO_APIC(void); |
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extern void clear_IO_APIC(void); |
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extern void restore_boot_irq_mode(void); |
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extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin); |
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extern void print_IO_APICs(void); |
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#else /* !CONFIG_X86_IO_APIC */ |
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#define IO_APIC_IRQ(x) 0 |
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#define io_apic_assign_pci_irqs 0 |
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#define setup_ioapic_ids_from_mpc x86_init_noop |
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static inline void ioapic_insert_resources(void) { } |
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static inline int arch_early_ioapic_init(void) { return 0; } |
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static inline void print_IO_APICs(void) {} |
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#define gsi_top (NR_IRQS_LEGACY) |
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static inline int mp_find_ioapic(u32 gsi) { return 0; } |
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static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags, |
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struct irq_alloc_info *info) |
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{ |
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return gsi; |
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} |
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static inline void mp_unmap_irq(int irq) { } |
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static inline int save_ioapic_entries(void) |
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{ |
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return -ENOMEM; |
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} |
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static inline void mask_ioapic_entries(void) { } |
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static inline int restore_ioapic_entries(void) |
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{ |
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return -ENOMEM; |
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} |
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static inline void mp_save_irq(struct mpc_intsrc *m) { } |
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static inline void disable_ioapic_support(void) { } |
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static inline void io_apic_init_mappings(void) { } |
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#define native_io_apic_read NULL |
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#define native_restore_boot_irq_mode NULL |
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static inline void setup_IO_APIC(void) { } |
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static inline void enable_IO_APIC(void) { } |
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static inline void restore_boot_irq_mode(void) { } |
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#endif |
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#endif /* _ASM_X86_IO_APIC_H */
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