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563 lines
13 KiB
563 lines
13 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* Cast5 Cipher 16-way parallel algorithm (AVX/x86_64) |
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* |
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* Copyright (C) 2012 Johannes Goetzfried |
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* <Johannes.Goetzfried@informatik.stud.uni-erlangen.de> |
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* |
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* Copyright © 2012 Jussi Kivilinna <jussi.kivilinna@mbnet.fi> |
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*/ |
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#include <linux/linkage.h> |
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#include <asm/frame.h> |
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.file "cast5-avx-x86_64-asm_64.S" |
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.extern cast_s1 |
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.extern cast_s2 |
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.extern cast_s3 |
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.extern cast_s4 |
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/* structure of crypto context */ |
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#define km 0 |
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#define kr (16*4) |
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#define rr ((16*4)+16) |
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/* s-boxes */ |
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#define s1 cast_s1 |
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#define s2 cast_s2 |
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#define s3 cast_s3 |
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#define s4 cast_s4 |
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/********************************************************************** |
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16-way AVX cast5 |
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**********************************************************************/ |
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#define CTX %r15 |
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#define RL1 %xmm0 |
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#define RR1 %xmm1 |
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#define RL2 %xmm2 |
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#define RR2 %xmm3 |
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#define RL3 %xmm4 |
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#define RR3 %xmm5 |
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#define RL4 %xmm6 |
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#define RR4 %xmm7 |
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#define RX %xmm8 |
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#define RKM %xmm9 |
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#define RKR %xmm10 |
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#define RKRF %xmm11 |
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#define RKRR %xmm12 |
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#define R32 %xmm13 |
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#define R1ST %xmm14 |
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#define RTMP %xmm15 |
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#define RID1 %rdi |
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#define RID1d %edi |
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#define RID2 %rsi |
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#define RID2d %esi |
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#define RGI1 %rdx |
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#define RGI1bl %dl |
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#define RGI1bh %dh |
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#define RGI2 %rcx |
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#define RGI2bl %cl |
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#define RGI2bh %ch |
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#define RGI3 %rax |
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#define RGI3bl %al |
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#define RGI3bh %ah |
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#define RGI4 %rbx |
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#define RGI4bl %bl |
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#define RGI4bh %bh |
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#define RFS1 %r8 |
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#define RFS1d %r8d |
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#define RFS2 %r9 |
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#define RFS2d %r9d |
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#define RFS3 %r10 |
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#define RFS3d %r10d |
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#define lookup_32bit(src, dst, op1, op2, op3, interleave_op, il_reg) \ |
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movzbl src ## bh, RID1d; \ |
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movzbl src ## bl, RID2d; \ |
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shrq $16, src; \ |
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movl s1(, RID1, 4), dst ## d; \ |
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op1 s2(, RID2, 4), dst ## d; \ |
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movzbl src ## bh, RID1d; \ |
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movzbl src ## bl, RID2d; \ |
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interleave_op(il_reg); \ |
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op2 s3(, RID1, 4), dst ## d; \ |
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op3 s4(, RID2, 4), dst ## d; |
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#define dummy(d) /* do nothing */ |
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#define shr_next(reg) \ |
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shrq $16, reg; |
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#define F_head(a, x, gi1, gi2, op0) \ |
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op0 a, RKM, x; \ |
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vpslld RKRF, x, RTMP; \ |
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vpsrld RKRR, x, x; \ |
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vpor RTMP, x, x; \ |
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\ |
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vmovq x, gi1; \ |
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vpextrq $1, x, gi2; |
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#define F_tail(a, x, gi1, gi2, op1, op2, op3) \ |
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lookup_32bit(##gi1, RFS1, op1, op2, op3, shr_next, ##gi1); \ |
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lookup_32bit(##gi2, RFS3, op1, op2, op3, shr_next, ##gi2); \ |
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\ |
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lookup_32bit(##gi1, RFS2, op1, op2, op3, dummy, none); \ |
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shlq $32, RFS2; \ |
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orq RFS1, RFS2; \ |
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lookup_32bit(##gi2, RFS1, op1, op2, op3, dummy, none); \ |
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shlq $32, RFS1; \ |
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orq RFS1, RFS3; \ |
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\ |
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vmovq RFS2, x; \ |
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vpinsrq $1, RFS3, x, x; |
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#define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \ |
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F_head(b1, RX, RGI1, RGI2, op0); \ |
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F_head(b2, RX, RGI3, RGI4, op0); \ |
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\ |
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F_tail(b1, RX, RGI1, RGI2, op1, op2, op3); \ |
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F_tail(b2, RTMP, RGI3, RGI4, op1, op2, op3); \ |
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\ |
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vpxor a1, RX, a1; \ |
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vpxor a2, RTMP, a2; |
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#define F1_2(a1, b1, a2, b2) \ |
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F_2(a1, b1, a2, b2, vpaddd, xorl, subl, addl) |
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#define F2_2(a1, b1, a2, b2) \ |
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F_2(a1, b1, a2, b2, vpxor, subl, addl, xorl) |
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#define F3_2(a1, b1, a2, b2) \ |
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F_2(a1, b1, a2, b2, vpsubd, addl, xorl, subl) |
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#define subround(a1, b1, a2, b2, f) \ |
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F ## f ## _2(a1, b1, a2, b2); |
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#define round(l, r, n, f) \ |
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vbroadcastss (km+(4*n))(CTX), RKM; \ |
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vpand R1ST, RKR, RKRF; \ |
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vpsubq RKRF, R32, RKRR; \ |
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vpsrldq $1, RKR, RKR; \ |
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subround(l ## 1, r ## 1, l ## 2, r ## 2, f); \ |
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subround(l ## 3, r ## 3, l ## 4, r ## 4, f); |
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#define enc_preload_rkr() \ |
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vbroadcastss .L16_mask, RKR; \ |
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/* add 16-bit rotation to key rotations (mod 32) */ \ |
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vpxor kr(CTX), RKR, RKR; |
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#define dec_preload_rkr() \ |
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vbroadcastss .L16_mask, RKR; \ |
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/* add 16-bit rotation to key rotations (mod 32) */ \ |
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vpxor kr(CTX), RKR, RKR; \ |
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vpshufb .Lbswap128_mask, RKR, RKR; |
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#define transpose_2x4(x0, x1, t0, t1) \ |
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vpunpckldq x1, x0, t0; \ |
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vpunpckhdq x1, x0, t1; \ |
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\ |
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vpunpcklqdq t1, t0, x0; \ |
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vpunpckhqdq t1, t0, x1; |
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#define inpack_blocks(x0, x1, t0, t1, rmask) \ |
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vpshufb rmask, x0, x0; \ |
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vpshufb rmask, x1, x1; \ |
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\ |
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transpose_2x4(x0, x1, t0, t1) |
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#define outunpack_blocks(x0, x1, t0, t1, rmask) \ |
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transpose_2x4(x0, x1, t0, t1) \ |
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\ |
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vpshufb rmask, x0, x0; \ |
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vpshufb rmask, x1, x1; |
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.section .rodata.cst16.bswap_mask, "aM", @progbits, 16 |
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.align 16 |
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.Lbswap_mask: |
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.byte 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12 |
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.section .rodata.cst16.bswap128_mask, "aM", @progbits, 16 |
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.align 16 |
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.Lbswap128_mask: |
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.byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 |
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.section .rodata.cst16.bswap_iv_mask, "aM", @progbits, 16 |
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.align 16 |
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.Lbswap_iv_mask: |
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.byte 7, 6, 5, 4, 3, 2, 1, 0, 7, 6, 5, 4, 3, 2, 1, 0 |
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.section .rodata.cst4.16_mask, "aM", @progbits, 4 |
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.align 4 |
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.L16_mask: |
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.byte 16, 16, 16, 16 |
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.section .rodata.cst4.32_mask, "aM", @progbits, 4 |
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.align 4 |
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.L32_mask: |
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.byte 32, 0, 0, 0 |
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.section .rodata.cst4.first_mask, "aM", @progbits, 4 |
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.align 4 |
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.Lfirst_mask: |
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.byte 0x1f, 0, 0, 0 |
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.text |
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.align 16 |
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SYM_FUNC_START_LOCAL(__cast5_enc_blk16) |
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/* input: |
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* %rdi: ctx |
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* RL1: blocks 1 and 2 |
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* RR1: blocks 3 and 4 |
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* RL2: blocks 5 and 6 |
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* RR2: blocks 7 and 8 |
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* RL3: blocks 9 and 10 |
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* RR3: blocks 11 and 12 |
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* RL4: blocks 13 and 14 |
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* RR4: blocks 15 and 16 |
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* output: |
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* RL1: encrypted blocks 1 and 2 |
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* RR1: encrypted blocks 3 and 4 |
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* RL2: encrypted blocks 5 and 6 |
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* RR2: encrypted blocks 7 and 8 |
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* RL3: encrypted blocks 9 and 10 |
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* RR3: encrypted blocks 11 and 12 |
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* RL4: encrypted blocks 13 and 14 |
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* RR4: encrypted blocks 15 and 16 |
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*/ |
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pushq %r15; |
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pushq %rbx; |
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movq %rdi, CTX; |
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vmovdqa .Lbswap_mask, RKM; |
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vmovd .Lfirst_mask, R1ST; |
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vmovd .L32_mask, R32; |
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enc_preload_rkr(); |
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inpack_blocks(RL1, RR1, RTMP, RX, RKM); |
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inpack_blocks(RL2, RR2, RTMP, RX, RKM); |
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inpack_blocks(RL3, RR3, RTMP, RX, RKM); |
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inpack_blocks(RL4, RR4, RTMP, RX, RKM); |
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round(RL, RR, 0, 1); |
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round(RR, RL, 1, 2); |
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round(RL, RR, 2, 3); |
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round(RR, RL, 3, 1); |
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round(RL, RR, 4, 2); |
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round(RR, RL, 5, 3); |
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round(RL, RR, 6, 1); |
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round(RR, RL, 7, 2); |
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round(RL, RR, 8, 3); |
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round(RR, RL, 9, 1); |
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round(RL, RR, 10, 2); |
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round(RR, RL, 11, 3); |
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movzbl rr(CTX), %eax; |
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testl %eax, %eax; |
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jnz .L__skip_enc; |
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round(RL, RR, 12, 1); |
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round(RR, RL, 13, 2); |
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round(RL, RR, 14, 3); |
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round(RR, RL, 15, 1); |
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.L__skip_enc: |
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popq %rbx; |
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popq %r15; |
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vmovdqa .Lbswap_mask, RKM; |
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outunpack_blocks(RR1, RL1, RTMP, RX, RKM); |
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outunpack_blocks(RR2, RL2, RTMP, RX, RKM); |
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outunpack_blocks(RR3, RL3, RTMP, RX, RKM); |
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outunpack_blocks(RR4, RL4, RTMP, RX, RKM); |
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ret; |
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SYM_FUNC_END(__cast5_enc_blk16) |
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.align 16 |
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SYM_FUNC_START_LOCAL(__cast5_dec_blk16) |
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/* input: |
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* %rdi: ctx |
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* RL1: encrypted blocks 1 and 2 |
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* RR1: encrypted blocks 3 and 4 |
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* RL2: encrypted blocks 5 and 6 |
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* RR2: encrypted blocks 7 and 8 |
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* RL3: encrypted blocks 9 and 10 |
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* RR3: encrypted blocks 11 and 12 |
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* RL4: encrypted blocks 13 and 14 |
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* RR4: encrypted blocks 15 and 16 |
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* output: |
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* RL1: decrypted blocks 1 and 2 |
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* RR1: decrypted blocks 3 and 4 |
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* RL2: decrypted blocks 5 and 6 |
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* RR2: decrypted blocks 7 and 8 |
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* RL3: decrypted blocks 9 and 10 |
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* RR3: decrypted blocks 11 and 12 |
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* RL4: decrypted blocks 13 and 14 |
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* RR4: decrypted blocks 15 and 16 |
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*/ |
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pushq %r15; |
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pushq %rbx; |
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movq %rdi, CTX; |
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vmovdqa .Lbswap_mask, RKM; |
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vmovd .Lfirst_mask, R1ST; |
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vmovd .L32_mask, R32; |
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dec_preload_rkr(); |
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inpack_blocks(RL1, RR1, RTMP, RX, RKM); |
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inpack_blocks(RL2, RR2, RTMP, RX, RKM); |
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inpack_blocks(RL3, RR3, RTMP, RX, RKM); |
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inpack_blocks(RL4, RR4, RTMP, RX, RKM); |
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movzbl rr(CTX), %eax; |
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testl %eax, %eax; |
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jnz .L__skip_dec; |
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round(RL, RR, 15, 1); |
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round(RR, RL, 14, 3); |
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round(RL, RR, 13, 2); |
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round(RR, RL, 12, 1); |
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.L__dec_tail: |
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round(RL, RR, 11, 3); |
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round(RR, RL, 10, 2); |
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round(RL, RR, 9, 1); |
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round(RR, RL, 8, 3); |
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round(RL, RR, 7, 2); |
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round(RR, RL, 6, 1); |
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round(RL, RR, 5, 3); |
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round(RR, RL, 4, 2); |
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round(RL, RR, 3, 1); |
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round(RR, RL, 2, 3); |
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round(RL, RR, 1, 2); |
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round(RR, RL, 0, 1); |
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vmovdqa .Lbswap_mask, RKM; |
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popq %rbx; |
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popq %r15; |
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outunpack_blocks(RR1, RL1, RTMP, RX, RKM); |
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outunpack_blocks(RR2, RL2, RTMP, RX, RKM); |
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outunpack_blocks(RR3, RL3, RTMP, RX, RKM); |
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outunpack_blocks(RR4, RL4, RTMP, RX, RKM); |
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ret; |
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.L__skip_dec: |
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vpsrldq $4, RKR, RKR; |
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jmp .L__dec_tail; |
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SYM_FUNC_END(__cast5_dec_blk16) |
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SYM_FUNC_START(cast5_ecb_enc_16way) |
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/* input: |
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* %rdi: ctx |
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* %rsi: dst |
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* %rdx: src |
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*/ |
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FRAME_BEGIN |
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pushq %r15; |
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movq %rdi, CTX; |
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movq %rsi, %r11; |
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vmovdqu (0*4*4)(%rdx), RL1; |
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vmovdqu (1*4*4)(%rdx), RR1; |
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vmovdqu (2*4*4)(%rdx), RL2; |
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vmovdqu (3*4*4)(%rdx), RR2; |
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vmovdqu (4*4*4)(%rdx), RL3; |
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vmovdqu (5*4*4)(%rdx), RR3; |
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vmovdqu (6*4*4)(%rdx), RL4; |
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vmovdqu (7*4*4)(%rdx), RR4; |
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call __cast5_enc_blk16; |
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vmovdqu RR1, (0*4*4)(%r11); |
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vmovdqu RL1, (1*4*4)(%r11); |
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vmovdqu RR2, (2*4*4)(%r11); |
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vmovdqu RL2, (3*4*4)(%r11); |
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vmovdqu RR3, (4*4*4)(%r11); |
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vmovdqu RL3, (5*4*4)(%r11); |
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vmovdqu RR4, (6*4*4)(%r11); |
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vmovdqu RL4, (7*4*4)(%r11); |
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popq %r15; |
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FRAME_END |
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ret; |
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SYM_FUNC_END(cast5_ecb_enc_16way) |
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SYM_FUNC_START(cast5_ecb_dec_16way) |
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/* input: |
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* %rdi: ctx |
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* %rsi: dst |
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* %rdx: src |
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*/ |
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FRAME_BEGIN |
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pushq %r15; |
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movq %rdi, CTX; |
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movq %rsi, %r11; |
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vmovdqu (0*4*4)(%rdx), RL1; |
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vmovdqu (1*4*4)(%rdx), RR1; |
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vmovdqu (2*4*4)(%rdx), RL2; |
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vmovdqu (3*4*4)(%rdx), RR2; |
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vmovdqu (4*4*4)(%rdx), RL3; |
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vmovdqu (5*4*4)(%rdx), RR3; |
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vmovdqu (6*4*4)(%rdx), RL4; |
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vmovdqu (7*4*4)(%rdx), RR4; |
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call __cast5_dec_blk16; |
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vmovdqu RR1, (0*4*4)(%r11); |
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vmovdqu RL1, (1*4*4)(%r11); |
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vmovdqu RR2, (2*4*4)(%r11); |
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vmovdqu RL2, (3*4*4)(%r11); |
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vmovdqu RR3, (4*4*4)(%r11); |
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vmovdqu RL3, (5*4*4)(%r11); |
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vmovdqu RR4, (6*4*4)(%r11); |
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vmovdqu RL4, (7*4*4)(%r11); |
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popq %r15; |
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FRAME_END |
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ret; |
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SYM_FUNC_END(cast5_ecb_dec_16way) |
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SYM_FUNC_START(cast5_cbc_dec_16way) |
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/* input: |
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* %rdi: ctx |
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* %rsi: dst |
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* %rdx: src |
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*/ |
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FRAME_BEGIN |
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pushq %r12; |
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pushq %r15; |
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movq %rdi, CTX; |
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movq %rsi, %r11; |
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movq %rdx, %r12; |
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vmovdqu (0*16)(%rdx), RL1; |
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vmovdqu (1*16)(%rdx), RR1; |
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vmovdqu (2*16)(%rdx), RL2; |
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vmovdqu (3*16)(%rdx), RR2; |
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vmovdqu (4*16)(%rdx), RL3; |
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vmovdqu (5*16)(%rdx), RR3; |
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vmovdqu (6*16)(%rdx), RL4; |
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vmovdqu (7*16)(%rdx), RR4; |
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call __cast5_dec_blk16; |
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/* xor with src */ |
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vmovq (%r12), RX; |
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vpshufd $0x4f, RX, RX; |
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vpxor RX, RR1, RR1; |
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vpxor 0*16+8(%r12), RL1, RL1; |
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vpxor 1*16+8(%r12), RR2, RR2; |
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vpxor 2*16+8(%r12), RL2, RL2; |
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vpxor 3*16+8(%r12), RR3, RR3; |
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vpxor 4*16+8(%r12), RL3, RL3; |
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vpxor 5*16+8(%r12), RR4, RR4; |
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vpxor 6*16+8(%r12), RL4, RL4; |
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vmovdqu RR1, (0*16)(%r11); |
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vmovdqu RL1, (1*16)(%r11); |
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vmovdqu RR2, (2*16)(%r11); |
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vmovdqu RL2, (3*16)(%r11); |
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vmovdqu RR3, (4*16)(%r11); |
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vmovdqu RL3, (5*16)(%r11); |
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vmovdqu RR4, (6*16)(%r11); |
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vmovdqu RL4, (7*16)(%r11); |
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popq %r15; |
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popq %r12; |
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FRAME_END |
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ret; |
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SYM_FUNC_END(cast5_cbc_dec_16way) |
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SYM_FUNC_START(cast5_ctr_16way) |
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/* input: |
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* %rdi: ctx |
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* %rsi: dst |
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* %rdx: src |
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* %rcx: iv (big endian, 64bit) |
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*/ |
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FRAME_BEGIN |
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pushq %r12; |
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pushq %r15; |
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movq %rdi, CTX; |
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movq %rsi, %r11; |
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movq %rdx, %r12; |
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vpcmpeqd RTMP, RTMP, RTMP; |
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vpsrldq $8, RTMP, RTMP; /* low: -1, high: 0 */ |
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vpcmpeqd RKR, RKR, RKR; |
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vpaddq RKR, RKR, RKR; /* low: -2, high: -2 */ |
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vmovdqa .Lbswap_iv_mask, R1ST; |
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vmovdqa .Lbswap128_mask, RKM; |
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|
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/* load IV and byteswap */ |
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vmovq (%rcx), RX; |
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vpshufb R1ST, RX, RX; |
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|
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/* construct IVs */ |
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vpsubq RTMP, RX, RX; /* le: IV1, IV0 */ |
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vpshufb RKM, RX, RL1; /* be: IV0, IV1 */ |
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vpsubq RKR, RX, RX; |
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vpshufb RKM, RX, RR1; /* be: IV2, IV3 */ |
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vpsubq RKR, RX, RX; |
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vpshufb RKM, RX, RL2; /* be: IV4, IV5 */ |
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vpsubq RKR, RX, RX; |
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vpshufb RKM, RX, RR2; /* be: IV6, IV7 */ |
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vpsubq RKR, RX, RX; |
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vpshufb RKM, RX, RL3; /* be: IV8, IV9 */ |
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vpsubq RKR, RX, RX; |
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vpshufb RKM, RX, RR3; /* be: IV10, IV11 */ |
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vpsubq RKR, RX, RX; |
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vpshufb RKM, RX, RL4; /* be: IV12, IV13 */ |
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vpsubq RKR, RX, RX; |
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vpshufb RKM, RX, RR4; /* be: IV14, IV15 */ |
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|
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/* store last IV */ |
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vpsubq RTMP, RX, RX; /* le: IV16, IV14 */ |
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vpshufb R1ST, RX, RX; /* be: IV16, IV16 */ |
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vmovq RX, (%rcx); |
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|
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call __cast5_enc_blk16; |
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|
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/* dst = src ^ iv */ |
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vpxor (0*16)(%r12), RR1, RR1; |
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vpxor (1*16)(%r12), RL1, RL1; |
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vpxor (2*16)(%r12), RR2, RR2; |
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vpxor (3*16)(%r12), RL2, RL2; |
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vpxor (4*16)(%r12), RR3, RR3; |
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vpxor (5*16)(%r12), RL3, RL3; |
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vpxor (6*16)(%r12), RR4, RR4; |
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vpxor (7*16)(%r12), RL4, RL4; |
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vmovdqu RR1, (0*16)(%r11); |
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vmovdqu RL1, (1*16)(%r11); |
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vmovdqu RR2, (2*16)(%r11); |
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vmovdqu RL2, (3*16)(%r11); |
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vmovdqu RR3, (4*16)(%r11); |
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vmovdqu RL3, (5*16)(%r11); |
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vmovdqu RR4, (6*16)(%r11); |
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vmovdqu RL4, (7*16)(%r11); |
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|
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popq %r15; |
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popq %r12; |
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FRAME_END |
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ret; |
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SYM_FUNC_END(cast5_ctr_16way)
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