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227 lines
6.2 KiB
227 lines
6.2 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* -*- linux-c -*- ------------------------------------------------------- * |
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* |
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* Copyright (C) 1991, 1992 Linus Torvalds |
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* Copyright 2007 rPath, Inc. - All Rights Reserved |
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* |
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* ----------------------------------------------------------------------- */ |
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/* |
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* Check for obligatory CPU features and abort if the features are not |
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* present. This code should be compilable as 16-, 32- or 64-bit |
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* code, so be very careful with types and inline assembly. |
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* |
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* This code should not contain any messages; that requires an |
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* additional wrapper. |
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* |
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* As written, this code is not safe for inclusion into the kernel |
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* proper (after FPU initialization, in particular). |
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*/ |
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#ifdef _SETUP |
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# include "boot.h" |
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#endif |
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#include <linux/types.h> |
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#include <asm/intel-family.h> |
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#include <asm/processor-flags.h> |
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#include <asm/required-features.h> |
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#include <asm/msr-index.h> |
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#include "string.h" |
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static u32 err_flags[NCAPINTS]; |
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static const int req_level = CONFIG_X86_MINIMUM_CPU_FAMILY; |
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static const u32 req_flags[NCAPINTS] = |
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{ |
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REQUIRED_MASK0, |
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REQUIRED_MASK1, |
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0, /* REQUIRED_MASK2 not implemented in this file */ |
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0, /* REQUIRED_MASK3 not implemented in this file */ |
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REQUIRED_MASK4, |
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0, /* REQUIRED_MASK5 not implemented in this file */ |
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REQUIRED_MASK6, |
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0, /* REQUIRED_MASK7 not implemented in this file */ |
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0, /* REQUIRED_MASK8 not implemented in this file */ |
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0, /* REQUIRED_MASK9 not implemented in this file */ |
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0, /* REQUIRED_MASK10 not implemented in this file */ |
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0, /* REQUIRED_MASK11 not implemented in this file */ |
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0, /* REQUIRED_MASK12 not implemented in this file */ |
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0, /* REQUIRED_MASK13 not implemented in this file */ |
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0, /* REQUIRED_MASK14 not implemented in this file */ |
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0, /* REQUIRED_MASK15 not implemented in this file */ |
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REQUIRED_MASK16, |
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}; |
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#define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a)) |
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static int is_amd(void) |
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{ |
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return cpu_vendor[0] == A32('A', 'u', 't', 'h') && |
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cpu_vendor[1] == A32('e', 'n', 't', 'i') && |
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cpu_vendor[2] == A32('c', 'A', 'M', 'D'); |
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} |
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static int is_centaur(void) |
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{ |
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return cpu_vendor[0] == A32('C', 'e', 'n', 't') && |
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cpu_vendor[1] == A32('a', 'u', 'r', 'H') && |
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cpu_vendor[2] == A32('a', 'u', 'l', 's'); |
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} |
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static int is_transmeta(void) |
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{ |
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return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && |
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cpu_vendor[1] == A32('i', 'n', 'e', 'T') && |
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cpu_vendor[2] == A32('M', 'x', '8', '6'); |
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} |
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static int is_intel(void) |
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{ |
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return cpu_vendor[0] == A32('G', 'e', 'n', 'u') && |
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cpu_vendor[1] == A32('i', 'n', 'e', 'I') && |
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cpu_vendor[2] == A32('n', 't', 'e', 'l'); |
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} |
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/* Returns a bitmask of which words we have error bits in */ |
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static int check_cpuflags(void) |
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{ |
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u32 err; |
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int i; |
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err = 0; |
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for (i = 0; i < NCAPINTS; i++) { |
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err_flags[i] = req_flags[i] & ~cpu.flags[i]; |
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if (err_flags[i]) |
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err |= 1 << i; |
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} |
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return err; |
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} |
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/* |
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* Returns -1 on error. |
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* |
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* *cpu_level is set to the current CPU level; *req_level to the required |
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* level. x86-64 is considered level 64 for this purpose. |
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* |
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* *err_flags_ptr is set to the flags error array if there are flags missing. |
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*/ |
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int check_cpu(int *cpu_level_ptr, int *req_level_ptr, u32 **err_flags_ptr) |
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{ |
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int err; |
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memset(&cpu.flags, 0, sizeof(cpu.flags)); |
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cpu.level = 3; |
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if (has_eflag(X86_EFLAGS_AC)) |
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cpu.level = 4; |
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get_cpuflags(); |
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err = check_cpuflags(); |
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if (test_bit(X86_FEATURE_LM, cpu.flags)) |
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cpu.level = 64; |
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if (err == 0x01 && |
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!(err_flags[0] & |
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~((1 << X86_FEATURE_XMM)|(1 << X86_FEATURE_XMM2))) && |
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is_amd()) { |
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/* If this is an AMD and we're only missing SSE+SSE2, try to |
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turn them on */ |
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u32 ecx = MSR_K7_HWCR; |
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u32 eax, edx; |
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asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx)); |
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eax &= ~(1 << 15); |
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asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); |
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get_cpuflags(); /* Make sure it really did something */ |
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err = check_cpuflags(); |
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} else if (err == 0x01 && |
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!(err_flags[0] & ~(1 << X86_FEATURE_CX8)) && |
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is_centaur() && cpu.model >= 6) { |
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/* If this is a VIA C3, we might have to enable CX8 |
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explicitly */ |
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u32 ecx = MSR_VIA_FCR; |
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u32 eax, edx; |
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asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx)); |
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eax |= (1<<1)|(1<<7); |
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asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); |
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set_bit(X86_FEATURE_CX8, cpu.flags); |
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err = check_cpuflags(); |
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} else if (err == 0x01 && is_transmeta()) { |
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/* Transmeta might have masked feature bits in word 0 */ |
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u32 ecx = 0x80860004; |
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u32 eax, edx; |
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u32 level = 1; |
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asm("rdmsr" : "=a" (eax), "=d" (edx) : "c" (ecx)); |
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asm("wrmsr" : : "a" (~0), "d" (edx), "c" (ecx)); |
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asm("cpuid" |
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: "+a" (level), "=d" (cpu.flags[0]) |
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: : "ecx", "ebx"); |
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asm("wrmsr" : : "a" (eax), "d" (edx), "c" (ecx)); |
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err = check_cpuflags(); |
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} else if (err == 0x01 && |
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!(err_flags[0] & ~(1 << X86_FEATURE_PAE)) && |
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is_intel() && cpu.level == 6 && |
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(cpu.model == 9 || cpu.model == 13)) { |
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/* PAE is disabled on this Pentium M but can be forced */ |
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if (cmdline_find_option_bool("forcepae")) { |
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puts("WARNING: Forcing PAE in CPU flags\n"); |
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set_bit(X86_FEATURE_PAE, cpu.flags); |
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err = check_cpuflags(); |
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} |
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else { |
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puts("WARNING: PAE disabled. Use parameter 'forcepae' to enable at your own risk!\n"); |
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} |
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} |
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if (!err) |
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err = check_knl_erratum(); |
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if (err_flags_ptr) |
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*err_flags_ptr = err ? err_flags : NULL; |
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if (cpu_level_ptr) |
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*cpu_level_ptr = cpu.level; |
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if (req_level_ptr) |
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*req_level_ptr = req_level; |
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return (cpu.level < req_level || err) ? -1 : 0; |
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} |
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int check_knl_erratum(void) |
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{ |
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/* |
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* First check for the affected model/family: |
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*/ |
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if (!is_intel() || |
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cpu.family != 6 || |
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cpu.model != INTEL_FAM6_XEON_PHI_KNL) |
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return 0; |
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/* |
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* This erratum affects the Accessed/Dirty bits, and can |
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* cause stray bits to be set in !Present PTEs. We have |
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* enough bits in our 64-bit PTEs (which we have on real |
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* 64-bit mode or PAE) to avoid using these troublesome |
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* bits. But, we do not have enough space in our 32-bit |
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* PTEs. So, refuse to run on 32-bit non-PAE kernels. |
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*/ |
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if (IS_ENABLED(CONFIG_X86_64) || IS_ENABLED(CONFIG_X86_PAE)) |
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return 0; |
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puts("This 32-bit kernel can not run on this Xeon Phi x200\n" |
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"processor due to a processor erratum. Use a 64-bit\n" |
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"kernel, or enable PAE in this 32-bit kernel.\n\n"); |
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return -1; |
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} |
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