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435 lines
8.0 KiB
435 lines
8.0 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* This file contains miscellaneous low-level functions. |
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
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* |
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* Largely rewritten by Cort Dougan (cort@cs.nmt.edu) |
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* and Paul Mackerras. |
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* |
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*/ |
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#include <linux/sys.h> |
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#include <asm/unistd.h> |
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#include <asm/errno.h> |
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#include <asm/reg.h> |
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#include <asm/page.h> |
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#include <asm/cache.h> |
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#include <asm/cputable.h> |
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#include <asm/mmu.h> |
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#include <asm/ppc_asm.h> |
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#include <asm/thread_info.h> |
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#include <asm/asm-offsets.h> |
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#include <asm/processor.h> |
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#include <asm/bug.h> |
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#include <asm/ptrace.h> |
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#include <asm/export.h> |
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#include <asm/feature-fixups.h> |
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.text |
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/* |
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* We store the saved ksp_limit in the unused part |
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* of the STACK_FRAME_OVERHEAD |
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*/ |
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_GLOBAL(call_do_softirq) |
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mflr r0 |
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stw r0,4(r1) |
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lwz r10,THREAD+KSP_LIMIT(r2) |
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stw r3, THREAD+KSP_LIMIT(r2) |
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stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3) |
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mr r1,r3 |
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stw r10,8(r1) |
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bl __do_softirq |
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lwz r10,8(r1) |
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lwz r1,0(r1) |
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lwz r0,4(r1) |
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stw r10,THREAD+KSP_LIMIT(r2) |
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mtlr r0 |
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blr |
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/* |
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* void call_do_irq(struct pt_regs *regs, void *sp); |
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*/ |
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_GLOBAL(call_do_irq) |
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mflr r0 |
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stw r0,4(r1) |
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lwz r10,THREAD+KSP_LIMIT(r2) |
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stw r4, THREAD+KSP_LIMIT(r2) |
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stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4) |
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mr r1,r4 |
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stw r10,8(r1) |
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bl __do_irq |
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lwz r10,8(r1) |
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lwz r1,0(r1) |
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lwz r0,4(r1) |
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stw r10,THREAD+KSP_LIMIT(r2) |
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mtlr r0 |
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blr |
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/* |
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* This returns the high 64 bits of the product of two 64-bit numbers. |
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*/ |
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_GLOBAL(mulhdu) |
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cmpwi r6,0 |
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cmpwi cr1,r3,0 |
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mr r10,r4 |
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mulhwu r4,r4,r5 |
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beq 1f |
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mulhwu r0,r10,r6 |
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mullw r7,r10,r5 |
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addc r7,r0,r7 |
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addze r4,r4 |
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1: beqlr cr1 /* all done if high part of A is 0 */ |
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mullw r9,r3,r5 |
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mulhwu r10,r3,r5 |
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beq 2f |
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mullw r0,r3,r6 |
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mulhwu r8,r3,r6 |
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addc r7,r0,r7 |
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adde r4,r4,r8 |
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addze r10,r10 |
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2: addc r4,r4,r9 |
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addze r3,r10 |
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blr |
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/* |
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* reloc_got2 runs through the .got2 section adding an offset |
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* to each entry. |
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*/ |
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_GLOBAL(reloc_got2) |
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mflr r11 |
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lis r7,__got2_start@ha |
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addi r7,r7,__got2_start@l |
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lis r8,__got2_end@ha |
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addi r8,r8,__got2_end@l |
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subf r8,r7,r8 |
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srwi. r8,r8,2 |
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beqlr |
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mtctr r8 |
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bl 1f |
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1: mflr r0 |
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lis r4,1b@ha |
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addi r4,r4,1b@l |
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subf r0,r4,r0 |
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add r7,r0,r7 |
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2: lwz r0,0(r7) |
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add r0,r0,r3 |
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stw r0,0(r7) |
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addi r7,r7,4 |
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bdnz 2b |
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mtlr r11 |
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blr |
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/* |
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* call_setup_cpu - call the setup_cpu function for this cpu |
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* r3 = data offset, r24 = cpu number |
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* |
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* Setup function is called with: |
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* r3 = data offset |
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* r4 = ptr to CPU spec (relocated) |
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*/ |
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_GLOBAL(call_setup_cpu) |
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addis r4,r3,cur_cpu_spec@ha |
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addi r4,r4,cur_cpu_spec@l |
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lwz r4,0(r4) |
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add r4,r4,r3 |
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lwz r5,CPU_SPEC_SETUP(r4) |
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cmpwi 0,r5,0 |
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add r5,r5,r3 |
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beqlr |
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mtctr r5 |
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bctr |
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#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_PPC_BOOK3S_32) |
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/* This gets called by via-pmu.c to switch the PLL selection |
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* on 750fx CPU. This function should really be moved to some |
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* other place (as most of the cpufreq code in via-pmu |
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*/ |
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_GLOBAL(low_choose_750fx_pll) |
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/* Clear MSR:EE */ |
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mfmsr r7 |
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rlwinm r0,r7,0,17,15 |
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mtmsr r0 |
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/* If switching to PLL1, disable HID0:BTIC */ |
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cmplwi cr0,r3,0 |
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beq 1f |
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mfspr r5,SPRN_HID0 |
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rlwinm r5,r5,0,27,25 |
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sync |
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mtspr SPRN_HID0,r5 |
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isync |
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sync |
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1: |
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/* Calc new HID1 value */ |
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mfspr r4,SPRN_HID1 /* Build a HID1:PS bit from parameter */ |
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rlwinm r5,r3,16,15,15 /* Clear out HID1:PS from value read */ |
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rlwinm r4,r4,0,16,14 /* Could have I used rlwimi here ? */ |
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or r4,r4,r5 |
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mtspr SPRN_HID1,r4 |
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#ifdef CONFIG_SMP |
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/* Store new HID1 image */ |
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lwz r6,TASK_CPU(r2) |
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slwi r6,r6,2 |
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#else |
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li r6, 0 |
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#endif |
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addis r6,r6,nap_save_hid1@ha |
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stw r4,nap_save_hid1@l(r6) |
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/* If switching to PLL0, enable HID0:BTIC */ |
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cmplwi cr0,r3,0 |
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bne 1f |
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mfspr r5,SPRN_HID0 |
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ori r5,r5,HID0_BTIC |
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sync |
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mtspr SPRN_HID0,r5 |
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isync |
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sync |
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1: |
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/* Return */ |
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mtmsr r7 |
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blr |
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_GLOBAL(low_choose_7447a_dfs) |
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/* Clear MSR:EE */ |
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mfmsr r7 |
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rlwinm r0,r7,0,17,15 |
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mtmsr r0 |
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/* Calc new HID1 value */ |
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mfspr r4,SPRN_HID1 |
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insrwi r4,r3,1,9 /* insert parameter into bit 9 */ |
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sync |
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mtspr SPRN_HID1,r4 |
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sync |
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isync |
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/* Return */ |
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mtmsr r7 |
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blr |
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#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_PPC_BOOK3S_32 */ |
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#ifdef CONFIG_40x |
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/* |
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* Do an IO access in real mode |
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*/ |
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_GLOBAL(real_readb) |
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mfmsr r7 |
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rlwinm r0,r7,0,~MSR_DR |
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sync |
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mtmsr r0 |
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sync |
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isync |
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lbz r3,0(r3) |
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sync |
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mtmsr r7 |
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sync |
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isync |
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blr |
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_ASM_NOKPROBE_SYMBOL(real_readb) |
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/* |
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* Do an IO access in real mode |
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*/ |
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_GLOBAL(real_writeb) |
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mfmsr r7 |
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rlwinm r0,r7,0,~MSR_DR |
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sync |
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mtmsr r0 |
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sync |
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isync |
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stb r3,0(r4) |
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sync |
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mtmsr r7 |
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sync |
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isync |
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blr |
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_ASM_NOKPROBE_SYMBOL(real_writeb) |
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#endif /* CONFIG_40x */ |
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/* |
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* Copy a whole page. We use the dcbz instruction on the destination |
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* to reduce memory traffic (it eliminates the unnecessary reads of |
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* the destination into cache). This requires that the destination |
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* is cacheable. |
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*/ |
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#define COPY_16_BYTES \ |
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lwz r6,4(r4); \ |
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lwz r7,8(r4); \ |
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lwz r8,12(r4); \ |
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lwzu r9,16(r4); \ |
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stw r6,4(r3); \ |
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stw r7,8(r3); \ |
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stw r8,12(r3); \ |
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stwu r9,16(r3) |
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_GLOBAL(copy_page) |
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rlwinm r5, r3, 0, L1_CACHE_BYTES - 1 |
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addi r3,r3,-4 |
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0: twnei r5, 0 /* WARN if r3 is not cache aligned */ |
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EMIT_BUG_ENTRY 0b,__FILE__,__LINE__, BUGFLAG_WARNING |
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addi r4,r4,-4 |
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li r5,4 |
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#if MAX_COPY_PREFETCH > 1 |
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li r0,MAX_COPY_PREFETCH |
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li r11,4 |
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mtctr r0 |
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11: dcbt r11,r4 |
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addi r11,r11,L1_CACHE_BYTES |
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bdnz 11b |
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#else /* MAX_COPY_PREFETCH == 1 */ |
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dcbt r5,r4 |
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li r11,L1_CACHE_BYTES+4 |
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#endif /* MAX_COPY_PREFETCH */ |
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li r0,PAGE_SIZE/L1_CACHE_BYTES - MAX_COPY_PREFETCH |
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crclr 4*cr0+eq |
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2: |
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mtctr r0 |
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1: |
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dcbt r11,r4 |
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dcbz r5,r3 |
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COPY_16_BYTES |
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#if L1_CACHE_BYTES >= 32 |
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COPY_16_BYTES |
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#if L1_CACHE_BYTES >= 64 |
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COPY_16_BYTES |
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COPY_16_BYTES |
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#if L1_CACHE_BYTES >= 128 |
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COPY_16_BYTES |
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COPY_16_BYTES |
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COPY_16_BYTES |
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COPY_16_BYTES |
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#endif |
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#endif |
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#endif |
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bdnz 1b |
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beqlr |
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crnot 4*cr0+eq,4*cr0+eq |
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li r0,MAX_COPY_PREFETCH |
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li r11,4 |
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b 2b |
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EXPORT_SYMBOL(copy_page) |
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/* |
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* Extended precision shifts. |
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* |
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* Updated to be valid for shift counts from 0 to 63 inclusive. |
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* -- Gabriel |
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* |
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* R3/R4 has 64 bit value |
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* R5 has shift count |
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* result in R3/R4 |
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* |
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* ashrdi3: arithmetic right shift (sign propagation) |
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* lshrdi3: logical right shift |
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* ashldi3: left shift |
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*/ |
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_GLOBAL(__ashrdi3) |
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subfic r6,r5,32 |
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srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count |
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addi r7,r5,32 # could be xori, or addi with -32 |
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slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count) |
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rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0 |
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sraw r7,r3,r7 # t2 = MSW >> (count-32) |
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or r4,r4,r6 # LSW |= t1 |
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slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2 |
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sraw r3,r3,r5 # MSW = MSW >> count |
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or r4,r4,r7 # LSW |= t2 |
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blr |
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EXPORT_SYMBOL(__ashrdi3) |
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_GLOBAL(__ashldi3) |
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subfic r6,r5,32 |
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slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count |
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addi r7,r5,32 # could be xori, or addi with -32 |
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srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count) |
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slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32) |
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or r3,r3,r6 # MSW |= t1 |
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slw r4,r4,r5 # LSW = LSW << count |
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or r3,r3,r7 # MSW |= t2 |
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blr |
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EXPORT_SYMBOL(__ashldi3) |
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_GLOBAL(__lshrdi3) |
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subfic r6,r5,32 |
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srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count |
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addi r7,r5,32 # could be xori, or addi with -32 |
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slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count) |
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srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32) |
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or r4,r4,r6 # LSW |= t1 |
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srw r3,r3,r5 # MSW = MSW >> count |
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or r4,r4,r7 # LSW |= t2 |
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blr |
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EXPORT_SYMBOL(__lshrdi3) |
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/* |
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* 64-bit comparison: __cmpdi2(s64 a, s64 b) |
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* Returns 0 if a < b, 1 if a == b, 2 if a > b. |
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*/ |
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_GLOBAL(__cmpdi2) |
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cmpw r3,r5 |
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li r3,1 |
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bne 1f |
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cmplw r4,r6 |
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beqlr |
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1: li r3,0 |
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bltlr |
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li r3,2 |
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blr |
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EXPORT_SYMBOL(__cmpdi2) |
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/* |
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* 64-bit comparison: __ucmpdi2(u64 a, u64 b) |
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* Returns 0 if a < b, 1 if a == b, 2 if a > b. |
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*/ |
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_GLOBAL(__ucmpdi2) |
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cmplw r3,r5 |
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li r3,1 |
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bne 1f |
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cmplw r4,r6 |
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beqlr |
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1: li r3,0 |
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bltlr |
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li r3,2 |
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blr |
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EXPORT_SYMBOL(__ucmpdi2) |
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_GLOBAL(__bswapdi2) |
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rotlwi r9,r4,8 |
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rotlwi r10,r3,8 |
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rlwimi r9,r4,24,0,7 |
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rlwimi r10,r3,24,0,7 |
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rlwimi r9,r4,24,16,23 |
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rlwimi r10,r3,24,16,23 |
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mr r3,r9 |
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mr r4,r10 |
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blr |
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EXPORT_SYMBOL(__bswapdi2) |
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#ifdef CONFIG_SMP |
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_GLOBAL(start_secondary_resume) |
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/* Reset stack */ |
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rlwinm r1, r1, 0, 0, 31 - THREAD_SHIFT |
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addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD |
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li r3,0 |
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stw r3,0(r1) /* Zero the stack frame pointer */ |
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bl start_secondary |
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b . |
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#endif /* CONFIG_SMP */ |
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/* |
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* This routine is just here to keep GCC happy - sigh... |
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*/ |
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_GLOBAL(__main) |
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blr
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