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455 lines
12 KiB
455 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Based on arch/arm/kernel/setup.c |
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* |
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* Copyright (C) 1995-2001 Russell King |
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* Copyright (C) 2012 ARM Ltd. |
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*/ |
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#include <linux/acpi.h> |
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#include <linux/export.h> |
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#include <linux/kernel.h> |
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#include <linux/stddef.h> |
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#include <linux/ioport.h> |
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#include <linux/delay.h> |
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#include <linux/initrd.h> |
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#include <linux/console.h> |
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#include <linux/cache.h> |
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#include <linux/screen_info.h> |
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#include <linux/init.h> |
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#include <linux/kexec.h> |
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#include <linux/root_dev.h> |
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#include <linux/cpu.h> |
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#include <linux/interrupt.h> |
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#include <linux/smp.h> |
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#include <linux/fs.h> |
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#include <linux/proc_fs.h> |
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#include <linux/memblock.h> |
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#include <linux/of_fdt.h> |
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#include <linux/efi.h> |
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#include <linux/psci.h> |
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#include <linux/sched/task.h> |
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#include <linux/mm.h> |
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#include <asm/acpi.h> |
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#include <asm/fixmap.h> |
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#include <asm/cpu.h> |
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#include <asm/cputype.h> |
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#include <asm/daifflags.h> |
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#include <asm/elf.h> |
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#include <asm/cpufeature.h> |
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#include <asm/cpu_ops.h> |
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#include <asm/kasan.h> |
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#include <asm/numa.h> |
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#include <asm/sections.h> |
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#include <asm/setup.h> |
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#include <asm/smp_plat.h> |
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#include <asm/cacheflush.h> |
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#include <asm/tlbflush.h> |
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#include <asm/traps.h> |
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#include <asm/efi.h> |
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#include <asm/xen/hypervisor.h> |
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#include <asm/mmu_context.h> |
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static int num_standard_resources; |
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static struct resource *standard_resources; |
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phys_addr_t __fdt_pointer __initdata; |
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/* |
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* Standard memory resources |
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*/ |
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static struct resource mem_res[] = { |
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{ |
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.name = "Kernel code", |
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.start = 0, |
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.end = 0, |
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.flags = IORESOURCE_SYSTEM_RAM |
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}, |
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{ |
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.name = "Kernel data", |
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.start = 0, |
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.end = 0, |
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.flags = IORESOURCE_SYSTEM_RAM |
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} |
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}; |
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#define kernel_code mem_res[0] |
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#define kernel_data mem_res[1] |
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/* |
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* The recorded values of x0 .. x3 upon kernel entry. |
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*/ |
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u64 __cacheline_aligned boot_args[4]; |
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void __init smp_setup_processor_id(void) |
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{ |
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u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; |
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set_cpu_logical_map(0, mpidr); |
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/* |
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* clear __my_cpu_offset on boot CPU to avoid hang caused by |
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* using percpu variable early, for example, lockdep will |
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* access percpu variable inside lock_release |
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*/ |
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set_my_cpu_offset(0); |
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pr_info("Booting Linux on physical CPU 0x%010lx [0x%08x]\n", |
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(unsigned long)mpidr, read_cpuid_id()); |
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} |
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bool arch_match_cpu_phys_id(int cpu, u64 phys_id) |
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{ |
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return phys_id == cpu_logical_map(cpu); |
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} |
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struct mpidr_hash mpidr_hash; |
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/** |
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* smp_build_mpidr_hash - Pre-compute shifts required at each affinity |
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* level in order to build a linear index from an |
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* MPIDR value. Resulting algorithm is a collision |
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* free hash carried out through shifting and ORing |
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*/ |
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static void __init smp_build_mpidr_hash(void) |
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{ |
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u32 i, affinity, fs[4], bits[4], ls; |
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u64 mask = 0; |
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/* |
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* Pre-scan the list of MPIDRS and filter out bits that do |
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* not contribute to affinity levels, ie they never toggle. |
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*/ |
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for_each_possible_cpu(i) |
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mask |= (cpu_logical_map(i) ^ cpu_logical_map(0)); |
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pr_debug("mask of set bits %#llx\n", mask); |
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/* |
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* Find and stash the last and first bit set at all affinity levels to |
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* check how many bits are required to represent them. |
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*/ |
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for (i = 0; i < 4; i++) { |
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affinity = MPIDR_AFFINITY_LEVEL(mask, i); |
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/* |
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* Find the MSB bit and LSB bits position |
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* to determine how many bits are required |
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* to express the affinity level. |
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*/ |
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ls = fls(affinity); |
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fs[i] = affinity ? ffs(affinity) - 1 : 0; |
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bits[i] = ls - fs[i]; |
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} |
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/* |
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* An index can be created from the MPIDR_EL1 by isolating the |
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* significant bits at each affinity level and by shifting |
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* them in order to compress the 32 bits values space to a |
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* compressed set of values. This is equivalent to hashing |
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* the MPIDR_EL1 through shifting and ORing. It is a collision free |
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* hash though not minimal since some levels might contain a number |
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* of CPUs that is not an exact power of 2 and their bit |
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* representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}. |
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*/ |
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mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0]; |
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mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0]; |
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mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] - |
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(bits[1] + bits[0]); |
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mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) + |
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fs[3] - (bits[2] + bits[1] + bits[0]); |
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mpidr_hash.mask = mask; |
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mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0]; |
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pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n", |
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mpidr_hash.shift_aff[0], |
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mpidr_hash.shift_aff[1], |
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mpidr_hash.shift_aff[2], |
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mpidr_hash.shift_aff[3], |
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mpidr_hash.mask, |
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mpidr_hash.bits); |
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/* |
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* 4x is an arbitrary value used to warn on a hash table much bigger |
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* than expected on most systems. |
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*/ |
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if (mpidr_hash_size() > 4 * num_possible_cpus()) |
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pr_warn("Large number of MPIDR hash buckets detected\n"); |
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} |
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static void *early_fdt_ptr __initdata; |
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void __init *get_early_fdt_ptr(void) |
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{ |
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return early_fdt_ptr; |
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} |
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asmlinkage void __init early_fdt_map(u64 dt_phys) |
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{ |
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int fdt_size; |
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early_fixmap_init(); |
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early_fdt_ptr = fixmap_remap_fdt(dt_phys, &fdt_size, PAGE_KERNEL); |
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} |
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static void __init setup_machine_fdt(phys_addr_t dt_phys) |
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{ |
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int size; |
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void *dt_virt = fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL); |
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const char *name; |
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if (dt_virt) |
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memblock_reserve(dt_phys, size); |
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if (!dt_virt || !early_init_dt_scan(dt_virt)) { |
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pr_crit("\n" |
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"Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n" |
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"The dtb must be 8-byte aligned and must not exceed 2 MB in size\n" |
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"\nPlease check your bootloader.", |
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&dt_phys, dt_virt); |
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while (true) |
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cpu_relax(); |
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} |
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/* Early fixups are done, map the FDT as read-only now */ |
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fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO); |
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name = of_flat_dt_get_machine_name(); |
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if (!name) |
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return; |
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pr_info("Machine model: %s\n", name); |
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dump_stack_set_arch_desc("%s (DT)", name); |
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} |
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static void __init request_standard_resources(void) |
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{ |
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struct memblock_region *region; |
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struct resource *res; |
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unsigned long i = 0; |
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size_t res_size; |
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kernel_code.start = __pa_symbol(_stext); |
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kernel_code.end = __pa_symbol(__init_begin - 1); |
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kernel_data.start = __pa_symbol(_sdata); |
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kernel_data.end = __pa_symbol(_end - 1); |
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num_standard_resources = memblock.memory.cnt; |
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res_size = num_standard_resources * sizeof(*standard_resources); |
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standard_resources = memblock_alloc(res_size, SMP_CACHE_BYTES); |
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if (!standard_resources) |
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panic("%s: Failed to allocate %zu bytes\n", __func__, res_size); |
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for_each_mem_region(region) { |
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res = &standard_resources[i++]; |
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if (memblock_is_nomap(region)) { |
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res->name = "reserved"; |
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res->flags = IORESOURCE_MEM; |
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} else { |
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res->name = "System RAM"; |
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res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY; |
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} |
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res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region)); |
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res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1; |
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request_resource(&iomem_resource, res); |
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if (kernel_code.start >= res->start && |
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kernel_code.end <= res->end) |
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request_resource(res, &kernel_code); |
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if (kernel_data.start >= res->start && |
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kernel_data.end <= res->end) |
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request_resource(res, &kernel_data); |
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#ifdef CONFIG_KEXEC_CORE |
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/* Userspace will find "Crash kernel" region in /proc/iomem. */ |
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if (crashk_res.end && crashk_res.start >= res->start && |
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crashk_res.end <= res->end) |
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request_resource(res, &crashk_res); |
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#endif |
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} |
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} |
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static int __init reserve_memblock_reserved_regions(void) |
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{ |
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u64 i, j; |
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for (i = 0; i < num_standard_resources; ++i) { |
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struct resource *mem = &standard_resources[i]; |
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phys_addr_t r_start, r_end, mem_size = resource_size(mem); |
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if (!memblock_is_region_reserved(mem->start, mem_size)) |
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continue; |
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for_each_reserved_mem_range(j, &r_start, &r_end) { |
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resource_size_t start, end; |
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start = max(PFN_PHYS(PFN_DOWN(r_start)), mem->start); |
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end = min(PFN_PHYS(PFN_UP(r_end)) - 1, mem->end); |
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if (start > mem->end || end < mem->start) |
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continue; |
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reserve_region_with_split(mem, start, end, "reserved"); |
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} |
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} |
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return 0; |
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} |
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arch_initcall(reserve_memblock_reserved_regions); |
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u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID }; |
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u64 cpu_logical_map(unsigned int cpu) |
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{ |
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return __cpu_logical_map[cpu]; |
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} |
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void __init __no_sanitize_address setup_arch(char **cmdline_p) |
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{ |
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init_mm.start_code = (unsigned long) _stext; |
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init_mm.end_code = (unsigned long) _etext; |
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init_mm.end_data = (unsigned long) _edata; |
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init_mm.brk = (unsigned long) _end; |
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*cmdline_p = boot_command_line; |
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/* |
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* If know now we are going to need KPTI then use non-global |
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* mappings from the start, avoiding the cost of rewriting |
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* everything later. |
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*/ |
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arm64_use_ng_mappings = kaslr_requires_kpti(); |
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early_fixmap_init(); |
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early_ioremap_init(); |
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setup_machine_fdt(__fdt_pointer); |
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/* |
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* Initialise the static keys early as they may be enabled by the |
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* cpufeature code and early parameters. |
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*/ |
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jump_label_init(); |
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parse_early_param(); |
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/* |
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* Unmask asynchronous aborts and fiq after bringing up possible |
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* earlycon. (Report possible System Errors once we can report this |
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* occurred). |
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*/ |
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local_daif_restore(DAIF_PROCCTX_NOIRQ); |
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/* |
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* TTBR0 is only used for the identity mapping at this stage. Make it |
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* point to zero page to avoid speculatively fetching new entries. |
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*/ |
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cpu_uninstall_idmap(); |
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xen_early_init(); |
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efi_init(); |
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if (!efi_enabled(EFI_BOOT) && ((u64)_text % MIN_KIMG_ALIGN) != 0) |
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pr_warn(FW_BUG "Kernel image misaligned at boot, please fix your bootloader!"); |
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arm64_memblock_init(); |
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paging_init(); |
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acpi_table_upgrade(); |
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/* Parse the ACPI tables for possible boot-time configuration */ |
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acpi_boot_table_init(); |
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if (acpi_disabled) |
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unflatten_device_tree(); |
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bootmem_init(); |
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kasan_init(); |
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request_standard_resources(); |
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early_ioremap_reset(); |
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if (acpi_disabled) |
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psci_dt_init(); |
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else |
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psci_acpi_init(); |
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init_bootcpu_ops(); |
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smp_init_cpus(); |
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smp_build_mpidr_hash(); |
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/* Init percpu seeds for random tags after cpus are set up. */ |
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kasan_init_sw_tags(); |
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#ifdef CONFIG_ARM64_SW_TTBR0_PAN |
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/* |
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* Make sure init_thread_info.ttbr0 always generates translation |
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* faults in case uaccess_enable() is inadvertently called by the init |
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* thread. |
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*/ |
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init_task.thread_info.ttbr0 = __pa_symbol(reserved_pg_dir); |
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#endif |
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if (boot_args[1] || boot_args[2] || boot_args[3]) { |
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pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n" |
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"\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n" |
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"This indicates a broken bootloader or old kernel\n", |
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boot_args[1], boot_args[2], boot_args[3]); |
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} |
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} |
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static inline bool cpu_can_disable(unsigned int cpu) |
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{ |
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#ifdef CONFIG_HOTPLUG_CPU |
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const struct cpu_operations *ops = get_cpu_ops(cpu); |
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if (ops && ops->cpu_can_disable) |
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return ops->cpu_can_disable(cpu); |
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#endif |
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return false; |
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} |
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static int __init topology_init(void) |
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{ |
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int i; |
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for_each_online_node(i) |
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register_one_node(i); |
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for_each_possible_cpu(i) { |
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struct cpu *cpu = &per_cpu(cpu_data.cpu, i); |
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cpu->hotpluggable = cpu_can_disable(i); |
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register_cpu(cpu, i); |
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} |
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return 0; |
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} |
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subsys_initcall(topology_init); |
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static void dump_kernel_offset(void) |
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{ |
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const unsigned long offset = kaslr_offset(); |
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if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && offset > 0) { |
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pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n", |
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offset, KIMAGE_VADDR); |
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pr_emerg("PHYS_OFFSET: 0x%llx\n", PHYS_OFFSET); |
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} else { |
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pr_emerg("Kernel Offset: disabled\n"); |
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} |
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} |
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static int arm64_panic_block_dump(struct notifier_block *self, |
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unsigned long v, void *p) |
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{ |
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dump_kernel_offset(); |
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dump_cpu_features(); |
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dump_mem_limit(); |
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return 0; |
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} |
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static struct notifier_block arm64_panic_block = { |
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.notifier_call = arm64_panic_block_dump |
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}; |
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static int __init register_arm64_panic_block(void) |
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{ |
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atomic_notifier_chain_register(&panic_notifier_list, |
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&arm64_panic_block); |
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return 0; |
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} |
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device_initcall(register_arm64_panic_block);
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