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57 lines
1.5 KiB
57 lines
1.5 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright (C) 2012 ARM Ltd. |
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*/ |
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#ifndef __ASM_MMU_H |
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#define __ASM_MMU_H |
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#include <asm/cputype.h> |
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#define MMCF_AARCH32 0x1 /* mm context flag for AArch32 executables */ |
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#define USER_ASID_BIT 48 |
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#define USER_ASID_FLAG (UL(1) << USER_ASID_BIT) |
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#define TTBR_ASID_MASK (UL(0xffff) << 48) |
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#ifndef __ASSEMBLY__ |
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#include <linux/refcount.h> |
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typedef struct { |
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atomic64_t id; |
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#ifdef CONFIG_COMPAT |
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void *sigpage; |
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#endif |
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refcount_t pinned; |
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void *vdso; |
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unsigned long flags; |
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} mm_context_t; |
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/* |
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* This macro is only used by the TLBI and low-level switch_mm() code, |
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* neither of which can race with an ASID change. We therefore don't |
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* need to reload the counter using atomic64_read(). |
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*/ |
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#define ASID(mm) ((mm)->context.id.counter & 0xffff) |
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static inline bool arm64_kernel_unmapped_at_el0(void) |
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{ |
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return cpus_have_const_cap(ARM64_UNMAP_KERNEL_AT_EL0); |
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} |
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extern void arm64_memblock_init(void); |
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extern void paging_init(void); |
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extern void bootmem_init(void); |
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extern void __iomem *early_io_map(phys_addr_t phys, unsigned long virt); |
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extern void init_mem_pgprot(void); |
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extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, |
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unsigned long virt, phys_addr_t size, |
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pgprot_t prot, bool page_mappings_only); |
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extern void *fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot); |
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extern void mark_linear_text_alias_ro(void); |
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extern bool kaslr_requires_kpti(void); |
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#define INIT_MM_CONTEXT(name) \ |
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.pgd = init_pg_dir, |
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#endif /* !__ASSEMBLY__ */ |
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#endif
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