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73 lines
2.3 KiB
73 lines
2.3 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* arch/arm64/include/asm/cpucaps.h |
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* |
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* Copyright (C) 2016 ARM Ltd. |
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*/ |
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#ifndef __ASM_CPUCAPS_H |
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#define __ASM_CPUCAPS_H |
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#define ARM64_WORKAROUND_CLEAN_CACHE 0 |
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#define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1 |
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#define ARM64_WORKAROUND_845719 2 |
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#define ARM64_HAS_SYSREG_GIC_CPUIF 3 |
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#define ARM64_HAS_PAN 4 |
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#define ARM64_HAS_LSE_ATOMICS 5 |
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#define ARM64_WORKAROUND_CAVIUM_23154 6 |
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#define ARM64_WORKAROUND_834220 7 |
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#define ARM64_HAS_NO_HW_PREFETCH 8 |
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#define ARM64_HAS_VIRT_HOST_EXTN 11 |
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#define ARM64_WORKAROUND_CAVIUM_27456 12 |
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#define ARM64_HAS_32BIT_EL0 13 |
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#define ARM64_SPECTRE_V3A 14 |
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#define ARM64_HAS_CNP 15 |
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#define ARM64_HAS_NO_FPSIMD 16 |
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#define ARM64_WORKAROUND_REPEAT_TLBI 17 |
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#define ARM64_WORKAROUND_QCOM_FALKOR_E1003 18 |
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#define ARM64_WORKAROUND_858921 19 |
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#define ARM64_WORKAROUND_CAVIUM_30115 20 |
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#define ARM64_HAS_DCPOP 21 |
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#define ARM64_SVE 22 |
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#define ARM64_UNMAP_KERNEL_AT_EL0 23 |
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#define ARM64_SPECTRE_V2 24 |
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#define ARM64_HAS_RAS_EXTN 25 |
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#define ARM64_WORKAROUND_843419 26 |
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#define ARM64_HAS_CACHE_IDC 27 |
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#define ARM64_HAS_CACHE_DIC 28 |
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#define ARM64_HW_DBM 29 |
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#define ARM64_SPECTRE_V4 30 |
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#define ARM64_MISMATCHED_CACHE_TYPE 31 |
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#define ARM64_HAS_STAGE2_FWB 32 |
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#define ARM64_HAS_CRC32 33 |
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#define ARM64_SSBS 34 |
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#define ARM64_WORKAROUND_1418040 35 |
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#define ARM64_HAS_SB 36 |
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#define ARM64_WORKAROUND_SPECULATIVE_AT 37 |
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#define ARM64_HAS_ADDRESS_AUTH_ARCH 38 |
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#define ARM64_HAS_ADDRESS_AUTH_IMP_DEF 39 |
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#define ARM64_HAS_GENERIC_AUTH_ARCH 40 |
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#define ARM64_HAS_GENERIC_AUTH_IMP_DEF 41 |
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#define ARM64_HAS_IRQ_PRIO_MASKING 42 |
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#define ARM64_HAS_DCPODP 43 |
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#define ARM64_WORKAROUND_1463225 44 |
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#define ARM64_WORKAROUND_CAVIUM_TX2_219_TVM 45 |
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#define ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM 46 |
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#define ARM64_WORKAROUND_1542419 47 |
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#define ARM64_HAS_E0PD 48 |
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#define ARM64_HAS_RNG 49 |
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#define ARM64_HAS_AMU_EXTN 50 |
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#define ARM64_HAS_ADDRESS_AUTH 51 |
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#define ARM64_HAS_GENERIC_AUTH 52 |
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#define ARM64_HAS_32BIT_EL1 53 |
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#define ARM64_BTI 54 |
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#define ARM64_HAS_ARMv8_4_TTL 55 |
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#define ARM64_HAS_TLB_RANGE 56 |
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#define ARM64_MTE 57 |
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#define ARM64_WORKAROUND_1508412 58 |
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#define ARM64_HAS_LDAPR 59 |
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#define ARM64_KVM_PROTECTED_MODE 60 |
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#define ARM64_WORKAROUND_NVIDIA_CARMEL_CNP 61 |
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#define ARM64_NCAPS 62 |
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#endif /* __ASM_CPUCAPS_H */
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