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335 lines
7.5 KiB
335 lines
7.5 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2019-2020 Texas Instruments Incorporated - https://www.ti.com/ |
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*/ |
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/dts-v1/; |
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#include "k3-j721e.dtsi" |
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/ { |
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memory@80000000 { |
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device_type = "memory"; |
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/* 4G RAM */ |
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>, |
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<0x00000008 0x80000000 0x00000000 0x80000000>; |
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}; |
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reserved_memory: reserved-memory { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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ranges; |
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secure_ddr: optee@9e800000 { |
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reg = <0x00 0x9e800000 0x00 0x01800000>; |
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alignment = <0x1000>; |
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no-map; |
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}; |
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mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa0000000 0x00 0x100000>; |
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no-map; |
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}; |
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mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa0100000 0x00 0xf00000>; |
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no-map; |
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}; |
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mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa1000000 0x00 0x100000>; |
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no-map; |
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}; |
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mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa1100000 0x00 0xf00000>; |
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no-map; |
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}; |
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main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa2000000 0x00 0x100000>; |
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no-map; |
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}; |
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main_r5fss0_core0_memory_region: r5f-memory@a2100000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa2100000 0x00 0xf00000>; |
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no-map; |
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}; |
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main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa3000000 0x00 0x100000>; |
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no-map; |
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}; |
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main_r5fss0_core1_memory_region: r5f-memory@a3100000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa3100000 0x00 0xf00000>; |
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no-map; |
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}; |
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main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa4000000 0x00 0x100000>; |
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no-map; |
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}; |
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main_r5fss1_core0_memory_region: r5f-memory@a4100000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa4100000 0x00 0xf00000>; |
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no-map; |
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}; |
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main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa5000000 0x00 0x100000>; |
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no-map; |
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}; |
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main_r5fss1_core1_memory_region: r5f-memory@a5100000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa5100000 0x00 0xf00000>; |
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no-map; |
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}; |
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c66_1_dma_memory_region: c66-dma-memory@a6000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa6000000 0x00 0x100000>; |
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no-map; |
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}; |
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c66_0_memory_region: c66-memory@a6100000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa6100000 0x00 0xf00000>; |
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no-map; |
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}; |
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c66_0_dma_memory_region: c66-dma-memory@a7000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa7000000 0x00 0x100000>; |
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no-map; |
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}; |
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c66_1_memory_region: c66-memory@a7100000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa7100000 0x00 0xf00000>; |
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no-map; |
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}; |
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c71_0_dma_memory_region: c71-dma-memory@a8000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa8000000 0x00 0x100000>; |
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no-map; |
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}; |
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c71_0_memory_region: c71-memory@a8100000 { |
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compatible = "shared-dma-pool"; |
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reg = <0x00 0xa8100000 0x00 0xf00000>; |
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no-map; |
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}; |
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rtos_ipc_memory_region: ipc-memories@aa000000 { |
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reg = <0x00 0xaa000000 0x00 0x01c00000>; |
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alignment = <0x1000>; |
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no-map; |
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}; |
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}; |
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}; |
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&wkup_pmx0 { |
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wkup_i2c0_pins_default: wkup-i2c0-pins-default { |
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pinctrl-single,pins = < |
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J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */ |
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J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ |
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>; |
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}; |
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mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { |
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pinctrl-single,pins = < |
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J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ |
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J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ |
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J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */ |
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J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */ |
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J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */ |
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J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */ |
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J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */ |
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J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */ |
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J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */ |
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J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */ |
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J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */ |
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>; |
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}; |
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}; |
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&ospi0 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; |
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flash@0{ |
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compatible = "jedec,spi-nor"; |
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reg = <0x0>; |
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spi-tx-bus-width = <1>; |
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spi-rx-bus-width = <8>; |
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spi-max-frequency = <40000000>; |
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cdns,tshsl-ns = <60>; |
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cdns,tsd2d-ns = <60>; |
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cdns,tchsh-ns = <60>; |
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cdns,tslch-ns = <60>; |
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cdns,read-delay = <0>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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}; |
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}; |
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&mailbox0_cluster0 { |
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interrupts = <436>; |
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mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { |
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ti,mbox-rx = <0 0 0>; |
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ti,mbox-tx = <1 0 0>; |
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}; |
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mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { |
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ti,mbox-rx = <2 0 0>; |
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ti,mbox-tx = <3 0 0>; |
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}; |
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}; |
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&mailbox0_cluster1 { |
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interrupts = <432>; |
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mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { |
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ti,mbox-rx = <0 0 0>; |
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ti,mbox-tx = <1 0 0>; |
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}; |
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mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { |
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ti,mbox-rx = <2 0 0>; |
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ti,mbox-tx = <3 0 0>; |
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}; |
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}; |
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&mailbox0_cluster2 { |
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interrupts = <428>; |
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mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { |
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ti,mbox-rx = <0 0 0>; |
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ti,mbox-tx = <1 0 0>; |
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}; |
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mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { |
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ti,mbox-rx = <2 0 0>; |
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ti,mbox-tx = <3 0 0>; |
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}; |
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}; |
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&mailbox0_cluster3 { |
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interrupts = <424>; |
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mbox_c66_0: mbox-c66-0 { |
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ti,mbox-rx = <0 0 0>; |
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ti,mbox-tx = <1 0 0>; |
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}; |
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mbox_c66_1: mbox-c66-1 { |
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ti,mbox-rx = <2 0 0>; |
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ti,mbox-tx = <3 0 0>; |
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}; |
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}; |
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&mailbox0_cluster4 { |
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interrupts = <420>; |
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mbox_c71_0: mbox-c71-0 { |
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ti,mbox-rx = <0 0 0>; |
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ti,mbox-tx = <1 0 0>; |
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}; |
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}; |
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&mailbox0_cluster5 { |
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status = "disabled"; |
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}; |
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&mailbox0_cluster6 { |
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status = "disabled"; |
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}; |
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&mailbox0_cluster7 { |
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status = "disabled"; |
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}; |
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&mailbox0_cluster8 { |
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status = "disabled"; |
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}; |
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&mailbox0_cluster9 { |
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status = "disabled"; |
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}; |
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&mailbox0_cluster10 { |
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status = "disabled"; |
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}; |
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&mailbox0_cluster11 { |
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status = "disabled"; |
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}; |
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&mcu_r5fss0_core0 { |
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mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; |
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memory-region = <&mcu_r5fss0_core0_dma_memory_region>, |
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<&mcu_r5fss0_core0_memory_region>; |
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}; |
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&mcu_r5fss0_core1 { |
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mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; |
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memory-region = <&mcu_r5fss0_core1_dma_memory_region>, |
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<&mcu_r5fss0_core1_memory_region>; |
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}; |
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&main_r5fss0_core0 { |
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mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; |
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memory-region = <&main_r5fss0_core0_dma_memory_region>, |
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<&main_r5fss0_core0_memory_region>; |
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}; |
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&main_r5fss0_core1 { |
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mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; |
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memory-region = <&main_r5fss0_core1_dma_memory_region>, |
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<&main_r5fss0_core1_memory_region>; |
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}; |
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&main_r5fss1_core0 { |
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mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; |
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memory-region = <&main_r5fss1_core0_dma_memory_region>, |
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<&main_r5fss1_core0_memory_region>; |
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}; |
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&main_r5fss1_core1 { |
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mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; |
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memory-region = <&main_r5fss1_core1_dma_memory_region>, |
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<&main_r5fss1_core1_memory_region>; |
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}; |
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&c66_0 { |
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mboxes = <&mailbox0_cluster3 &mbox_c66_0>; |
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memory-region = <&c66_0_dma_memory_region>, |
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<&c66_0_memory_region>; |
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}; |
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&c66_1 { |
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mboxes = <&mailbox0_cluster3 &mbox_c66_1>; |
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memory-region = <&c66_1_dma_memory_region>, |
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<&c66_1_memory_region>; |
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}; |
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&c71_0 { |
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mboxes = <&mailbox0_cluster4 &mbox_c71_0>; |
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memory-region = <&c71_0_dma_memory_region>, |
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<&c71_0_memory_region>; |
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};
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